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476 lines
11 KiB
476 lines
11 KiB
/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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/* |
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* linux/drivers/net/ethernet/ibm/ehea/ehea.h |
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* |
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* eHEA ethernet device driver for IBM eServer System p |
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* |
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* (C) Copyright IBM Corp. 2006 |
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* |
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* Authors: |
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* Christoph Raisch <[email protected]> |
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* Jan-Bernd Themann <[email protected]> |
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* Thomas Klein <[email protected]> |
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*/ |
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#ifndef __EHEA_H__ |
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#define __EHEA_H__ |
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#include <linux/module.h> |
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#include <linux/ethtool.h> |
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#include <linux/vmalloc.h> |
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#include <linux/if_vlan.h> |
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#include <asm/ibmebus.h> |
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#include <asm/io.h> |
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#define DRV_NAME "ehea" |
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#define DRV_VERSION "EHEA_0107" |
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/* eHEA capability flags */ |
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#define DLPAR_PORT_ADD_REM 1 |
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#define DLPAR_MEM_ADD 2 |
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#define DLPAR_MEM_REM 4 |
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#define EHEA_CAPABILITIES (DLPAR_PORT_ADD_REM | DLPAR_MEM_ADD | DLPAR_MEM_REM) |
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#define EHEA_MSG_DEFAULT (NETIF_MSG_LINK | NETIF_MSG_TIMER \ |
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| NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR) |
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#define EHEA_MAX_ENTRIES_RQ1 32767 |
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#define EHEA_MAX_ENTRIES_RQ2 16383 |
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#define EHEA_MAX_ENTRIES_RQ3 16383 |
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#define EHEA_MAX_ENTRIES_SQ 32767 |
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#define EHEA_MIN_ENTRIES_QP 127 |
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#define EHEA_SMALL_QUEUES |
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#ifdef EHEA_SMALL_QUEUES |
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#define EHEA_MAX_CQE_COUNT 1023 |
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#define EHEA_DEF_ENTRIES_SQ 1023 |
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#define EHEA_DEF_ENTRIES_RQ1 1023 |
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#define EHEA_DEF_ENTRIES_RQ2 1023 |
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#define EHEA_DEF_ENTRIES_RQ3 511 |
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#else |
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#define EHEA_MAX_CQE_COUNT 4080 |
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#define EHEA_DEF_ENTRIES_SQ 4080 |
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#define EHEA_DEF_ENTRIES_RQ1 8160 |
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#define EHEA_DEF_ENTRIES_RQ2 2040 |
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#define EHEA_DEF_ENTRIES_RQ3 2040 |
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#endif |
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#define EHEA_MAX_ENTRIES_EQ 20 |
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#define EHEA_SG_SQ 2 |
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#define EHEA_SG_RQ1 1 |
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#define EHEA_SG_RQ2 0 |
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#define EHEA_SG_RQ3 0 |
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#define EHEA_MAX_PACKET_SIZE 9022 /* for jumbo frames */ |
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#define EHEA_RQ2_PKT_SIZE 2048 |
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#define EHEA_L_PKT_SIZE 256 /* low latency */ |
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/* Send completion signaling */ |
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/* Protection Domain Identifier */ |
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#define EHEA_PD_ID 0xaabcdeff |
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#define EHEA_RQ2_THRESHOLD 1 |
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#define EHEA_RQ3_THRESHOLD 4 /* use RQ3 threshold of 2048 bytes */ |
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#define EHEA_SPEED_10G 10000 |
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#define EHEA_SPEED_1G 1000 |
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#define EHEA_SPEED_100M 100 |
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#define EHEA_SPEED_10M 10 |
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#define EHEA_SPEED_AUTONEG 0 |
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/* Broadcast/Multicast registration types */ |
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#define EHEA_BCMC_SCOPE_ALL 0x08 |
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#define EHEA_BCMC_SCOPE_SINGLE 0x00 |
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#define EHEA_BCMC_MULTICAST 0x04 |
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#define EHEA_BCMC_BROADCAST 0x00 |
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#define EHEA_BCMC_UNTAGGED 0x02 |
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#define EHEA_BCMC_TAGGED 0x00 |
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#define EHEA_BCMC_VLANID_ALL 0x01 |
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#define EHEA_BCMC_VLANID_SINGLE 0x00 |
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#define EHEA_CACHE_LINE 128 |
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/* Memory Regions */ |
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#define EHEA_MR_ACC_CTRL 0x00800000 |
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#define EHEA_BUSMAP_START 0x8000000000000000ULL |
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#define EHEA_INVAL_ADDR 0xFFFFFFFFFFFFFFFFULL |
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#define EHEA_DIR_INDEX_SHIFT 13 /* 8k Entries in 64k block */ |
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#define EHEA_TOP_INDEX_SHIFT (EHEA_DIR_INDEX_SHIFT * 2) |
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#define EHEA_MAP_ENTRIES (1 << EHEA_DIR_INDEX_SHIFT) |
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#define EHEA_MAP_SIZE (0x10000) /* currently fixed map size */ |
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#define EHEA_INDEX_MASK (EHEA_MAP_ENTRIES - 1) |
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#define EHEA_WATCH_DOG_TIMEOUT 10*HZ |
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/* utility functions */ |
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void ehea_dump(void *adr, int len, char *msg); |
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#define EHEA_BMASK(pos, length) (((pos) << 16) + (length)) |
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#define EHEA_BMASK_IBM(from, to) (((63 - to) << 16) + ((to) - (from) + 1)) |
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#define EHEA_BMASK_SHIFTPOS(mask) (((mask) >> 16) & 0xffff) |
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#define EHEA_BMASK_MASK(mask) \ |
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(0xffffffffffffffffULL >> ((64 - (mask)) & 0xffff)) |
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#define EHEA_BMASK_SET(mask, value) \ |
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((EHEA_BMASK_MASK(mask) & ((u64)(value))) << EHEA_BMASK_SHIFTPOS(mask)) |
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#define EHEA_BMASK_GET(mask, value) \ |
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(EHEA_BMASK_MASK(mask) & (((u64)(value)) >> EHEA_BMASK_SHIFTPOS(mask))) |
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/* |
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* Generic ehea page |
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*/ |
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struct ehea_page { |
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u8 entries[PAGE_SIZE]; |
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}; |
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/* |
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* Generic queue in linux kernel virtual memory |
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*/ |
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struct hw_queue { |
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u64 current_q_offset; /* current queue entry */ |
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struct ehea_page **queue_pages; /* array of pages belonging to queue */ |
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u32 qe_size; /* queue entry size */ |
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u32 queue_length; /* queue length allocated in bytes */ |
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u32 pagesize; |
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u32 toggle_state; /* toggle flag - per page */ |
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u32 reserved; /* 64 bit alignment */ |
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}; |
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/* |
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* For pSeries this is a 64bit memory address where |
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* I/O memory is mapped into CPU address space |
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*/ |
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struct h_epa { |
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void __iomem *addr; |
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}; |
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struct h_epa_user { |
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u64 addr; |
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}; |
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struct h_epas { |
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struct h_epa kernel; /* kernel space accessible resource, |
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set to 0 if unused */ |
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struct h_epa_user user; /* user space accessible resource |
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set to 0 if unused */ |
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}; |
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/* |
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* Memory map data structures |
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*/ |
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struct ehea_dir_bmap |
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{ |
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u64 ent[EHEA_MAP_ENTRIES]; |
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}; |
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struct ehea_top_bmap |
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{ |
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struct ehea_dir_bmap *dir[EHEA_MAP_ENTRIES]; |
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}; |
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struct ehea_bmap |
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{ |
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struct ehea_top_bmap *top[EHEA_MAP_ENTRIES]; |
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}; |
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struct ehea_qp; |
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struct ehea_cq; |
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struct ehea_eq; |
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struct ehea_port; |
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struct ehea_av; |
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/* |
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* Queue attributes passed to ehea_create_qp() |
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*/ |
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struct ehea_qp_init_attr { |
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/* input parameter */ |
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u32 qp_token; /* queue token */ |
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u8 low_lat_rq1; |
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u8 signalingtype; /* cqe generation flag */ |
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u8 rq_count; /* num of receive queues */ |
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u8 eqe_gen; /* eqe generation flag */ |
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u16 max_nr_send_wqes; /* max number of send wqes */ |
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u16 max_nr_rwqes_rq1; /* max number of receive wqes */ |
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u16 max_nr_rwqes_rq2; |
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u16 max_nr_rwqes_rq3; |
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u8 wqe_size_enc_sq; |
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u8 wqe_size_enc_rq1; |
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u8 wqe_size_enc_rq2; |
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u8 wqe_size_enc_rq3; |
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u8 swqe_imm_data_len; /* immediate data length for swqes */ |
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u16 port_nr; |
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u16 rq2_threshold; |
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u16 rq3_threshold; |
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u64 send_cq_handle; |
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u64 recv_cq_handle; |
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u64 aff_eq_handle; |
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/* output parameter */ |
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u32 qp_nr; |
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u16 act_nr_send_wqes; |
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u16 act_nr_rwqes_rq1; |
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u16 act_nr_rwqes_rq2; |
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u16 act_nr_rwqes_rq3; |
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u8 act_wqe_size_enc_sq; |
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u8 act_wqe_size_enc_rq1; |
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u8 act_wqe_size_enc_rq2; |
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u8 act_wqe_size_enc_rq3; |
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u32 nr_sq_pages; |
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u32 nr_rq1_pages; |
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u32 nr_rq2_pages; |
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u32 nr_rq3_pages; |
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u32 liobn_sq; |
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u32 liobn_rq1; |
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u32 liobn_rq2; |
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u32 liobn_rq3; |
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}; |
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/* |
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* Event Queue attributes, passed as parameter |
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*/ |
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struct ehea_eq_attr { |
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u32 type; |
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u32 max_nr_of_eqes; |
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u8 eqe_gen; /* generate eqe flag */ |
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u64 eq_handle; |
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u32 act_nr_of_eqes; |
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u32 nr_pages; |
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u32 ist1; /* Interrupt service token */ |
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u32 ist2; |
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u32 ist3; |
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u32 ist4; |
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}; |
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/* |
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* Event Queue |
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*/ |
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struct ehea_eq { |
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struct ehea_adapter *adapter; |
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struct hw_queue hw_queue; |
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u64 fw_handle; |
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struct h_epas epas; |
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spinlock_t spinlock; |
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struct ehea_eq_attr attr; |
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}; |
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/* |
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* HEA Queues |
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*/ |
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struct ehea_qp { |
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struct ehea_adapter *adapter; |
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u64 fw_handle; /* QP handle for firmware calls */ |
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struct hw_queue hw_squeue; |
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struct hw_queue hw_rqueue1; |
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struct hw_queue hw_rqueue2; |
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struct hw_queue hw_rqueue3; |
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struct h_epas epas; |
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struct ehea_qp_init_attr init_attr; |
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}; |
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/* |
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* Completion Queue attributes |
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*/ |
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struct ehea_cq_attr { |
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/* input parameter */ |
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u32 max_nr_of_cqes; |
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u32 cq_token; |
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u64 eq_handle; |
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/* output parameter */ |
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u32 act_nr_of_cqes; |
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u32 nr_pages; |
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}; |
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/* |
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* Completion Queue |
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*/ |
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struct ehea_cq { |
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struct ehea_adapter *adapter; |
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u64 fw_handle; |
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struct hw_queue hw_queue; |
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struct h_epas epas; |
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struct ehea_cq_attr attr; |
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}; |
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/* |
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* Memory Region |
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*/ |
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struct ehea_mr { |
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struct ehea_adapter *adapter; |
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u64 handle; |
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u64 vaddr; |
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u32 lkey; |
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}; |
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/* |
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* Port state information |
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*/ |
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struct port_stats { |
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int poll_receive_errors; |
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int queue_stopped; |
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int err_tcp_cksum; |
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int err_ip_cksum; |
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int err_frame_crc; |
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}; |
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#define EHEA_IRQ_NAME_SIZE 20 |
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/* |
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* Queue SKB Array |
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*/ |
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struct ehea_q_skb_arr { |
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struct sk_buff **arr; /* skb array for queue */ |
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int len; /* array length */ |
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int index; /* array index */ |
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int os_skbs; /* rq2/rq3 only: outstanding skbs */ |
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}; |
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/* |
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* Port resources |
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*/ |
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struct ehea_port_res { |
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struct napi_struct napi; |
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struct port_stats p_stats; |
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struct ehea_mr send_mr; /* send memory region */ |
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struct ehea_mr recv_mr; /* receive memory region */ |
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struct ehea_port *port; |
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char int_recv_name[EHEA_IRQ_NAME_SIZE]; |
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char int_send_name[EHEA_IRQ_NAME_SIZE]; |
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struct ehea_qp *qp; |
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struct ehea_cq *send_cq; |
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struct ehea_cq *recv_cq; |
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struct ehea_eq *eq; |
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struct ehea_q_skb_arr rq1_skba; |
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struct ehea_q_skb_arr rq2_skba; |
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struct ehea_q_skb_arr rq3_skba; |
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struct ehea_q_skb_arr sq_skba; |
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int sq_skba_size; |
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int swqe_refill_th; |
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atomic_t swqe_avail; |
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int swqe_ll_count; |
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u32 swqe_id_counter; |
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u64 tx_packets; |
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u64 tx_bytes; |
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u64 rx_packets; |
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u64 rx_bytes; |
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int sq_restart_flag; |
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}; |
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#define EHEA_MAX_PORTS 16 |
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#define EHEA_NUM_PORTRES_FW_HANDLES 6 /* QP handle, SendCQ handle, |
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RecvCQ handle, EQ handle, |
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SendMR handle, RecvMR handle */ |
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#define EHEA_NUM_PORT_FW_HANDLES 1 /* EQ handle */ |
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#define EHEA_NUM_ADAPTER_FW_HANDLES 2 /* MR handle, NEQ handle */ |
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struct ehea_adapter { |
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u64 handle; |
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struct platform_device *ofdev; |
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struct ehea_port *port[EHEA_MAX_PORTS]; |
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struct ehea_eq *neq; /* notification event queue */ |
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struct tasklet_struct neq_tasklet; |
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struct ehea_mr mr; |
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u32 pd; /* protection domain */ |
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u64 max_mc_mac; /* max number of multicast mac addresses */ |
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int active_ports; |
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struct list_head list; |
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}; |
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struct ehea_mc_list { |
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struct list_head list; |
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u64 macaddr; |
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}; |
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/* kdump support */ |
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struct ehea_fw_handle_entry { |
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u64 adh; /* Adapter Handle */ |
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u64 fwh; /* Firmware Handle */ |
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}; |
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struct ehea_fw_handle_array { |
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struct ehea_fw_handle_entry *arr; |
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int num_entries; |
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struct mutex lock; |
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}; |
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struct ehea_bcmc_reg_entry { |
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u64 adh; /* Adapter Handle */ |
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u32 port_id; /* Logical Port Id */ |
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u8 reg_type; /* Registration Type */ |
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u64 macaddr; |
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}; |
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struct ehea_bcmc_reg_array { |
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struct ehea_bcmc_reg_entry *arr; |
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int num_entries; |
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spinlock_t lock; |
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}; |
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#define EHEA_PORT_UP 1 |
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#define EHEA_PORT_DOWN 0 |
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#define EHEA_PHY_LINK_UP 1 |
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#define EHEA_PHY_LINK_DOWN 0 |
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#define EHEA_MAX_PORT_RES 16 |
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struct ehea_port { |
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struct ehea_adapter *adapter; /* adapter that owns this port */ |
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struct net_device *netdev; |
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struct rtnl_link_stats64 stats; |
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struct ehea_port_res port_res[EHEA_MAX_PORT_RES]; |
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struct platform_device ofdev; /* Open Firmware Device */ |
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struct ehea_mc_list *mc_list; /* Multicast MAC addresses */ |
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struct ehea_eq *qp_eq; |
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struct work_struct reset_task; |
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struct delayed_work stats_work; |
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struct mutex port_lock; |
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char int_aff_name[EHEA_IRQ_NAME_SIZE]; |
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int allmulti; /* Indicates IFF_ALLMULTI state */ |
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int promisc; /* Indicates IFF_PROMISC state */ |
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int num_mcs; |
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int resets; |
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unsigned long flags; |
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u64 mac_addr; |
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u32 logical_port_id; |
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u32 port_speed; |
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u32 msg_enable; |
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u32 sig_comp_iv; |
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u32 state; |
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u8 phy_link; |
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u8 full_duplex; |
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u8 autoneg; |
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u8 num_def_qps; |
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wait_queue_head_t swqe_avail_wq; |
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wait_queue_head_t restart_wq; |
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}; |
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struct port_res_cfg { |
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int max_entries_rcq; |
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int max_entries_scq; |
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int max_entries_sq; |
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int max_entries_rq1; |
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int max_entries_rq2; |
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int max_entries_rq3; |
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}; |
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enum ehea_flag_bits { |
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__EHEA_STOP_XFER, |
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__EHEA_DISABLE_PORT_RESET |
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}; |
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void ehea_set_ethtool_ops(struct net_device *netdev); |
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int ehea_sense_port_attr(struct ehea_port *port); |
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int ehea_set_portspeed(struct ehea_port *port, u32 port_speed); |
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#endif /* __EHEA_H__ */
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