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947 lines
25 KiB
947 lines
25 KiB
/* sun3lance.c: Ethernet driver for SUN3 Lance chip */ |
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/* |
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|
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Sun3 Lance ethernet driver, by Sam Creasey ([email protected]). |
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This driver is a part of the linux kernel, and is thus distributed |
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under the GNU General Public License. |
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|
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The values used in LANCE_OBIO and LANCE_IRQ seem to be empirically |
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true for the correct IRQ and address of the lance registers. They |
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have not been widely tested, however. What we probably need is a |
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"proper" way to search for a device in the sun3's prom, but, alas, |
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linux has no such thing. |
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|
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This driver is largely based on atarilance.c, by Roman Hodek. Other |
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sources of inspiration were the NetBSD sun3 am7990 driver, and the |
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linux sparc lance driver (sunlance.c). |
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|
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There are more assumptions made throughout this driver, it almost |
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certainly still needs work, but it does work at least for RARP/BOOTP and |
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mounting the root NFS filesystem. |
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|
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*/ |
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|
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static const char version[] = |
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"sun3lance.c: v1.2 1/12/2001 Sam Creasey ([email protected])\n"; |
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#include <linux/module.h> |
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#include <linux/stddef.h> |
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#include <linux/kernel.h> |
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#include <linux/string.h> |
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#include <linux/errno.h> |
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#include <linux/interrupt.h> |
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#include <linux/init.h> |
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#include <linux/ioport.h> |
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#include <linux/delay.h> |
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#include <linux/netdevice.h> |
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#include <linux/etherdevice.h> |
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#include <linux/skbuff.h> |
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#include <linux/bitops.h> |
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#include <linux/pgtable.h> |
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|
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#include <asm/cacheflush.h> |
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#include <asm/setup.h> |
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#include <asm/irq.h> |
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#include <asm/io.h> |
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#include <asm/dvma.h> |
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#include <asm/idprom.h> |
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#include <asm/machines.h> |
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|
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#ifdef CONFIG_SUN3 |
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#include <asm/sun3mmu.h> |
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#else |
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#include <asm/sun3xprom.h> |
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#endif |
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|
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/* sun3/60 addr/irq for the lance chip. If your sun is different, |
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change this. */ |
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#define LANCE_OBIO 0x120000 |
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#define LANCE_IRQ IRQ_AUTO_3 |
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|
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/* Debug level: |
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* 0 = silent, print only serious errors |
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* 1 = normal, print error messages |
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* 2 = debug, print debug infos |
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* 3 = debug, print even more debug infos (packet data) |
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*/ |
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|
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#define LANCE_DEBUG 0 |
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|
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#ifdef LANCE_DEBUG |
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static int lance_debug = LANCE_DEBUG; |
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#else |
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static int lance_debug = 1; |
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#endif |
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module_param(lance_debug, int, 0); |
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MODULE_PARM_DESC(lance_debug, "SUN3 Lance debug level (0-3)"); |
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MODULE_LICENSE("GPL"); |
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|
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#define DPRINTK(n,a) \ |
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do { \ |
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if (lance_debug >= n) \ |
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printk a; \ |
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} while( 0 ) |
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|
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/* we're only using 32k of memory, so we use 4 TX |
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buffers and 16 RX buffers. These values are expressed as log2. */ |
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|
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#define TX_LOG_RING_SIZE 3 |
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#define RX_LOG_RING_SIZE 5 |
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|
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/* These are the derived values */ |
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|
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#define TX_RING_SIZE (1 << TX_LOG_RING_SIZE) |
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#define TX_RING_LEN_BITS (TX_LOG_RING_SIZE << 5) |
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#define TX_RING_MOD_MASK (TX_RING_SIZE - 1) |
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#define RX_RING_SIZE (1 << RX_LOG_RING_SIZE) |
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#define RX_RING_LEN_BITS (RX_LOG_RING_SIZE << 5) |
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#define RX_RING_MOD_MASK (RX_RING_SIZE - 1) |
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|
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/* Definitions for packet buffer access: */ |
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#define PKT_BUF_SZ 1544 |
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|
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/* Get the address of a packet buffer corresponding to a given buffer head */ |
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#define PKTBUF_ADDR(head) (void *)((unsigned long)(MEM) | (head)->base) |
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|
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/* The LANCE Rx and Tx ring descriptors. */ |
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struct lance_rx_head { |
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unsigned short base; /* Low word of base addr */ |
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volatile unsigned char flag; |
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unsigned char base_hi; /* High word of base addr (unused) */ |
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short buf_length; /* This length is 2s complement! */ |
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volatile short msg_length; /* This length is "normal". */ |
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}; |
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|
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struct lance_tx_head { |
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unsigned short base; /* Low word of base addr */ |
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volatile unsigned char flag; |
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unsigned char base_hi; /* High word of base addr (unused) */ |
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short length; /* Length is 2s complement! */ |
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volatile short misc; |
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}; |
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|
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/* The LANCE initialization block, described in databook. */ |
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struct lance_init_block { |
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unsigned short mode; /* Pre-set mode */ |
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unsigned char hwaddr[6]; /* Physical ethernet address */ |
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unsigned int filter[2]; /* Multicast filter (unused). */ |
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/* Receive and transmit ring base, along with length bits. */ |
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unsigned short rdra; |
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unsigned short rlen; |
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unsigned short tdra; |
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unsigned short tlen; |
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unsigned short pad[4]; /* is thie needed? */ |
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}; |
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|
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/* The whole layout of the Lance shared memory */ |
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struct lance_memory { |
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struct lance_init_block init; |
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struct lance_tx_head tx_head[TX_RING_SIZE]; |
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struct lance_rx_head rx_head[RX_RING_SIZE]; |
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char rx_data[RX_RING_SIZE][PKT_BUF_SZ]; |
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char tx_data[TX_RING_SIZE][PKT_BUF_SZ]; |
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}; |
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|
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/* The driver's private device structure */ |
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|
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struct lance_private { |
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volatile unsigned short *iobase; |
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struct lance_memory *mem; |
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int new_rx, new_tx; /* The next free ring entry */ |
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int old_tx, old_rx; /* ring entry to be processed */ |
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/* These two must be longs for set_bit() */ |
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long tx_full; |
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long lock; |
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}; |
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|
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/* I/O register access macros */ |
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|
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#define MEM lp->mem |
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#define DREG lp->iobase[0] |
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#define AREG lp->iobase[1] |
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#define REGA(a) (*( AREG = (a), &DREG )) |
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|
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/* Definitions for the Lance */ |
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|
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/* tx_head flags */ |
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#define TMD1_ENP 0x01 /* end of packet */ |
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#define TMD1_STP 0x02 /* start of packet */ |
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#define TMD1_DEF 0x04 /* deferred */ |
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#define TMD1_ONE 0x08 /* one retry needed */ |
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#define TMD1_MORE 0x10 /* more than one retry needed */ |
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#define TMD1_ERR 0x40 /* error summary */ |
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#define TMD1_OWN 0x80 /* ownership (set: chip owns) */ |
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#define TMD1_OWN_CHIP TMD1_OWN |
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#define TMD1_OWN_HOST 0 |
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|
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/* tx_head misc field */ |
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#define TMD3_TDR 0x03FF /* Time Domain Reflectometry counter */ |
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#define TMD3_RTRY 0x0400 /* failed after 16 retries */ |
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#define TMD3_LCAR 0x0800 /* carrier lost */ |
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#define TMD3_LCOL 0x1000 /* late collision */ |
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#define TMD3_UFLO 0x4000 /* underflow (late memory) */ |
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#define TMD3_BUFF 0x8000 /* buffering error (no ENP) */ |
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|
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/* rx_head flags */ |
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#define RMD1_ENP 0x01 /* end of packet */ |
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#define RMD1_STP 0x02 /* start of packet */ |
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#define RMD1_BUFF 0x04 /* buffer error */ |
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#define RMD1_CRC 0x08 /* CRC error */ |
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#define RMD1_OFLO 0x10 /* overflow */ |
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#define RMD1_FRAM 0x20 /* framing error */ |
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#define RMD1_ERR 0x40 /* error summary */ |
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#define RMD1_OWN 0x80 /* ownership (set: ship owns) */ |
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|
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#define RMD1_OWN_CHIP RMD1_OWN |
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#define RMD1_OWN_HOST 0 |
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|
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/* register names */ |
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#define CSR0 0 /* mode/status */ |
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#define CSR1 1 /* init block addr (low) */ |
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#define CSR2 2 /* init block addr (high) */ |
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#define CSR3 3 /* misc */ |
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#define CSR8 8 /* address filter */ |
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#define CSR15 15 /* promiscuous mode */ |
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/* CSR0 */ |
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/* (R=readable, W=writeable, S=set on write, C=clear on write) */ |
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#define CSR0_INIT 0x0001 /* initialize (RS) */ |
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#define CSR0_STRT 0x0002 /* start (RS) */ |
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#define CSR0_STOP 0x0004 /* stop (RS) */ |
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#define CSR0_TDMD 0x0008 /* transmit demand (RS) */ |
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#define CSR0_TXON 0x0010 /* transmitter on (R) */ |
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#define CSR0_RXON 0x0020 /* receiver on (R) */ |
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#define CSR0_INEA 0x0040 /* interrupt enable (RW) */ |
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#define CSR0_INTR 0x0080 /* interrupt active (R) */ |
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#define CSR0_IDON 0x0100 /* initialization done (RC) */ |
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#define CSR0_TINT 0x0200 /* transmitter interrupt (RC) */ |
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#define CSR0_RINT 0x0400 /* receiver interrupt (RC) */ |
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#define CSR0_MERR 0x0800 /* memory error (RC) */ |
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#define CSR0_MISS 0x1000 /* missed frame (RC) */ |
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#define CSR0_CERR 0x2000 /* carrier error (no heartbeat :-) (RC) */ |
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#define CSR0_BABL 0x4000 /* babble: tx-ed too many bits (RC) */ |
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#define CSR0_ERR 0x8000 /* error (RC) */ |
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/* CSR3 */ |
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#define CSR3_BCON 0x0001 /* byte control */ |
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#define CSR3_ACON 0x0002 /* ALE control */ |
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#define CSR3_BSWP 0x0004 /* byte swap (1=big endian) */ |
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|
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/***************************** Prototypes *****************************/ |
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static int lance_probe( struct net_device *dev); |
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static int lance_open( struct net_device *dev ); |
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static void lance_init_ring( struct net_device *dev ); |
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static netdev_tx_t lance_start_xmit(struct sk_buff *skb, |
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struct net_device *dev); |
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static irqreturn_t lance_interrupt( int irq, void *dev_id); |
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static int lance_rx( struct net_device *dev ); |
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static int lance_close( struct net_device *dev ); |
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static void set_multicast_list( struct net_device *dev ); |
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/************************* End of Prototypes **************************/ |
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struct net_device * __init sun3lance_probe(int unit) |
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{ |
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struct net_device *dev; |
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static int found; |
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int err = -ENODEV; |
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if (!MACH_IS_SUN3 && !MACH_IS_SUN3X) |
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return ERR_PTR(-ENODEV); |
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/* check that this machine has an onboard lance */ |
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switch(idprom->id_machtype) { |
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case SM_SUN3|SM_3_50: |
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case SM_SUN3|SM_3_60: |
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case SM_SUN3X|SM_3_80: |
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/* these machines have lance */ |
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break; |
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default: |
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return ERR_PTR(-ENODEV); |
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} |
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if (found) |
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return ERR_PTR(-ENODEV); |
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dev = alloc_etherdev(sizeof(struct lance_private)); |
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if (!dev) |
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return ERR_PTR(-ENOMEM); |
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if (unit >= 0) { |
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sprintf(dev->name, "eth%d", unit); |
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netdev_boot_setup_check(dev); |
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} |
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if (!lance_probe(dev)) |
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goto out; |
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err = register_netdev(dev); |
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if (err) |
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goto out1; |
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found = 1; |
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return dev; |
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out1: |
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#ifdef CONFIG_SUN3 |
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iounmap((void __iomem *)dev->base_addr); |
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#endif |
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out: |
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free_netdev(dev); |
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return ERR_PTR(err); |
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} |
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static const struct net_device_ops lance_netdev_ops = { |
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.ndo_open = lance_open, |
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.ndo_stop = lance_close, |
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.ndo_start_xmit = lance_start_xmit, |
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.ndo_set_rx_mode = set_multicast_list, |
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.ndo_set_mac_address = NULL, |
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.ndo_validate_addr = eth_validate_addr, |
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}; |
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static int __init lance_probe( struct net_device *dev) |
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{ |
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unsigned long ioaddr; |
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struct lance_private *lp; |
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int i; |
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static int did_version; |
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volatile unsigned short *ioaddr_probe; |
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unsigned short tmp1, tmp2; |
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#ifdef CONFIG_SUN3 |
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ioaddr = (unsigned long)ioremap(LANCE_OBIO, PAGE_SIZE); |
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if (!ioaddr) |
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return 0; |
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#else |
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ioaddr = SUN3X_LANCE; |
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#endif |
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/* test to see if there's really a lance here */ |
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/* (CSRO_INIT shouldn't be readable) */ |
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ioaddr_probe = (volatile unsigned short *)ioaddr; |
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tmp1 = ioaddr_probe[0]; |
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tmp2 = ioaddr_probe[1]; |
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ioaddr_probe[1] = CSR0; |
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ioaddr_probe[0] = CSR0_INIT | CSR0_STOP; |
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if(ioaddr_probe[0] != CSR0_STOP) { |
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ioaddr_probe[0] = tmp1; |
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ioaddr_probe[1] = tmp2; |
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#ifdef CONFIG_SUN3 |
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iounmap((void __iomem *)ioaddr); |
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#endif |
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return 0; |
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} |
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lp = netdev_priv(dev); |
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/* XXX - leak? */ |
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MEM = dvma_malloc_align(sizeof(struct lance_memory), 0x10000); |
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if (MEM == NULL) { |
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#ifdef CONFIG_SUN3 |
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iounmap((void __iomem *)ioaddr); |
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#endif |
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printk(KERN_WARNING "SUN3 Lance couldn't allocate DVMA memory\n"); |
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return 0; |
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} |
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lp->iobase = (volatile unsigned short *)ioaddr; |
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dev->base_addr = (unsigned long)ioaddr; /* informational only */ |
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REGA(CSR0) = CSR0_STOP; |
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if (request_irq(LANCE_IRQ, lance_interrupt, 0, "SUN3 Lance", dev) < 0) { |
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#ifdef CONFIG_SUN3 |
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iounmap((void __iomem *)ioaddr); |
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#endif |
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dvma_free((void *)MEM); |
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printk(KERN_WARNING "SUN3 Lance unable to allocate IRQ\n"); |
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return 0; |
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} |
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dev->irq = (unsigned short)LANCE_IRQ; |
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printk("%s: SUN3 Lance at io %#lx, mem %#lx, irq %d, hwaddr ", |
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dev->name, |
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(unsigned long)ioaddr, |
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(unsigned long)MEM, |
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dev->irq); |
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|
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/* copy in the ethernet address from the prom */ |
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for(i = 0; i < 6 ; i++) |
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dev->dev_addr[i] = idprom->id_ethaddr[i]; |
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|
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/* tell the card it's ether address, bytes swapped */ |
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MEM->init.hwaddr[0] = dev->dev_addr[1]; |
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MEM->init.hwaddr[1] = dev->dev_addr[0]; |
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MEM->init.hwaddr[2] = dev->dev_addr[3]; |
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MEM->init.hwaddr[3] = dev->dev_addr[2]; |
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MEM->init.hwaddr[4] = dev->dev_addr[5]; |
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MEM->init.hwaddr[5] = dev->dev_addr[4]; |
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printk("%pM\n", dev->dev_addr); |
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MEM->init.mode = 0x0000; |
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MEM->init.filter[0] = 0x00000000; |
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MEM->init.filter[1] = 0x00000000; |
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MEM->init.rdra = dvma_vtob(MEM->rx_head); |
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MEM->init.rlen = (RX_LOG_RING_SIZE << 13) | |
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(dvma_vtob(MEM->rx_head) >> 16); |
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MEM->init.tdra = dvma_vtob(MEM->tx_head); |
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MEM->init.tlen = (TX_LOG_RING_SIZE << 13) | |
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(dvma_vtob(MEM->tx_head) >> 16); |
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|
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DPRINTK(2, ("initaddr: %08lx rx_ring: %08lx tx_ring: %08lx\n", |
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dvma_vtob(&(MEM->init)), dvma_vtob(MEM->rx_head), |
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(dvma_vtob(MEM->tx_head)))); |
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|
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if (did_version++ == 0) |
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printk( version ); |
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dev->netdev_ops = &lance_netdev_ops; |
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// KLUDGE -- REMOVE ME |
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set_bit(__LINK_STATE_PRESENT, &dev->state); |
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return 1; |
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} |
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static int lance_open( struct net_device *dev ) |
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{ |
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struct lance_private *lp = netdev_priv(dev); |
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int i; |
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|
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DPRINTK( 2, ( "%s: lance_open()\n", dev->name )); |
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REGA(CSR0) = CSR0_STOP; |
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lance_init_ring(dev); |
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|
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/* From now on, AREG is kept to point to CSR0 */ |
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REGA(CSR0) = CSR0_INIT; |
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|
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i = 1000000; |
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while (--i > 0) |
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if (DREG & CSR0_IDON) |
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break; |
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if (i <= 0 || (DREG & CSR0_ERR)) { |
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DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n", |
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dev->name, i, DREG )); |
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DREG = CSR0_STOP; |
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return -EIO; |
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} |
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|
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DREG = CSR0_IDON | CSR0_STRT | CSR0_INEA; |
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|
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netif_start_queue(dev); |
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|
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DPRINTK( 2, ( "%s: LANCE is open, csr0 %04x\n", dev->name, DREG )); |
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|
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return 0; |
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} |
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|
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|
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/* Initialize the LANCE Rx and Tx rings. */ |
|
|
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static void lance_init_ring( struct net_device *dev ) |
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{ |
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struct lance_private *lp = netdev_priv(dev); |
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int i; |
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|
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lp->lock = 0; |
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lp->tx_full = 0; |
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lp->new_rx = lp->new_tx = 0; |
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lp->old_rx = lp->old_tx = 0; |
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|
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for( i = 0; i < TX_RING_SIZE; i++ ) { |
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MEM->tx_head[i].base = dvma_vtob(MEM->tx_data[i]); |
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MEM->tx_head[i].flag = 0; |
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MEM->tx_head[i].base_hi = |
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(dvma_vtob(MEM->tx_data[i])) >>16; |
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MEM->tx_head[i].length = 0; |
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MEM->tx_head[i].misc = 0; |
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} |
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for( i = 0; i < RX_RING_SIZE; i++ ) { |
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MEM->rx_head[i].base = dvma_vtob(MEM->rx_data[i]); |
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MEM->rx_head[i].flag = RMD1_OWN_CHIP; |
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MEM->rx_head[i].base_hi = |
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(dvma_vtob(MEM->rx_data[i])) >> 16; |
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MEM->rx_head[i].buf_length = -PKT_BUF_SZ | 0xf000; |
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MEM->rx_head[i].msg_length = 0; |
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} |
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|
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/* tell the card it's ether address, bytes swapped */ |
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MEM->init.hwaddr[0] = dev->dev_addr[1]; |
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MEM->init.hwaddr[1] = dev->dev_addr[0]; |
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MEM->init.hwaddr[2] = dev->dev_addr[3]; |
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MEM->init.hwaddr[3] = dev->dev_addr[2]; |
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MEM->init.hwaddr[4] = dev->dev_addr[5]; |
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MEM->init.hwaddr[5] = dev->dev_addr[4]; |
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|
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MEM->init.mode = 0x0000; |
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MEM->init.filter[0] = 0x00000000; |
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MEM->init.filter[1] = 0x00000000; |
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MEM->init.rdra = dvma_vtob(MEM->rx_head); |
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MEM->init.rlen = (RX_LOG_RING_SIZE << 13) | |
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(dvma_vtob(MEM->rx_head) >> 16); |
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MEM->init.tdra = dvma_vtob(MEM->tx_head); |
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MEM->init.tlen = (TX_LOG_RING_SIZE << 13) | |
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(dvma_vtob(MEM->tx_head) >> 16); |
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|
|
|
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/* tell the lance the address of its init block */ |
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REGA(CSR1) = dvma_vtob(&(MEM->init)); |
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REGA(CSR2) = dvma_vtob(&(MEM->init)) >> 16; |
|
|
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#ifdef CONFIG_SUN3X |
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REGA(CSR3) = CSR3_BSWP | CSR3_ACON | CSR3_BCON; |
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#else |
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REGA(CSR3) = CSR3_BSWP; |
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#endif |
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|
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} |
|
|
|
|
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static netdev_tx_t |
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lance_start_xmit(struct sk_buff *skb, struct net_device *dev) |
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{ |
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struct lance_private *lp = netdev_priv(dev); |
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int entry, len; |
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struct lance_tx_head *head; |
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unsigned long flags; |
|
|
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DPRINTK( 1, ( "%s: transmit start.\n", |
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dev->name)); |
|
|
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/* Transmitter timeout, serious problems. */ |
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if (netif_queue_stopped(dev)) { |
|
int tickssofar = jiffies - dev_trans_start(dev); |
|
if (tickssofar < HZ/5) |
|
return NETDEV_TX_BUSY; |
|
|
|
DPRINTK( 1, ( "%s: transmit timed out, status %04x, resetting.\n", |
|
dev->name, DREG )); |
|
DREG = CSR0_STOP; |
|
/* |
|
* Always set BSWP after a STOP as STOP puts it back into |
|
* little endian mode. |
|
*/ |
|
REGA(CSR3) = CSR3_BSWP; |
|
dev->stats.tx_errors++; |
|
|
|
if(lance_debug >= 2) { |
|
int i; |
|
printk("Ring data: old_tx %d new_tx %d%s new_rx %d\n", |
|
lp->old_tx, lp->new_tx, |
|
lp->tx_full ? " (full)" : "", |
|
lp->new_rx ); |
|
for( i = 0 ; i < RX_RING_SIZE; i++ ) |
|
printk( "rx #%d: base=%04x blen=%04x mlen=%04x\n", |
|
i, MEM->rx_head[i].base, |
|
-MEM->rx_head[i].buf_length, |
|
MEM->rx_head[i].msg_length); |
|
for( i = 0 ; i < TX_RING_SIZE; i++ ) |
|
printk("tx #%d: base=%04x len=%04x misc=%04x\n", |
|
i, MEM->tx_head[i].base, |
|
-MEM->tx_head[i].length, |
|
MEM->tx_head[i].misc ); |
|
} |
|
|
|
lance_init_ring(dev); |
|
REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT; |
|
|
|
netif_start_queue(dev); |
|
|
|
return NETDEV_TX_OK; |
|
} |
|
|
|
|
|
/* Block a timer-based transmit from overlapping. This could better be |
|
done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */ |
|
|
|
/* Block a timer-based transmit from overlapping with us by |
|
stopping the queue for a bit... */ |
|
|
|
netif_stop_queue(dev); |
|
|
|
if (test_and_set_bit( 0, (void*)&lp->lock ) != 0) { |
|
printk( "%s: tx queue lock!.\n", dev->name); |
|
/* don't clear dev->tbusy flag. */ |
|
return NETDEV_TX_BUSY; |
|
} |
|
|
|
AREG = CSR0; |
|
DPRINTK( 2, ( "%s: lance_start_xmit() called, csr0 %4.4x.\n", |
|
dev->name, DREG )); |
|
|
|
#ifdef CONFIG_SUN3X |
|
/* this weirdness doesn't appear on sun3... */ |
|
if(!(DREG & CSR0_INIT)) { |
|
DPRINTK( 1, ("INIT not set, reinitializing...\n")); |
|
REGA( CSR0 ) = CSR0_STOP; |
|
lance_init_ring(dev); |
|
REGA( CSR0 ) = CSR0_INIT | CSR0_STRT; |
|
} |
|
#endif |
|
|
|
/* Fill in a Tx ring entry */ |
|
#if 0 |
|
if (lance_debug >= 2) { |
|
printk( "%s: TX pkt %d type 0x%04x" |
|
" from %s to %s" |
|
" data at 0x%08x len %d\n", |
|
dev->name, lp->new_tx, ((u_short *)skb->data)[6], |
|
DEV_ADDR(&skb->data[6]), DEV_ADDR(skb->data), |
|
(int)skb->data, (int)skb->len ); |
|
} |
|
#endif |
|
/* We're not prepared for the int until the last flags are set/reset. |
|
* And the int may happen already after setting the OWN_CHIP... */ |
|
local_irq_save(flags); |
|
|
|
/* Mask to ring buffer boundary. */ |
|
entry = lp->new_tx; |
|
head = &(MEM->tx_head[entry]); |
|
|
|
/* Caution: the write order is important here, set the "ownership" bits |
|
* last. |
|
*/ |
|
|
|
/* the sun3's lance needs it's buffer padded to the minimum |
|
size */ |
|
len = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN; |
|
|
|
// head->length = -len; |
|
head->length = (-len) | 0xf000; |
|
head->misc = 0; |
|
|
|
skb_copy_from_linear_data(skb, PKTBUF_ADDR(head), skb->len); |
|
if (len != skb->len) |
|
memset(PKTBUF_ADDR(head) + skb->len, 0, len-skb->len); |
|
|
|
head->flag = TMD1_OWN_CHIP | TMD1_ENP | TMD1_STP; |
|
lp->new_tx = (lp->new_tx + 1) & TX_RING_MOD_MASK; |
|
dev->stats.tx_bytes += skb->len; |
|
|
|
/* Trigger an immediate send poll. */ |
|
REGA(CSR0) = CSR0_INEA | CSR0_TDMD | CSR0_STRT; |
|
AREG = CSR0; |
|
DPRINTK( 2, ( "%s: lance_start_xmit() exiting, csr0 %4.4x.\n", |
|
dev->name, DREG )); |
|
dev_kfree_skb(skb); |
|
|
|
lp->lock = 0; |
|
if ((MEM->tx_head[(entry+1) & TX_RING_MOD_MASK].flag & TMD1_OWN) == |
|
TMD1_OWN_HOST) |
|
netif_start_queue(dev); |
|
|
|
local_irq_restore(flags); |
|
|
|
return NETDEV_TX_OK; |
|
} |
|
|
|
/* The LANCE interrupt handler. */ |
|
|
|
static irqreturn_t lance_interrupt( int irq, void *dev_id) |
|
{ |
|
struct net_device *dev = dev_id; |
|
struct lance_private *lp = netdev_priv(dev); |
|
int csr0; |
|
|
|
still_more: |
|
flush_cache_all(); |
|
|
|
AREG = CSR0; |
|
csr0 = DREG; |
|
|
|
/* ack interrupts */ |
|
DREG = csr0 & (CSR0_TINT | CSR0_RINT | CSR0_IDON); |
|
|
|
/* clear errors */ |
|
if(csr0 & CSR0_ERR) |
|
DREG = CSR0_BABL | CSR0_MERR | CSR0_CERR | CSR0_MISS; |
|
|
|
|
|
DPRINTK( 2, ( "%s: interrupt csr0=%04x new csr=%04x.\n", |
|
dev->name, csr0, DREG )); |
|
|
|
if (csr0 & CSR0_TINT) { /* Tx-done interrupt */ |
|
int old_tx = lp->old_tx; |
|
|
|
// if(lance_debug >= 3) { |
|
// int i; |
|
// |
|
// printk("%s: tx int\n", dev->name); |
|
// |
|
// for(i = 0; i < TX_RING_SIZE; i++) |
|
// printk("ring %d flag=%04x\n", i, |
|
// MEM->tx_head[i].flag); |
|
// } |
|
|
|
while( old_tx != lp->new_tx) { |
|
struct lance_tx_head *head = &(MEM->tx_head[old_tx]); |
|
|
|
DPRINTK(3, ("on tx_ring %d\n", old_tx)); |
|
|
|
if (head->flag & TMD1_OWN_CHIP) |
|
break; /* It still hasn't been Txed */ |
|
|
|
if (head->flag & TMD1_ERR) { |
|
int status = head->misc; |
|
dev->stats.tx_errors++; |
|
if (status & TMD3_RTRY) dev->stats.tx_aborted_errors++; |
|
if (status & TMD3_LCAR) dev->stats.tx_carrier_errors++; |
|
if (status & TMD3_LCOL) dev->stats.tx_window_errors++; |
|
if (status & (TMD3_UFLO | TMD3_BUFF)) { |
|
dev->stats.tx_fifo_errors++; |
|
printk("%s: Tx FIFO error\n", |
|
dev->name); |
|
REGA(CSR0) = CSR0_STOP; |
|
REGA(CSR3) = CSR3_BSWP; |
|
lance_init_ring(dev); |
|
REGA(CSR0) = CSR0_STRT | CSR0_INEA; |
|
return IRQ_HANDLED; |
|
} |
|
} else if(head->flag & (TMD1_ENP | TMD1_STP)) { |
|
|
|
head->flag &= ~(TMD1_ENP | TMD1_STP); |
|
if(head->flag & (TMD1_ONE | TMD1_MORE)) |
|
dev->stats.collisions++; |
|
|
|
dev->stats.tx_packets++; |
|
DPRINTK(3, ("cleared tx ring %d\n", old_tx)); |
|
} |
|
old_tx = (old_tx +1) & TX_RING_MOD_MASK; |
|
} |
|
|
|
lp->old_tx = old_tx; |
|
} |
|
|
|
|
|
if (netif_queue_stopped(dev)) { |
|
/* The ring is no longer full, clear tbusy. */ |
|
netif_start_queue(dev); |
|
netif_wake_queue(dev); |
|
} |
|
|
|
if (csr0 & CSR0_RINT) /* Rx interrupt */ |
|
lance_rx( dev ); |
|
|
|
/* Log misc errors. */ |
|
if (csr0 & CSR0_BABL) dev->stats.tx_errors++; /* Tx babble. */ |
|
if (csr0 & CSR0_MISS) dev->stats.rx_errors++; /* Missed a Rx frame. */ |
|
if (csr0 & CSR0_MERR) { |
|
DPRINTK( 1, ( "%s: Bus master arbitration failure (?!?), " |
|
"status %04x.\n", dev->name, csr0 )); |
|
/* Restart the chip. */ |
|
REGA(CSR0) = CSR0_STOP; |
|
REGA(CSR3) = CSR3_BSWP; |
|
lance_init_ring(dev); |
|
REGA(CSR0) = CSR0_STRT | CSR0_INEA; |
|
} |
|
|
|
|
|
/* Clear any other interrupt, and set interrupt enable. */ |
|
// DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR | |
|
// CSR0_IDON | CSR0_INEA; |
|
|
|
REGA(CSR0) = CSR0_INEA; |
|
|
|
if(DREG & (CSR0_RINT | CSR0_TINT)) { |
|
DPRINTK(2, ("restarting interrupt, csr0=%#04x\n", DREG)); |
|
goto still_more; |
|
} |
|
|
|
DPRINTK( 2, ( "%s: exiting interrupt, csr0=%#04x.\n", |
|
dev->name, DREG )); |
|
return IRQ_HANDLED; |
|
} |
|
|
|
/* get packet, toss into skbuff */ |
|
static int lance_rx( struct net_device *dev ) |
|
{ |
|
struct lance_private *lp = netdev_priv(dev); |
|
int entry = lp->new_rx; |
|
|
|
/* If we own the next entry, it's a new packet. Send it up. */ |
|
while( (MEM->rx_head[entry].flag & RMD1_OWN) == RMD1_OWN_HOST ) { |
|
struct lance_rx_head *head = &(MEM->rx_head[entry]); |
|
int status = head->flag; |
|
|
|
if (status != (RMD1_ENP|RMD1_STP)) { /* There was an error. */ |
|
/* There is a tricky error noted by John Murphy, |
|
<[email protected]> to Russ Nelson: Even with |
|
full-sized buffers it's possible for a jabber packet to use two |
|
buffers, with only the last correctly noting the error. */ |
|
if (status & RMD1_ENP) /* Only count a general error at the */ |
|
dev->stats.rx_errors++; /* end of a packet.*/ |
|
if (status & RMD1_FRAM) dev->stats.rx_frame_errors++; |
|
if (status & RMD1_OFLO) dev->stats.rx_over_errors++; |
|
if (status & RMD1_CRC) dev->stats.rx_crc_errors++; |
|
if (status & RMD1_BUFF) dev->stats.rx_fifo_errors++; |
|
head->flag &= (RMD1_ENP|RMD1_STP); |
|
} else { |
|
/* Malloc up new buffer, compatible with net-3. */ |
|
// short pkt_len = head->msg_length;// & 0xfff; |
|
short pkt_len = (head->msg_length & 0xfff) - 4; |
|
struct sk_buff *skb; |
|
|
|
if (pkt_len < 60) { |
|
printk( "%s: Runt packet!\n", dev->name ); |
|
dev->stats.rx_errors++; |
|
} |
|
else { |
|
skb = netdev_alloc_skb(dev, pkt_len + 2); |
|
if (skb == NULL) { |
|
dev->stats.rx_dropped++; |
|
head->msg_length = 0; |
|
head->flag |= RMD1_OWN_CHIP; |
|
lp->new_rx = (lp->new_rx+1) & |
|
RX_RING_MOD_MASK; |
|
} |
|
|
|
#if 0 |
|
if (lance_debug >= 3) { |
|
u_char *data = PKTBUF_ADDR(head); |
|
printk("%s: RX pkt %d type 0x%04x" |
|
" from %pM to %pM", |
|
dev->name, lp->new_tx, ((u_short *)data)[6], |
|
&data[6], data); |
|
|
|
printk(" data %02x %02x %02x %02x %02x %02x %02x %02x " |
|
"len %d at %08x\n", |
|
data[15], data[16], data[17], data[18], |
|
data[19], data[20], data[21], data[22], |
|
pkt_len, data); |
|
} |
|
#endif |
|
if (lance_debug >= 3) { |
|
u_char *data = PKTBUF_ADDR(head); |
|
printk( "%s: RX pkt %d type 0x%04x len %d\n ", dev->name, entry, ((u_short *)data)[6], pkt_len); |
|
} |
|
|
|
|
|
skb_reserve( skb, 2 ); /* 16 byte align */ |
|
skb_put( skb, pkt_len ); /* Make room */ |
|
skb_copy_to_linear_data(skb, |
|
PKTBUF_ADDR(head), |
|
pkt_len); |
|
|
|
skb->protocol = eth_type_trans( skb, dev ); |
|
netif_rx( skb ); |
|
dev->stats.rx_packets++; |
|
dev->stats.rx_bytes += pkt_len; |
|
} |
|
} |
|
|
|
// head->buf_length = -PKT_BUF_SZ | 0xf000; |
|
head->msg_length = 0; |
|
head->flag = RMD1_OWN_CHIP; |
|
|
|
entry = lp->new_rx = (lp->new_rx +1) & RX_RING_MOD_MASK; |
|
} |
|
|
|
/* From lance.c (Donald Becker): */ |
|
/* We should check that at least two ring entries are free. |
|
If not, we should free one and mark stats->rx_dropped++. */ |
|
|
|
return 0; |
|
} |
|
|
|
|
|
static int lance_close( struct net_device *dev ) |
|
{ |
|
struct lance_private *lp = netdev_priv(dev); |
|
|
|
netif_stop_queue(dev); |
|
|
|
AREG = CSR0; |
|
|
|
DPRINTK( 2, ( "%s: Shutting down ethercard, status was %2.2x.\n", |
|
dev->name, DREG )); |
|
|
|
/* We stop the LANCE here -- it occasionally polls |
|
memory if we don't. */ |
|
DREG = CSR0_STOP; |
|
return 0; |
|
} |
|
|
|
|
|
/* Set or clear the multicast filter for this adaptor. |
|
num_addrs == -1 Promiscuous mode, receive all packets |
|
num_addrs == 0 Normal mode, clear multicast list |
|
num_addrs > 0 Multicast mode, receive normal and MC packets, and do |
|
best-effort filtering. |
|
*/ |
|
|
|
/* completely untested on a sun3 */ |
|
static void set_multicast_list( struct net_device *dev ) |
|
{ |
|
struct lance_private *lp = netdev_priv(dev); |
|
|
|
if(netif_queue_stopped(dev)) |
|
/* Only possible if board is already started */ |
|
return; |
|
|
|
/* We take the simple way out and always enable promiscuous mode. */ |
|
DREG = CSR0_STOP; /* Temporarily stop the lance. */ |
|
|
|
if (dev->flags & IFF_PROMISC) { |
|
/* Log any net taps. */ |
|
DPRINTK( 3, ( "%s: Promiscuous mode enabled.\n", dev->name )); |
|
REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */ |
|
} else { |
|
short multicast_table[4]; |
|
int num_addrs = netdev_mc_count(dev); |
|
int i; |
|
/* We don't use the multicast table, but rely on upper-layer |
|
* filtering. */ |
|
memset( multicast_table, (num_addrs == 0) ? 0 : -1, |
|
sizeof(multicast_table) ); |
|
for( i = 0; i < 4; i++ ) |
|
REGA( CSR8+i ) = multicast_table[i]; |
|
REGA( CSR15 ) = 0; /* Unset promiscuous mode */ |
|
} |
|
|
|
/* |
|
* Always set BSWP after a STOP as STOP puts it back into |
|
* little endian mode. |
|
*/ |
|
REGA( CSR3 ) = CSR3_BSWP; |
|
|
|
/* Resume normal operation and reset AREG to CSR0 */ |
|
REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT; |
|
} |
|
|
|
|
|
#ifdef MODULE |
|
|
|
static struct net_device *sun3lance_dev; |
|
|
|
int __init init_module(void) |
|
{ |
|
sun3lance_dev = sun3lance_probe(-1); |
|
return PTR_ERR_OR_ZERO(sun3lance_dev); |
|
} |
|
|
|
void __exit cleanup_module(void) |
|
{ |
|
unregister_netdev(sun3lance_dev); |
|
#ifdef CONFIG_SUN3 |
|
iounmap((void __iomem *)sun3lance_dev->base_addr); |
|
#endif |
|
free_netdev(sun3lance_dev); |
|
} |
|
|
|
#endif /* MODULE */ |
|
|
|
|