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1027 lines
24 KiB
1027 lines
24 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* tw9910 Video Driver |
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* |
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* Copyright (C) 2017 Jacopo Mondi <[email protected]> |
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* |
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* Copyright (C) 2008 Renesas Solutions Corp. |
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* Kuninori Morimoto <[email protected]> |
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* |
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* Based on ov772x driver, |
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* |
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* Copyright (C) 2008 Kuninori Morimoto <[email protected]> |
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* Copyright 2006-7 Jonathan Corbet <[email protected]> |
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* Copyright (C) 2008 Magnus Damm |
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* Copyright (C) 2008, Guennadi Liakhovetski <[email protected]> |
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*/ |
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|
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#include <linux/clk.h> |
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#include <linux/delay.h> |
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#include <linux/gpio/consumer.h> |
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#include <linux/i2c.h> |
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#include <linux/init.h> |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/slab.h> |
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#include <linux/v4l2-mediabus.h> |
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#include <linux/videodev2.h> |
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#include <media/i2c/tw9910.h> |
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#include <media/v4l2-subdev.h> |
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#define GET_ID(val) ((val & 0xF8) >> 3) |
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#define GET_REV(val) (val & 0x07) |
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|
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/* |
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* register offset |
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*/ |
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#define ID 0x00 /* Product ID Code Register */ |
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#define STATUS1 0x01 /* Chip Status Register I */ |
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#define INFORM 0x02 /* Input Format */ |
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#define OPFORM 0x03 /* Output Format Control Register */ |
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#define DLYCTR 0x04 /* Hysteresis and HSYNC Delay Control */ |
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#define OUTCTR1 0x05 /* Output Control I */ |
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#define ACNTL1 0x06 /* Analog Control Register 1 */ |
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#define CROP_HI 0x07 /* Cropping Register, High */ |
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#define VDELAY_LO 0x08 /* Vertical Delay Register, Low */ |
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#define VACTIVE_LO 0x09 /* Vertical Active Register, Low */ |
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#define HDELAY_LO 0x0A /* Horizontal Delay Register, Low */ |
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#define HACTIVE_LO 0x0B /* Horizontal Active Register, Low */ |
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#define CNTRL1 0x0C /* Control Register I */ |
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#define VSCALE_LO 0x0D /* Vertical Scaling Register, Low */ |
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#define SCALE_HI 0x0E /* Scaling Register, High */ |
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#define HSCALE_LO 0x0F /* Horizontal Scaling Register, Low */ |
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#define BRIGHT 0x10 /* BRIGHTNESS Control Register */ |
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#define CONTRAST 0x11 /* CONTRAST Control Register */ |
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#define SHARPNESS 0x12 /* SHARPNESS Control Register I */ |
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#define SAT_U 0x13 /* Chroma (U) Gain Register */ |
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#define SAT_V 0x14 /* Chroma (V) Gain Register */ |
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#define HUE 0x15 /* Hue Control Register */ |
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#define CORING1 0x17 |
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#define CORING2 0x18 /* Coring and IF compensation */ |
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#define VBICNTL 0x19 /* VBI Control Register */ |
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#define ACNTL2 0x1A /* Analog Control 2 */ |
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#define OUTCTR2 0x1B /* Output Control 2 */ |
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#define SDT 0x1C /* Standard Selection */ |
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#define SDTR 0x1D /* Standard Recognition */ |
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#define TEST 0x1F /* Test Control Register */ |
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#define CLMPG 0x20 /* Clamping Gain */ |
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#define IAGC 0x21 /* Individual AGC Gain */ |
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#define AGCGAIN 0x22 /* AGC Gain */ |
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#define PEAKWT 0x23 /* White Peak Threshold */ |
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#define CLMPL 0x24 /* Clamp level */ |
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#define SYNCT 0x25 /* Sync Amplitude */ |
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#define MISSCNT 0x26 /* Sync Miss Count Register */ |
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#define PCLAMP 0x27 /* Clamp Position Register */ |
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#define VCNTL1 0x28 /* Vertical Control I */ |
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#define VCNTL2 0x29 /* Vertical Control II */ |
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#define CKILL 0x2A /* Color Killer Level Control */ |
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#define COMB 0x2B /* Comb Filter Control */ |
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#define LDLY 0x2C /* Luma Delay and H Filter Control */ |
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#define MISC1 0x2D /* Miscellaneous Control I */ |
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#define LOOP 0x2E /* LOOP Control Register */ |
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#define MISC2 0x2F /* Miscellaneous Control II */ |
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#define MVSN 0x30 /* Macrovision Detection */ |
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#define STATUS2 0x31 /* Chip STATUS II */ |
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#define HFREF 0x32 /* H monitor */ |
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#define CLMD 0x33 /* CLAMP MODE */ |
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#define IDCNTL 0x34 /* ID Detection Control */ |
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#define CLCNTL1 0x35 /* Clamp Control I */ |
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#define ANAPLLCTL 0x4C |
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#define VBIMIN 0x4D |
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#define HSLOWCTL 0x4E |
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#define WSS3 0x4F |
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#define FILLDATA 0x50 |
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#define SDID 0x51 |
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#define DID 0x52 |
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#define WSS1 0x53 |
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#define WSS2 0x54 |
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#define VVBI 0x55 |
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#define LCTL6 0x56 |
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#define LCTL7 0x57 |
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#define LCTL8 0x58 |
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#define LCTL9 0x59 |
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#define LCTL10 0x5A |
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#define LCTL11 0x5B |
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#define LCTL12 0x5C |
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#define LCTL13 0x5D |
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#define LCTL14 0x5E |
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#define LCTL15 0x5F |
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#define LCTL16 0x60 |
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#define LCTL17 0x61 |
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#define LCTL18 0x62 |
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#define LCTL19 0x63 |
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#define LCTL20 0x64 |
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#define LCTL21 0x65 |
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#define LCTL22 0x66 |
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#define LCTL23 0x67 |
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#define LCTL24 0x68 |
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#define LCTL25 0x69 |
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#define LCTL26 0x6A |
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#define HSBEGIN 0x6B |
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#define HSEND 0x6C |
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#define OVSDLY 0x6D |
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#define OVSEND 0x6E |
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#define VBIDELAY 0x6F |
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/* |
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* register detail |
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*/ |
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/* INFORM */ |
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#define FC27_ON 0x40 /* 1 : Input crystal clock frequency is 27MHz */ |
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#define FC27_FF 0x00 /* 0 : Square pixel mode. */ |
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/* Must use 24.54MHz for 60Hz field rate */ |
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/* source or 29.5MHz for 50Hz field rate */ |
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#define IFSEL_S 0x10 /* 01 : S-video decoding */ |
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#define IFSEL_C 0x00 /* 00 : Composite video decoding */ |
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/* Y input video selection */ |
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#define YSEL_M0 0x00 /* 00 : Mux0 selected */ |
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#define YSEL_M1 0x04 /* 01 : Mux1 selected */ |
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#define YSEL_M2 0x08 /* 10 : Mux2 selected */ |
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#define YSEL_M3 0x10 /* 11 : Mux3 selected */ |
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/* OPFORM */ |
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#define MODE 0x80 /* 0 : CCIR601 compatible YCrCb 4:2:2 format */ |
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/* 1 : ITU-R-656 compatible data sequence format */ |
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#define LEN 0x40 /* 0 : 8-bit YCrCb 4:2:2 output format */ |
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/* 1 : 16-bit YCrCb 4:2:2 output format.*/ |
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#define LLCMODE 0x20 /* 1 : LLC output mode. */ |
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/* 0 : free-run output mode */ |
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#define AINC 0x10 /* Serial interface auto-indexing control */ |
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/* 0 : auto-increment */ |
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/* 1 : non-auto */ |
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#define VSCTL 0x08 /* 1 : Vertical out ctrl by DVALID */ |
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/* 0 : Vertical out ctrl by HACTIVE and DVALID */ |
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#define OEN_TRI_SEL_MASK 0x07 |
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#define OEN_TRI_SEL_ALL_ON 0x00 /* Enable output for Rev0/Rev1 */ |
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#define OEN_TRI_SEL_ALL_OFF_r0 0x06 /* All tri-stated for Rev0 */ |
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#define OEN_TRI_SEL_ALL_OFF_r1 0x07 /* All tri-stated for Rev1 */ |
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|
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/* OUTCTR1 */ |
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#define VSP_LO 0x00 /* 0 : VS pin output polarity is active low */ |
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#define VSP_HI 0x80 /* 1 : VS pin output polarity is active high. */ |
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/* VS pin output control */ |
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#define VSSL_VSYNC 0x00 /* 0 : VSYNC */ |
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#define VSSL_VACT 0x10 /* 1 : VACT */ |
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#define VSSL_FIELD 0x20 /* 2 : FIELD */ |
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#define VSSL_VVALID 0x30 /* 3 : VVALID */ |
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#define VSSL_ZERO 0x70 /* 7 : 0 */ |
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#define HSP_LOW 0x00 /* 0 : HS pin output polarity is active low */ |
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#define HSP_HI 0x08 /* 1 : HS pin output polarity is active high.*/ |
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/* HS pin output control */ |
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#define HSSL_HACT 0x00 /* 0 : HACT */ |
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#define HSSL_HSYNC 0x01 /* 1 : HSYNC */ |
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#define HSSL_DVALID 0x02 /* 2 : DVALID */ |
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#define HSSL_HLOCK 0x03 /* 3 : HLOCK */ |
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#define HSSL_ASYNCW 0x04 /* 4 : ASYNCW */ |
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#define HSSL_ZERO 0x07 /* 7 : 0 */ |
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|
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/* ACNTL1 */ |
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#define SRESET 0x80 /* resets the device to its default state |
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* but all register content remain unchanged. |
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* This bit is self-resetting. |
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*/ |
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#define ACNTL1_PDN_MASK 0x0e |
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#define CLK_PDN 0x08 /* system clock power down */ |
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#define Y_PDN 0x04 /* Luma ADC power down */ |
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#define C_PDN 0x02 /* Chroma ADC power down */ |
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/* ACNTL2 */ |
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#define ACNTL2_PDN_MASK 0x40 |
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#define PLL_PDN 0x40 /* PLL power down */ |
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|
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/* VBICNTL */ |
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/* RTSEL : control the real time signal output from the MPOUT pin */ |
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#define RTSEL_MASK 0x07 |
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#define RTSEL_VLOSS 0x00 /* 0000 = Video loss */ |
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#define RTSEL_HLOCK 0x01 /* 0001 = H-lock */ |
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#define RTSEL_SLOCK 0x02 /* 0010 = S-lock */ |
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#define RTSEL_VLOCK 0x03 /* 0011 = V-lock */ |
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#define RTSEL_MONO 0x04 /* 0100 = MONO */ |
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#define RTSEL_DET50 0x05 /* 0101 = DET50 */ |
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#define RTSEL_FIELD 0x06 /* 0110 = FIELD */ |
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#define RTSEL_RTCO 0x07 /* 0111 = RTCO ( Real Time Control ) */ |
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/* HSYNC start and end are constant for now */ |
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#define HSYNC_START 0x0260 |
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#define HSYNC_END 0x0300 |
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/* |
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* structure |
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*/ |
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struct regval_list { |
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unsigned char reg_num; |
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unsigned char value; |
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}; |
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struct tw9910_scale_ctrl { |
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char *name; |
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unsigned short width; |
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unsigned short height; |
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u16 hscale; |
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u16 vscale; |
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}; |
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struct tw9910_priv { |
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struct v4l2_subdev subdev; |
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struct clk *clk; |
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struct tw9910_video_info *info; |
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struct gpio_desc *pdn_gpio; |
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struct gpio_desc *rstb_gpio; |
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const struct tw9910_scale_ctrl *scale; |
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v4l2_std_id norm; |
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u32 revision; |
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}; |
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static const struct tw9910_scale_ctrl tw9910_ntsc_scales[] = { |
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{ |
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.name = "NTSC SQ", |
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.width = 640, |
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.height = 480, |
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.hscale = 0x0100, |
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.vscale = 0x0100, |
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}, |
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{ |
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.name = "NTSC CCIR601", |
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.width = 720, |
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.height = 480, |
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.hscale = 0x0100, |
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.vscale = 0x0100, |
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}, |
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{ |
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.name = "NTSC SQ (CIF)", |
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.width = 320, |
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.height = 240, |
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.hscale = 0x0200, |
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.vscale = 0x0200, |
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}, |
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{ |
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.name = "NTSC CCIR601 (CIF)", |
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.width = 360, |
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.height = 240, |
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.hscale = 0x0200, |
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.vscale = 0x0200, |
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}, |
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{ |
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.name = "NTSC SQ (QCIF)", |
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.width = 160, |
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.height = 120, |
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.hscale = 0x0400, |
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.vscale = 0x0400, |
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}, |
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{ |
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.name = "NTSC CCIR601 (QCIF)", |
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.width = 180, |
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.height = 120, |
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.hscale = 0x0400, |
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.vscale = 0x0400, |
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}, |
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}; |
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static const struct tw9910_scale_ctrl tw9910_pal_scales[] = { |
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{ |
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.name = "PAL SQ", |
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.width = 768, |
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.height = 576, |
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.hscale = 0x0100, |
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.vscale = 0x0100, |
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}, |
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{ |
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.name = "PAL CCIR601", |
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.width = 720, |
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.height = 576, |
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.hscale = 0x0100, |
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.vscale = 0x0100, |
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}, |
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{ |
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.name = "PAL SQ (CIF)", |
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.width = 384, |
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.height = 288, |
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.hscale = 0x0200, |
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.vscale = 0x0200, |
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}, |
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{ |
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.name = "PAL CCIR601 (CIF)", |
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.width = 360, |
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.height = 288, |
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.hscale = 0x0200, |
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.vscale = 0x0200, |
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}, |
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{ |
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.name = "PAL SQ (QCIF)", |
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.width = 192, |
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.height = 144, |
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.hscale = 0x0400, |
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.vscale = 0x0400, |
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}, |
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{ |
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.name = "PAL CCIR601 (QCIF)", |
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.width = 180, |
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.height = 144, |
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.hscale = 0x0400, |
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.vscale = 0x0400, |
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}, |
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}; |
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/* |
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* general function |
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*/ |
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static struct tw9910_priv *to_tw9910(const struct i2c_client *client) |
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{ |
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return container_of(i2c_get_clientdata(client), struct tw9910_priv, |
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subdev); |
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} |
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static int tw9910_mask_set(struct i2c_client *client, u8 command, |
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u8 mask, u8 set) |
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{ |
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s32 val = i2c_smbus_read_byte_data(client, command); |
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if (val < 0) |
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return val; |
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val &= ~mask; |
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val |= set & mask; |
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return i2c_smbus_write_byte_data(client, command, val); |
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} |
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static int tw9910_set_scale(struct i2c_client *client, |
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const struct tw9910_scale_ctrl *scale) |
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{ |
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int ret; |
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ret = i2c_smbus_write_byte_data(client, SCALE_HI, |
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(scale->vscale & 0x0F00) >> 4 | |
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(scale->hscale & 0x0F00) >> 8); |
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if (ret < 0) |
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return ret; |
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ret = i2c_smbus_write_byte_data(client, HSCALE_LO, |
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scale->hscale & 0x00FF); |
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if (ret < 0) |
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return ret; |
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ret = i2c_smbus_write_byte_data(client, VSCALE_LO, |
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scale->vscale & 0x00FF); |
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return ret; |
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} |
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static int tw9910_set_hsync(struct i2c_client *client) |
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{ |
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struct tw9910_priv *priv = to_tw9910(client); |
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int ret; |
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/* bit 10 - 3 */ |
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ret = i2c_smbus_write_byte_data(client, HSBEGIN, |
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(HSYNC_START & 0x07F8) >> 3); |
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if (ret < 0) |
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return ret; |
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/* bit 10 - 3 */ |
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ret = i2c_smbus_write_byte_data(client, HSEND, |
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(HSYNC_END & 0x07F8) >> 3); |
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if (ret < 0) |
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return ret; |
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|
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/* So far only revisions 0 and 1 have been seen. */ |
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/* bit 2 - 0 */ |
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if (priv->revision == 1) |
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ret = tw9910_mask_set(client, HSLOWCTL, 0x77, |
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(HSYNC_START & 0x0007) << 4 | |
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(HSYNC_END & 0x0007)); |
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return ret; |
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} |
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static void tw9910_reset(struct i2c_client *client) |
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{ |
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tw9910_mask_set(client, ACNTL1, SRESET, SRESET); |
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usleep_range(1000, 5000); |
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} |
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|
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static int tw9910_power(struct i2c_client *client, int enable) |
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{ |
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int ret; |
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u8 acntl1; |
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u8 acntl2; |
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if (enable) { |
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acntl1 = 0; |
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acntl2 = 0; |
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} else { |
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acntl1 = CLK_PDN | Y_PDN | C_PDN; |
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acntl2 = PLL_PDN; |
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} |
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ret = tw9910_mask_set(client, ACNTL1, ACNTL1_PDN_MASK, acntl1); |
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if (ret < 0) |
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return ret; |
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|
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return tw9910_mask_set(client, ACNTL2, ACNTL2_PDN_MASK, acntl2); |
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} |
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static const struct tw9910_scale_ctrl *tw9910_select_norm(v4l2_std_id norm, |
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u32 width, u32 height) |
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{ |
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const struct tw9910_scale_ctrl *scale; |
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const struct tw9910_scale_ctrl *ret = NULL; |
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__u32 diff = 0xffffffff, tmp; |
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int size, i; |
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|
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if (norm & V4L2_STD_NTSC) { |
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scale = tw9910_ntsc_scales; |
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size = ARRAY_SIZE(tw9910_ntsc_scales); |
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} else if (norm & V4L2_STD_PAL) { |
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scale = tw9910_pal_scales; |
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size = ARRAY_SIZE(tw9910_pal_scales); |
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} else { |
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return NULL; |
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} |
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|
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for (i = 0; i < size; i++) { |
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tmp = abs(width - scale[i].width) + |
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abs(height - scale[i].height); |
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if (tmp < diff) { |
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diff = tmp; |
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ret = scale + i; |
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} |
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} |
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|
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return ret; |
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} |
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|
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/* |
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* subdevice operations |
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*/ |
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static int tw9910_s_stream(struct v4l2_subdev *sd, int enable) |
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{ |
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struct i2c_client *client = v4l2_get_subdevdata(sd); |
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struct tw9910_priv *priv = to_tw9910(client); |
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u8 val; |
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int ret; |
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|
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if (!enable) { |
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switch (priv->revision) { |
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case 0: |
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val = OEN_TRI_SEL_ALL_OFF_r0; |
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break; |
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case 1: |
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val = OEN_TRI_SEL_ALL_OFF_r1; |
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break; |
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default: |
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dev_err(&client->dev, "un-supported revision\n"); |
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return -EINVAL; |
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} |
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} else { |
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val = OEN_TRI_SEL_ALL_ON; |
|
|
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if (!priv->scale) { |
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dev_err(&client->dev, "norm select error\n"); |
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return -EPERM; |
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} |
|
|
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dev_dbg(&client->dev, "%s %dx%d\n", |
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priv->scale->name, |
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priv->scale->width, |
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priv->scale->height); |
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} |
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|
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ret = tw9910_mask_set(client, OPFORM, OEN_TRI_SEL_MASK, val); |
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if (ret < 0) |
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return ret; |
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|
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return tw9910_power(client, enable); |
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} |
|
|
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static int tw9910_g_std(struct v4l2_subdev *sd, v4l2_std_id *norm) |
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{ |
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struct i2c_client *client = v4l2_get_subdevdata(sd); |
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struct tw9910_priv *priv = to_tw9910(client); |
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|
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*norm = priv->norm; |
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|
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return 0; |
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} |
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|
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static int tw9910_s_std(struct v4l2_subdev *sd, v4l2_std_id norm) |
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{ |
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struct i2c_client *client = v4l2_get_subdevdata(sd); |
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struct tw9910_priv *priv = to_tw9910(client); |
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const unsigned int hact = 720; |
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const unsigned int hdelay = 15; |
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unsigned int vact; |
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unsigned int vdelay; |
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int ret; |
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|
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if (!(norm & (V4L2_STD_NTSC | V4L2_STD_PAL))) |
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return -EINVAL; |
|
|
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priv->norm = norm; |
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if (norm & V4L2_STD_525_60) { |
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vact = 240; |
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vdelay = 18; |
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ret = tw9910_mask_set(client, VVBI, 0x10, 0x10); |
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} else { |
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vact = 288; |
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vdelay = 24; |
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ret = tw9910_mask_set(client, VVBI, 0x10, 0x00); |
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} |
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if (!ret) |
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ret = i2c_smbus_write_byte_data(client, CROP_HI, |
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((vdelay >> 2) & 0xc0) | |
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((vact >> 4) & 0x30) | |
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((hdelay >> 6) & 0x0c) | |
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((hact >> 8) & 0x03)); |
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if (!ret) |
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ret = i2c_smbus_write_byte_data(client, VDELAY_LO, |
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vdelay & 0xff); |
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if (!ret) |
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ret = i2c_smbus_write_byte_data(client, VACTIVE_LO, |
|
vact & 0xff); |
|
|
|
return ret; |
|
} |
|
|
|
#ifdef CONFIG_VIDEO_ADV_DEBUG |
|
static int tw9910_g_register(struct v4l2_subdev *sd, |
|
struct v4l2_dbg_register *reg) |
|
{ |
|
struct i2c_client *client = v4l2_get_subdevdata(sd); |
|
int ret; |
|
|
|
if (reg->reg > 0xff) |
|
return -EINVAL; |
|
|
|
reg->size = 1; |
|
ret = i2c_smbus_read_byte_data(client, reg->reg); |
|
if (ret < 0) |
|
return ret; |
|
|
|
/* |
|
* ret = int |
|
* reg->val = __u64 |
|
*/ |
|
reg->val = (__u64)ret; |
|
|
|
return 0; |
|
} |
|
|
|
static int tw9910_s_register(struct v4l2_subdev *sd, |
|
const struct v4l2_dbg_register *reg) |
|
{ |
|
struct i2c_client *client = v4l2_get_subdevdata(sd); |
|
|
|
if (reg->reg > 0xff || |
|
reg->val > 0xff) |
|
return -EINVAL; |
|
|
|
return i2c_smbus_write_byte_data(client, reg->reg, reg->val); |
|
} |
|
#endif |
|
|
|
static void tw9910_set_gpio_value(struct gpio_desc *desc, int value) |
|
{ |
|
if (desc) { |
|
gpiod_set_value(desc, value); |
|
usleep_range(500, 1000); |
|
} |
|
} |
|
|
|
static int tw9910_power_on(struct tw9910_priv *priv) |
|
{ |
|
struct i2c_client *client = v4l2_get_subdevdata(&priv->subdev); |
|
int ret; |
|
|
|
if (priv->clk) { |
|
ret = clk_prepare_enable(priv->clk); |
|
if (ret) |
|
return ret; |
|
} |
|
|
|
tw9910_set_gpio_value(priv->pdn_gpio, 0); |
|
|
|
/* |
|
* FIXME: The reset signal is connected to a shared GPIO on some |
|
* platforms (namely the SuperH Migo-R). Until a framework becomes |
|
* available to handle this cleanly, request the GPIO temporarily |
|
* to avoid conflicts. |
|
*/ |
|
priv->rstb_gpio = gpiod_get_optional(&client->dev, "rstb", |
|
GPIOD_OUT_LOW); |
|
if (IS_ERR(priv->rstb_gpio)) { |
|
dev_info(&client->dev, "Unable to get GPIO \"rstb\""); |
|
clk_disable_unprepare(priv->clk); |
|
tw9910_set_gpio_value(priv->pdn_gpio, 1); |
|
return PTR_ERR(priv->rstb_gpio); |
|
} |
|
|
|
if (priv->rstb_gpio) { |
|
tw9910_set_gpio_value(priv->rstb_gpio, 1); |
|
tw9910_set_gpio_value(priv->rstb_gpio, 0); |
|
|
|
gpiod_put(priv->rstb_gpio); |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static int tw9910_power_off(struct tw9910_priv *priv) |
|
{ |
|
clk_disable_unprepare(priv->clk); |
|
tw9910_set_gpio_value(priv->pdn_gpio, 1); |
|
|
|
return 0; |
|
} |
|
|
|
static int tw9910_s_power(struct v4l2_subdev *sd, int on) |
|
{ |
|
struct i2c_client *client = v4l2_get_subdevdata(sd); |
|
struct tw9910_priv *priv = to_tw9910(client); |
|
|
|
return on ? tw9910_power_on(priv) : tw9910_power_off(priv); |
|
} |
|
|
|
static int tw9910_set_frame(struct v4l2_subdev *sd, u32 *width, u32 *height) |
|
{ |
|
struct i2c_client *client = v4l2_get_subdevdata(sd); |
|
struct tw9910_priv *priv = to_tw9910(client); |
|
int ret = -EINVAL; |
|
u8 val; |
|
|
|
/* Select suitable norm. */ |
|
priv->scale = tw9910_select_norm(priv->norm, *width, *height); |
|
if (!priv->scale) |
|
goto tw9910_set_fmt_error; |
|
|
|
/* Reset hardware. */ |
|
tw9910_reset(client); |
|
|
|
/* Set bus width. */ |
|
val = 0x00; |
|
if (priv->info->buswidth == 16) |
|
val = LEN; |
|
|
|
ret = tw9910_mask_set(client, OPFORM, LEN, val); |
|
if (ret < 0) |
|
goto tw9910_set_fmt_error; |
|
|
|
/* Select MPOUT behavior. */ |
|
switch (priv->info->mpout) { |
|
case TW9910_MPO_VLOSS: |
|
val = RTSEL_VLOSS; break; |
|
case TW9910_MPO_HLOCK: |
|
val = RTSEL_HLOCK; break; |
|
case TW9910_MPO_SLOCK: |
|
val = RTSEL_SLOCK; break; |
|
case TW9910_MPO_VLOCK: |
|
val = RTSEL_VLOCK; break; |
|
case TW9910_MPO_MONO: |
|
val = RTSEL_MONO; break; |
|
case TW9910_MPO_DET50: |
|
val = RTSEL_DET50; break; |
|
case TW9910_MPO_FIELD: |
|
val = RTSEL_FIELD; break; |
|
case TW9910_MPO_RTCO: |
|
val = RTSEL_RTCO; break; |
|
default: |
|
val = 0; |
|
} |
|
|
|
ret = tw9910_mask_set(client, VBICNTL, RTSEL_MASK, val); |
|
if (ret < 0) |
|
goto tw9910_set_fmt_error; |
|
|
|
/* Set scale. */ |
|
ret = tw9910_set_scale(client, priv->scale); |
|
if (ret < 0) |
|
goto tw9910_set_fmt_error; |
|
|
|
/* Set hsync. */ |
|
ret = tw9910_set_hsync(client); |
|
if (ret < 0) |
|
goto tw9910_set_fmt_error; |
|
|
|
*width = priv->scale->width; |
|
*height = priv->scale->height; |
|
|
|
return ret; |
|
|
|
tw9910_set_fmt_error: |
|
|
|
tw9910_reset(client); |
|
priv->scale = NULL; |
|
|
|
return ret; |
|
} |
|
|
|
static int tw9910_get_selection(struct v4l2_subdev *sd, |
|
struct v4l2_subdev_pad_config *cfg, |
|
struct v4l2_subdev_selection *sel) |
|
{ |
|
struct i2c_client *client = v4l2_get_subdevdata(sd); |
|
struct tw9910_priv *priv = to_tw9910(client); |
|
|
|
if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE) |
|
return -EINVAL; |
|
/* Only CROP, CROP_DEFAULT and CROP_BOUNDS are supported. */ |
|
if (sel->target > V4L2_SEL_TGT_CROP_BOUNDS) |
|
return -EINVAL; |
|
|
|
sel->r.left = 0; |
|
sel->r.top = 0; |
|
if (priv->norm & V4L2_STD_NTSC) { |
|
sel->r.width = 640; |
|
sel->r.height = 480; |
|
} else { |
|
sel->r.width = 768; |
|
sel->r.height = 576; |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static int tw9910_get_fmt(struct v4l2_subdev *sd, |
|
struct v4l2_subdev_pad_config *cfg, |
|
struct v4l2_subdev_format *format) |
|
{ |
|
struct v4l2_mbus_framefmt *mf = &format->format; |
|
struct i2c_client *client = v4l2_get_subdevdata(sd); |
|
struct tw9910_priv *priv = to_tw9910(client); |
|
|
|
if (format->pad) |
|
return -EINVAL; |
|
|
|
if (!priv->scale) { |
|
priv->scale = tw9910_select_norm(priv->norm, 640, 480); |
|
if (!priv->scale) |
|
return -EINVAL; |
|
} |
|
|
|
mf->width = priv->scale->width; |
|
mf->height = priv->scale->height; |
|
mf->code = MEDIA_BUS_FMT_UYVY8_2X8; |
|
mf->colorspace = V4L2_COLORSPACE_SMPTE170M; |
|
mf->field = V4L2_FIELD_INTERLACED_BT; |
|
|
|
return 0; |
|
} |
|
|
|
static int tw9910_s_fmt(struct v4l2_subdev *sd, |
|
struct v4l2_mbus_framefmt *mf) |
|
{ |
|
u32 width = mf->width, height = mf->height; |
|
int ret; |
|
|
|
WARN_ON(mf->field != V4L2_FIELD_ANY && |
|
mf->field != V4L2_FIELD_INTERLACED_BT); |
|
|
|
/* Check color format. */ |
|
if (mf->code != MEDIA_BUS_FMT_UYVY8_2X8) |
|
return -EINVAL; |
|
|
|
mf->colorspace = V4L2_COLORSPACE_SMPTE170M; |
|
|
|
ret = tw9910_set_frame(sd, &width, &height); |
|
if (ret) |
|
return ret; |
|
|
|
mf->width = width; |
|
mf->height = height; |
|
|
|
return 0; |
|
} |
|
|
|
static int tw9910_set_fmt(struct v4l2_subdev *sd, |
|
struct v4l2_subdev_pad_config *cfg, |
|
struct v4l2_subdev_format *format) |
|
{ |
|
struct v4l2_mbus_framefmt *mf = &format->format; |
|
struct i2c_client *client = v4l2_get_subdevdata(sd); |
|
struct tw9910_priv *priv = to_tw9910(client); |
|
const struct tw9910_scale_ctrl *scale; |
|
|
|
if (format->pad) |
|
return -EINVAL; |
|
|
|
if (mf->field == V4L2_FIELD_ANY) { |
|
mf->field = V4L2_FIELD_INTERLACED_BT; |
|
} else if (mf->field != V4L2_FIELD_INTERLACED_BT) { |
|
dev_err(&client->dev, "Field type %d invalid\n", mf->field); |
|
return -EINVAL; |
|
} |
|
|
|
mf->code = MEDIA_BUS_FMT_UYVY8_2X8; |
|
mf->colorspace = V4L2_COLORSPACE_SMPTE170M; |
|
|
|
/* Select suitable norm. */ |
|
scale = tw9910_select_norm(priv->norm, mf->width, mf->height); |
|
if (!scale) |
|
return -EINVAL; |
|
|
|
mf->width = scale->width; |
|
mf->height = scale->height; |
|
|
|
if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) |
|
return tw9910_s_fmt(sd, mf); |
|
|
|
cfg->try_fmt = *mf; |
|
|
|
return 0; |
|
} |
|
|
|
static int tw9910_video_probe(struct i2c_client *client) |
|
{ |
|
struct tw9910_priv *priv = to_tw9910(client); |
|
s32 id; |
|
int ret; |
|
|
|
/* TW9910 only use 8 or 16 bit bus width. */ |
|
if (priv->info->buswidth != 16 && priv->info->buswidth != 8) { |
|
dev_err(&client->dev, "bus width error\n"); |
|
return -ENODEV; |
|
} |
|
|
|
ret = tw9910_s_power(&priv->subdev, 1); |
|
if (ret < 0) |
|
return ret; |
|
|
|
/* |
|
* Check and show Product ID. |
|
* So far only revisions 0 and 1 have been seen. |
|
*/ |
|
id = i2c_smbus_read_byte_data(client, ID); |
|
priv->revision = GET_REV(id); |
|
id = GET_ID(id); |
|
|
|
if (id != 0x0b || priv->revision > 0x01) { |
|
dev_err(&client->dev, "Product ID error %x:%x\n", |
|
id, priv->revision); |
|
ret = -ENODEV; |
|
goto done; |
|
} |
|
|
|
dev_info(&client->dev, "tw9910 Product ID %0x:%0x\n", |
|
id, priv->revision); |
|
|
|
priv->norm = V4L2_STD_NTSC; |
|
priv->scale = &tw9910_ntsc_scales[0]; |
|
|
|
done: |
|
tw9910_s_power(&priv->subdev, 0); |
|
|
|
return ret; |
|
} |
|
|
|
static const struct v4l2_subdev_core_ops tw9910_subdev_core_ops = { |
|
#ifdef CONFIG_VIDEO_ADV_DEBUG |
|
.g_register = tw9910_g_register, |
|
.s_register = tw9910_s_register, |
|
#endif |
|
.s_power = tw9910_s_power, |
|
}; |
|
|
|
static int tw9910_enum_mbus_code(struct v4l2_subdev *sd, |
|
struct v4l2_subdev_pad_config *cfg, |
|
struct v4l2_subdev_mbus_code_enum *code) |
|
{ |
|
if (code->pad || code->index) |
|
return -EINVAL; |
|
|
|
code->code = MEDIA_BUS_FMT_UYVY8_2X8; |
|
|
|
return 0; |
|
} |
|
|
|
static int tw9910_g_tvnorms(struct v4l2_subdev *sd, v4l2_std_id *norm) |
|
{ |
|
*norm = V4L2_STD_NTSC | V4L2_STD_PAL; |
|
|
|
return 0; |
|
} |
|
|
|
static const struct v4l2_subdev_video_ops tw9910_subdev_video_ops = { |
|
.s_std = tw9910_s_std, |
|
.g_std = tw9910_g_std, |
|
.s_stream = tw9910_s_stream, |
|
.g_tvnorms = tw9910_g_tvnorms, |
|
}; |
|
|
|
static const struct v4l2_subdev_pad_ops tw9910_subdev_pad_ops = { |
|
.enum_mbus_code = tw9910_enum_mbus_code, |
|
.get_selection = tw9910_get_selection, |
|
.get_fmt = tw9910_get_fmt, |
|
.set_fmt = tw9910_set_fmt, |
|
}; |
|
|
|
static const struct v4l2_subdev_ops tw9910_subdev_ops = { |
|
.core = &tw9910_subdev_core_ops, |
|
.video = &tw9910_subdev_video_ops, |
|
.pad = &tw9910_subdev_pad_ops, |
|
}; |
|
|
|
/* |
|
* i2c_driver function |
|
*/ |
|
|
|
static int tw9910_probe(struct i2c_client *client, |
|
const struct i2c_device_id *did) |
|
|
|
{ |
|
struct tw9910_priv *priv; |
|
struct tw9910_video_info *info; |
|
struct i2c_adapter *adapter = client->adapter; |
|
int ret; |
|
|
|
if (!client->dev.platform_data) { |
|
dev_err(&client->dev, "TW9910: missing platform data!\n"); |
|
return -EINVAL; |
|
} |
|
|
|
info = client->dev.platform_data; |
|
|
|
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { |
|
dev_err(&client->dev, |
|
"I2C-Adapter doesn't support I2C_FUNC_SMBUS_BYTE_DATA\n"); |
|
return -EIO; |
|
} |
|
|
|
priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL); |
|
if (!priv) |
|
return -ENOMEM; |
|
|
|
priv->info = info; |
|
|
|
v4l2_i2c_subdev_init(&priv->subdev, client, &tw9910_subdev_ops); |
|
|
|
priv->clk = clk_get(&client->dev, "xti"); |
|
if (PTR_ERR(priv->clk) == -ENOENT) { |
|
priv->clk = NULL; |
|
} else if (IS_ERR(priv->clk)) { |
|
dev_err(&client->dev, "Unable to get xti clock\n"); |
|
return PTR_ERR(priv->clk); |
|
} |
|
|
|
priv->pdn_gpio = gpiod_get_optional(&client->dev, "pdn", |
|
GPIOD_OUT_HIGH); |
|
if (IS_ERR(priv->pdn_gpio)) { |
|
dev_info(&client->dev, "Unable to get GPIO \"pdn\""); |
|
ret = PTR_ERR(priv->pdn_gpio); |
|
goto error_clk_put; |
|
} |
|
|
|
ret = tw9910_video_probe(client); |
|
if (ret < 0) |
|
goto error_gpio_put; |
|
|
|
ret = v4l2_async_register_subdev(&priv->subdev); |
|
if (ret) |
|
goto error_gpio_put; |
|
|
|
return ret; |
|
|
|
error_gpio_put: |
|
if (priv->pdn_gpio) |
|
gpiod_put(priv->pdn_gpio); |
|
error_clk_put: |
|
clk_put(priv->clk); |
|
|
|
return ret; |
|
} |
|
|
|
static int tw9910_remove(struct i2c_client *client) |
|
{ |
|
struct tw9910_priv *priv = to_tw9910(client); |
|
|
|
if (priv->pdn_gpio) |
|
gpiod_put(priv->pdn_gpio); |
|
clk_put(priv->clk); |
|
v4l2_async_unregister_subdev(&priv->subdev); |
|
|
|
return 0; |
|
} |
|
|
|
static const struct i2c_device_id tw9910_id[] = { |
|
{ "tw9910", 0 }, |
|
{ } |
|
}; |
|
MODULE_DEVICE_TABLE(i2c, tw9910_id); |
|
|
|
static struct i2c_driver tw9910_i2c_driver = { |
|
.driver = { |
|
.name = "tw9910", |
|
}, |
|
.probe = tw9910_probe, |
|
.remove = tw9910_remove, |
|
.id_table = tw9910_id, |
|
}; |
|
|
|
module_i2c_driver(tw9910_i2c_driver); |
|
|
|
MODULE_DESCRIPTION("V4L2 driver for TW9910 video decoder"); |
|
MODULE_AUTHOR("Kuninori Morimoto"); |
|
MODULE_LICENSE("GPL v2");
|
|
|