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162 lines
3.5 KiB
162 lines
3.5 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Copyright (C) 2016 NVIDIA CORPORATION, All Rights Reserved. |
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*/ |
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#include <linux/module.h> |
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#include <linux/clk.h> |
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#include <linux/of_device.h> |
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#include <linux/of_irq.h> |
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#include <linux/irqchip/arm-gic.h> |
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#include <linux/platform_device.h> |
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#include <linux/pm_runtime.h> |
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#include <linux/slab.h> |
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struct gic_clk_data { |
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unsigned int num_clocks; |
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const char *const *clocks; |
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}; |
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struct gic_chip_pm { |
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struct gic_chip_data *chip_data; |
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const struct gic_clk_data *clk_data; |
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struct clk_bulk_data *clks; |
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}; |
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static int gic_runtime_resume(struct device *dev) |
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{ |
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struct gic_chip_pm *chip_pm = dev_get_drvdata(dev); |
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struct gic_chip_data *gic = chip_pm->chip_data; |
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const struct gic_clk_data *data = chip_pm->clk_data; |
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int ret; |
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ret = clk_bulk_prepare_enable(data->num_clocks, chip_pm->clks); |
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if (ret) { |
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dev_err(dev, "clk_enable failed: %d\n", ret); |
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return ret; |
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} |
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/* |
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* On the very first resume, the pointer to chip_pm->chip_data |
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* will be NULL and this is intentional, because we do not |
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* want to restore the GIC on the very first resume. So if |
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* the pointer is not valid just return. |
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*/ |
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if (!gic) |
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return 0; |
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gic_dist_restore(gic); |
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gic_cpu_restore(gic); |
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return 0; |
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} |
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static int gic_runtime_suspend(struct device *dev) |
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{ |
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struct gic_chip_pm *chip_pm = dev_get_drvdata(dev); |
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struct gic_chip_data *gic = chip_pm->chip_data; |
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const struct gic_clk_data *data = chip_pm->clk_data; |
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gic_dist_save(gic); |
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gic_cpu_save(gic); |
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clk_bulk_disable_unprepare(data->num_clocks, chip_pm->clks); |
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return 0; |
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} |
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static int gic_probe(struct platform_device *pdev) |
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{ |
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struct device *dev = &pdev->dev; |
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const struct gic_clk_data *data; |
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struct gic_chip_pm *chip_pm; |
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int ret, irq, i; |
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data = of_device_get_match_data(&pdev->dev); |
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if (!data) { |
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dev_err(&pdev->dev, "no device match found\n"); |
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return -ENODEV; |
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} |
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chip_pm = devm_kzalloc(dev, sizeof(*chip_pm), GFP_KERNEL); |
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if (!chip_pm) |
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return -ENOMEM; |
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irq = irq_of_parse_and_map(dev->of_node, 0); |
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if (!irq) { |
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dev_err(dev, "no parent interrupt found!\n"); |
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return -EINVAL; |
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} |
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chip_pm->clks = devm_kcalloc(dev, data->num_clocks, |
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sizeof(*chip_pm->clks), GFP_KERNEL); |
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if (!chip_pm->clks) |
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return -ENOMEM; |
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for (i = 0; i < data->num_clocks; i++) |
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chip_pm->clks[i].id = data->clocks[i]; |
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ret = devm_clk_bulk_get(dev, data->num_clocks, chip_pm->clks); |
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if (ret) |
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goto irq_dispose; |
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chip_pm->clk_data = data; |
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dev_set_drvdata(dev, chip_pm); |
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pm_runtime_enable(dev); |
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ret = pm_runtime_get_sync(dev); |
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if (ret < 0) |
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goto rpm_disable; |
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ret = gic_of_init_child(dev, &chip_pm->chip_data, irq); |
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if (ret) |
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goto rpm_put; |
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pm_runtime_put(dev); |
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dev_info(dev, "GIC IRQ controller registered\n"); |
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return 0; |
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rpm_put: |
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pm_runtime_put_sync(dev); |
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rpm_disable: |
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pm_runtime_disable(dev); |
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irq_dispose: |
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irq_dispose_mapping(irq); |
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return ret; |
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} |
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static const struct dev_pm_ops gic_pm_ops = { |
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SET_RUNTIME_PM_OPS(gic_runtime_suspend, |
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gic_runtime_resume, NULL) |
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SET_LATE_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, |
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pm_runtime_force_resume) |
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}; |
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static const char * const gic400_clocks[] = { |
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"clk", |
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}; |
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static const struct gic_clk_data gic400_data = { |
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.num_clocks = ARRAY_SIZE(gic400_clocks), |
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.clocks = gic400_clocks, |
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}; |
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static const struct of_device_id gic_match[] = { |
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{ .compatible = "nvidia,tegra210-agic", .data = &gic400_data }, |
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{}, |
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}; |
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MODULE_DEVICE_TABLE(of, gic_match); |
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static struct platform_driver gic_driver = { |
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.probe = gic_probe, |
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.driver = { |
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.name = "gic", |
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.of_match_table = gic_match, |
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.pm = &gic_pm_ops, |
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} |
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}; |
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builtin_platform_driver(gic_driver);
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