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903 lines
22 KiB
903 lines
22 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* System Control and Management Interface (SCMI) Performance Protocol |
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* |
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* Copyright (C) 2018 ARM Ltd. |
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*/ |
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|
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#define pr_fmt(fmt) "SCMI Notifications PERF - " fmt |
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#include <linux/bits.h> |
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#include <linux/of.h> |
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#include <linux/io.h> |
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#include <linux/io-64-nonatomic-hi-lo.h> |
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#include <linux/platform_device.h> |
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#include <linux/pm_opp.h> |
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#include <linux/scmi_protocol.h> |
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#include <linux/sort.h> |
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#include "common.h" |
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#include "notify.h" |
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enum scmi_performance_protocol_cmd { |
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PERF_DOMAIN_ATTRIBUTES = 0x3, |
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PERF_DESCRIBE_LEVELS = 0x4, |
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PERF_LIMITS_SET = 0x5, |
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PERF_LIMITS_GET = 0x6, |
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PERF_LEVEL_SET = 0x7, |
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PERF_LEVEL_GET = 0x8, |
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PERF_NOTIFY_LIMITS = 0x9, |
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PERF_NOTIFY_LEVEL = 0xa, |
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PERF_DESCRIBE_FASTCHANNEL = 0xb, |
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}; |
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struct scmi_opp { |
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u32 perf; |
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u32 power; |
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u32 trans_latency_us; |
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}; |
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struct scmi_msg_resp_perf_attributes { |
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__le16 num_domains; |
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__le16 flags; |
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#define POWER_SCALE_IN_MILLIWATT(x) ((x) & BIT(0)) |
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__le32 stats_addr_low; |
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__le32 stats_addr_high; |
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__le32 stats_size; |
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}; |
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struct scmi_msg_resp_perf_domain_attributes { |
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__le32 flags; |
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#define SUPPORTS_SET_LIMITS(x) ((x) & BIT(31)) |
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#define SUPPORTS_SET_PERF_LVL(x) ((x) & BIT(30)) |
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#define SUPPORTS_PERF_LIMIT_NOTIFY(x) ((x) & BIT(29)) |
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#define SUPPORTS_PERF_LEVEL_NOTIFY(x) ((x) & BIT(28)) |
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#define SUPPORTS_PERF_FASTCHANNELS(x) ((x) & BIT(27)) |
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__le32 rate_limit_us; |
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__le32 sustained_freq_khz; |
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__le32 sustained_perf_level; |
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u8 name[SCMI_MAX_STR_SIZE]; |
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}; |
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struct scmi_msg_perf_describe_levels { |
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__le32 domain; |
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__le32 level_index; |
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}; |
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struct scmi_perf_set_limits { |
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__le32 domain; |
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__le32 max_level; |
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__le32 min_level; |
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}; |
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struct scmi_perf_get_limits { |
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__le32 max_level; |
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__le32 min_level; |
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}; |
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struct scmi_perf_set_level { |
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__le32 domain; |
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__le32 level; |
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}; |
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struct scmi_perf_notify_level_or_limits { |
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__le32 domain; |
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__le32 notify_enable; |
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}; |
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struct scmi_perf_limits_notify_payld { |
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__le32 agent_id; |
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__le32 domain_id; |
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__le32 range_max; |
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__le32 range_min; |
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}; |
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struct scmi_perf_level_notify_payld { |
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__le32 agent_id; |
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__le32 domain_id; |
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__le32 performance_level; |
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}; |
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struct scmi_msg_resp_perf_describe_levels { |
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__le16 num_returned; |
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__le16 num_remaining; |
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struct { |
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__le32 perf_val; |
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__le32 power; |
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__le16 transition_latency_us; |
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__le16 reserved; |
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} opp[]; |
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}; |
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struct scmi_perf_get_fc_info { |
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__le32 domain; |
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__le32 message_id; |
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}; |
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struct scmi_msg_resp_perf_desc_fc { |
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__le32 attr; |
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#define SUPPORTS_DOORBELL(x) ((x) & BIT(0)) |
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#define DOORBELL_REG_WIDTH(x) FIELD_GET(GENMASK(2, 1), (x)) |
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__le32 rate_limit; |
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__le32 chan_addr_low; |
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__le32 chan_addr_high; |
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__le32 chan_size; |
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__le32 db_addr_low; |
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__le32 db_addr_high; |
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__le32 db_set_lmask; |
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__le32 db_set_hmask; |
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__le32 db_preserve_lmask; |
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__le32 db_preserve_hmask; |
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}; |
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struct scmi_fc_db_info { |
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int width; |
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u64 set; |
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u64 mask; |
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void __iomem *addr; |
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}; |
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struct scmi_fc_info { |
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void __iomem *level_set_addr; |
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void __iomem *limit_set_addr; |
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void __iomem *level_get_addr; |
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void __iomem *limit_get_addr; |
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struct scmi_fc_db_info *level_set_db; |
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struct scmi_fc_db_info *limit_set_db; |
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}; |
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struct perf_dom_info { |
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bool set_limits; |
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bool set_perf; |
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bool perf_limit_notify; |
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bool perf_level_notify; |
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bool perf_fastchannels; |
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u32 opp_count; |
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u32 sustained_freq_khz; |
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u32 sustained_perf_level; |
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u32 mult_factor; |
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char name[SCMI_MAX_STR_SIZE]; |
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struct scmi_opp opp[MAX_OPPS]; |
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struct scmi_fc_info *fc_info; |
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}; |
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struct scmi_perf_info { |
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u32 version; |
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int num_domains; |
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bool power_scale_mw; |
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u64 stats_addr; |
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u32 stats_size; |
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struct perf_dom_info *dom_info; |
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}; |
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static enum scmi_performance_protocol_cmd evt_2_cmd[] = { |
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PERF_NOTIFY_LIMITS, |
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PERF_NOTIFY_LEVEL, |
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}; |
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static int scmi_perf_attributes_get(const struct scmi_handle *handle, |
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struct scmi_perf_info *pi) |
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{ |
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int ret; |
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struct scmi_xfer *t; |
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struct scmi_msg_resp_perf_attributes *attr; |
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ret = scmi_xfer_get_init(handle, PROTOCOL_ATTRIBUTES, |
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SCMI_PROTOCOL_PERF, 0, sizeof(*attr), &t); |
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if (ret) |
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return ret; |
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attr = t->rx.buf; |
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ret = scmi_do_xfer(handle, t); |
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if (!ret) { |
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u16 flags = le16_to_cpu(attr->flags); |
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pi->num_domains = le16_to_cpu(attr->num_domains); |
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pi->power_scale_mw = POWER_SCALE_IN_MILLIWATT(flags); |
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pi->stats_addr = le32_to_cpu(attr->stats_addr_low) | |
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(u64)le32_to_cpu(attr->stats_addr_high) << 32; |
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pi->stats_size = le32_to_cpu(attr->stats_size); |
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} |
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scmi_xfer_put(handle, t); |
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return ret; |
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} |
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static int |
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scmi_perf_domain_attributes_get(const struct scmi_handle *handle, u32 domain, |
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struct perf_dom_info *dom_info) |
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{ |
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int ret; |
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struct scmi_xfer *t; |
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struct scmi_msg_resp_perf_domain_attributes *attr; |
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ret = scmi_xfer_get_init(handle, PERF_DOMAIN_ATTRIBUTES, |
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SCMI_PROTOCOL_PERF, sizeof(domain), |
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sizeof(*attr), &t); |
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if (ret) |
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return ret; |
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put_unaligned_le32(domain, t->tx.buf); |
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attr = t->rx.buf; |
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ret = scmi_do_xfer(handle, t); |
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if (!ret) { |
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u32 flags = le32_to_cpu(attr->flags); |
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dom_info->set_limits = SUPPORTS_SET_LIMITS(flags); |
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dom_info->set_perf = SUPPORTS_SET_PERF_LVL(flags); |
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dom_info->perf_limit_notify = SUPPORTS_PERF_LIMIT_NOTIFY(flags); |
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dom_info->perf_level_notify = SUPPORTS_PERF_LEVEL_NOTIFY(flags); |
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dom_info->perf_fastchannels = SUPPORTS_PERF_FASTCHANNELS(flags); |
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dom_info->sustained_freq_khz = |
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le32_to_cpu(attr->sustained_freq_khz); |
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dom_info->sustained_perf_level = |
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le32_to_cpu(attr->sustained_perf_level); |
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if (!dom_info->sustained_freq_khz || |
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!dom_info->sustained_perf_level) |
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/* CPUFreq converts to kHz, hence default 1000 */ |
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dom_info->mult_factor = 1000; |
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else |
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dom_info->mult_factor = |
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(dom_info->sustained_freq_khz * 1000) / |
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dom_info->sustained_perf_level; |
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strlcpy(dom_info->name, attr->name, SCMI_MAX_STR_SIZE); |
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} |
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scmi_xfer_put(handle, t); |
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return ret; |
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} |
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static int opp_cmp_func(const void *opp1, const void *opp2) |
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{ |
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const struct scmi_opp *t1 = opp1, *t2 = opp2; |
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return t1->perf - t2->perf; |
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} |
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static int |
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scmi_perf_describe_levels_get(const struct scmi_handle *handle, u32 domain, |
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struct perf_dom_info *perf_dom) |
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{ |
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int ret, cnt; |
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u32 tot_opp_cnt = 0; |
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u16 num_returned, num_remaining; |
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struct scmi_xfer *t; |
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struct scmi_opp *opp; |
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struct scmi_msg_perf_describe_levels *dom_info; |
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struct scmi_msg_resp_perf_describe_levels *level_info; |
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ret = scmi_xfer_get_init(handle, PERF_DESCRIBE_LEVELS, |
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SCMI_PROTOCOL_PERF, sizeof(*dom_info), 0, &t); |
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if (ret) |
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return ret; |
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dom_info = t->tx.buf; |
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level_info = t->rx.buf; |
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do { |
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dom_info->domain = cpu_to_le32(domain); |
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/* Set the number of OPPs to be skipped/already read */ |
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dom_info->level_index = cpu_to_le32(tot_opp_cnt); |
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ret = scmi_do_xfer(handle, t); |
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if (ret) |
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break; |
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num_returned = le16_to_cpu(level_info->num_returned); |
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num_remaining = le16_to_cpu(level_info->num_remaining); |
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if (tot_opp_cnt + num_returned > MAX_OPPS) { |
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dev_err(handle->dev, "No. of OPPs exceeded MAX_OPPS"); |
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break; |
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} |
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opp = &perf_dom->opp[tot_opp_cnt]; |
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for (cnt = 0; cnt < num_returned; cnt++, opp++) { |
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opp->perf = le32_to_cpu(level_info->opp[cnt].perf_val); |
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opp->power = le32_to_cpu(level_info->opp[cnt].power); |
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opp->trans_latency_us = le16_to_cpu |
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(level_info->opp[cnt].transition_latency_us); |
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dev_dbg(handle->dev, "Level %d Power %d Latency %dus\n", |
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opp->perf, opp->power, opp->trans_latency_us); |
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} |
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tot_opp_cnt += num_returned; |
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scmi_reset_rx_to_maxsz(handle, t); |
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/* |
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* check for both returned and remaining to avoid infinite |
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* loop due to buggy firmware |
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*/ |
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} while (num_returned && num_remaining); |
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perf_dom->opp_count = tot_opp_cnt; |
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scmi_xfer_put(handle, t); |
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sort(perf_dom->opp, tot_opp_cnt, sizeof(*opp), opp_cmp_func, NULL); |
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return ret; |
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} |
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#define SCMI_PERF_FC_RING_DB(w) \ |
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do { \ |
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u##w val = 0; \ |
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\ |
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if (db->mask) \ |
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val = ioread##w(db->addr) & db->mask; \ |
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iowrite##w((u##w)db->set | val, db->addr); \ |
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} while (0) |
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static void scmi_perf_fc_ring_db(struct scmi_fc_db_info *db) |
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{ |
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if (!db || !db->addr) |
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return; |
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if (db->width == 1) |
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SCMI_PERF_FC_RING_DB(8); |
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else if (db->width == 2) |
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SCMI_PERF_FC_RING_DB(16); |
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else if (db->width == 4) |
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SCMI_PERF_FC_RING_DB(32); |
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else /* db->width == 8 */ |
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#ifdef CONFIG_64BIT |
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SCMI_PERF_FC_RING_DB(64); |
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#else |
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{ |
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u64 val = 0; |
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if (db->mask) |
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val = ioread64_hi_lo(db->addr) & db->mask; |
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iowrite64_hi_lo(db->set | val, db->addr); |
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} |
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#endif |
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} |
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static int scmi_perf_mb_limits_set(const struct scmi_handle *handle, u32 domain, |
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u32 max_perf, u32 min_perf) |
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{ |
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int ret; |
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struct scmi_xfer *t; |
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struct scmi_perf_set_limits *limits; |
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ret = scmi_xfer_get_init(handle, PERF_LIMITS_SET, SCMI_PROTOCOL_PERF, |
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sizeof(*limits), 0, &t); |
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if (ret) |
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return ret; |
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limits = t->tx.buf; |
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limits->domain = cpu_to_le32(domain); |
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limits->max_level = cpu_to_le32(max_perf); |
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limits->min_level = cpu_to_le32(min_perf); |
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ret = scmi_do_xfer(handle, t); |
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scmi_xfer_put(handle, t); |
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return ret; |
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} |
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static int scmi_perf_limits_set(const struct scmi_handle *handle, u32 domain, |
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u32 max_perf, u32 min_perf) |
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{ |
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struct scmi_perf_info *pi = handle->perf_priv; |
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struct perf_dom_info *dom = pi->dom_info + domain; |
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if (dom->fc_info && dom->fc_info->limit_set_addr) { |
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iowrite32(max_perf, dom->fc_info->limit_set_addr); |
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iowrite32(min_perf, dom->fc_info->limit_set_addr + 4); |
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scmi_perf_fc_ring_db(dom->fc_info->limit_set_db); |
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return 0; |
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} |
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return scmi_perf_mb_limits_set(handle, domain, max_perf, min_perf); |
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} |
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static int scmi_perf_mb_limits_get(const struct scmi_handle *handle, u32 domain, |
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u32 *max_perf, u32 *min_perf) |
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{ |
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int ret; |
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struct scmi_xfer *t; |
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struct scmi_perf_get_limits *limits; |
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ret = scmi_xfer_get_init(handle, PERF_LIMITS_GET, SCMI_PROTOCOL_PERF, |
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sizeof(__le32), 0, &t); |
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if (ret) |
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return ret; |
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put_unaligned_le32(domain, t->tx.buf); |
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ret = scmi_do_xfer(handle, t); |
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if (!ret) { |
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limits = t->rx.buf; |
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*max_perf = le32_to_cpu(limits->max_level); |
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*min_perf = le32_to_cpu(limits->min_level); |
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} |
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scmi_xfer_put(handle, t); |
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return ret; |
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} |
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static int scmi_perf_limits_get(const struct scmi_handle *handle, u32 domain, |
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u32 *max_perf, u32 *min_perf) |
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{ |
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struct scmi_perf_info *pi = handle->perf_priv; |
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struct perf_dom_info *dom = pi->dom_info + domain; |
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if (dom->fc_info && dom->fc_info->limit_get_addr) { |
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*max_perf = ioread32(dom->fc_info->limit_get_addr); |
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*min_perf = ioread32(dom->fc_info->limit_get_addr + 4); |
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return 0; |
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} |
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return scmi_perf_mb_limits_get(handle, domain, max_perf, min_perf); |
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} |
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static int scmi_perf_mb_level_set(const struct scmi_handle *handle, u32 domain, |
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u32 level, bool poll) |
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{ |
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int ret; |
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struct scmi_xfer *t; |
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struct scmi_perf_set_level *lvl; |
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ret = scmi_xfer_get_init(handle, PERF_LEVEL_SET, SCMI_PROTOCOL_PERF, |
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sizeof(*lvl), 0, &t); |
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if (ret) |
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return ret; |
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t->hdr.poll_completion = poll; |
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lvl = t->tx.buf; |
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lvl->domain = cpu_to_le32(domain); |
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lvl->level = cpu_to_le32(level); |
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ret = scmi_do_xfer(handle, t); |
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scmi_xfer_put(handle, t); |
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return ret; |
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} |
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static int scmi_perf_level_set(const struct scmi_handle *handle, u32 domain, |
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u32 level, bool poll) |
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{ |
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struct scmi_perf_info *pi = handle->perf_priv; |
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struct perf_dom_info *dom = pi->dom_info + domain; |
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if (dom->fc_info && dom->fc_info->level_set_addr) { |
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iowrite32(level, dom->fc_info->level_set_addr); |
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scmi_perf_fc_ring_db(dom->fc_info->level_set_db); |
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return 0; |
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} |
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return scmi_perf_mb_level_set(handle, domain, level, poll); |
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} |
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static int scmi_perf_mb_level_get(const struct scmi_handle *handle, u32 domain, |
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u32 *level, bool poll) |
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{ |
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int ret; |
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struct scmi_xfer *t; |
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ret = scmi_xfer_get_init(handle, PERF_LEVEL_GET, SCMI_PROTOCOL_PERF, |
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sizeof(u32), sizeof(u32), &t); |
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if (ret) |
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return ret; |
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t->hdr.poll_completion = poll; |
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put_unaligned_le32(domain, t->tx.buf); |
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ret = scmi_do_xfer(handle, t); |
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if (!ret) |
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*level = get_unaligned_le32(t->rx.buf); |
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scmi_xfer_put(handle, t); |
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return ret; |
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} |
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static int scmi_perf_level_get(const struct scmi_handle *handle, u32 domain, |
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u32 *level, bool poll) |
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{ |
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struct scmi_perf_info *pi = handle->perf_priv; |
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struct perf_dom_info *dom = pi->dom_info + domain; |
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if (dom->fc_info && dom->fc_info->level_get_addr) { |
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*level = ioread32(dom->fc_info->level_get_addr); |
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return 0; |
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} |
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return scmi_perf_mb_level_get(handle, domain, level, poll); |
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} |
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static int scmi_perf_level_limits_notify(const struct scmi_handle *handle, |
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u32 domain, int message_id, |
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bool enable) |
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{ |
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int ret; |
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struct scmi_xfer *t; |
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struct scmi_perf_notify_level_or_limits *notify; |
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ret = scmi_xfer_get_init(handle, message_id, SCMI_PROTOCOL_PERF, |
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sizeof(*notify), 0, &t); |
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if (ret) |
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return ret; |
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notify = t->tx.buf; |
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notify->domain = cpu_to_le32(domain); |
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notify->notify_enable = enable ? cpu_to_le32(BIT(0)) : 0; |
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ret = scmi_do_xfer(handle, t); |
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scmi_xfer_put(handle, t); |
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return ret; |
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} |
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static bool scmi_perf_fc_size_is_valid(u32 msg, u32 size) |
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{ |
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if ((msg == PERF_LEVEL_GET || msg == PERF_LEVEL_SET) && size == 4) |
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return true; |
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if ((msg == PERF_LIMITS_GET || msg == PERF_LIMITS_SET) && size == 8) |
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return true; |
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return false; |
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} |
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static void |
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scmi_perf_domain_desc_fc(const struct scmi_handle *handle, u32 domain, |
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u32 message_id, void __iomem **p_addr, |
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struct scmi_fc_db_info **p_db) |
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{ |
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int ret; |
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u32 flags; |
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u64 phys_addr; |
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u8 size; |
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void __iomem *addr; |
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struct scmi_xfer *t; |
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struct scmi_fc_db_info *db; |
|
struct scmi_perf_get_fc_info *info; |
|
struct scmi_msg_resp_perf_desc_fc *resp; |
|
|
|
if (!p_addr) |
|
return; |
|
|
|
ret = scmi_xfer_get_init(handle, PERF_DESCRIBE_FASTCHANNEL, |
|
SCMI_PROTOCOL_PERF, |
|
sizeof(*info), sizeof(*resp), &t); |
|
if (ret) |
|
return; |
|
|
|
info = t->tx.buf; |
|
info->domain = cpu_to_le32(domain); |
|
info->message_id = cpu_to_le32(message_id); |
|
|
|
ret = scmi_do_xfer(handle, t); |
|
if (ret) |
|
goto err_xfer; |
|
|
|
resp = t->rx.buf; |
|
flags = le32_to_cpu(resp->attr); |
|
size = le32_to_cpu(resp->chan_size); |
|
if (!scmi_perf_fc_size_is_valid(message_id, size)) |
|
goto err_xfer; |
|
|
|
phys_addr = le32_to_cpu(resp->chan_addr_low); |
|
phys_addr |= (u64)le32_to_cpu(resp->chan_addr_high) << 32; |
|
addr = devm_ioremap(handle->dev, phys_addr, size); |
|
if (!addr) |
|
goto err_xfer; |
|
*p_addr = addr; |
|
|
|
if (p_db && SUPPORTS_DOORBELL(flags)) { |
|
db = devm_kzalloc(handle->dev, sizeof(*db), GFP_KERNEL); |
|
if (!db) |
|
goto err_xfer; |
|
|
|
size = 1 << DOORBELL_REG_WIDTH(flags); |
|
phys_addr = le32_to_cpu(resp->db_addr_low); |
|
phys_addr |= (u64)le32_to_cpu(resp->db_addr_high) << 32; |
|
addr = devm_ioremap(handle->dev, phys_addr, size); |
|
if (!addr) |
|
goto err_xfer; |
|
|
|
db->addr = addr; |
|
db->width = size; |
|
db->set = le32_to_cpu(resp->db_set_lmask); |
|
db->set |= (u64)le32_to_cpu(resp->db_set_hmask) << 32; |
|
db->mask = le32_to_cpu(resp->db_preserve_lmask); |
|
db->mask |= (u64)le32_to_cpu(resp->db_preserve_hmask) << 32; |
|
*p_db = db; |
|
} |
|
err_xfer: |
|
scmi_xfer_put(handle, t); |
|
} |
|
|
|
static void scmi_perf_domain_init_fc(const struct scmi_handle *handle, |
|
u32 domain, struct scmi_fc_info **p_fc) |
|
{ |
|
struct scmi_fc_info *fc; |
|
|
|
fc = devm_kzalloc(handle->dev, sizeof(*fc), GFP_KERNEL); |
|
if (!fc) |
|
return; |
|
|
|
scmi_perf_domain_desc_fc(handle, domain, PERF_LEVEL_SET, |
|
&fc->level_set_addr, &fc->level_set_db); |
|
scmi_perf_domain_desc_fc(handle, domain, PERF_LEVEL_GET, |
|
&fc->level_get_addr, NULL); |
|
scmi_perf_domain_desc_fc(handle, domain, PERF_LIMITS_SET, |
|
&fc->limit_set_addr, &fc->limit_set_db); |
|
scmi_perf_domain_desc_fc(handle, domain, PERF_LIMITS_GET, |
|
&fc->limit_get_addr, NULL); |
|
*p_fc = fc; |
|
} |
|
|
|
/* Device specific ops */ |
|
static int scmi_dev_domain_id(struct device *dev) |
|
{ |
|
struct of_phandle_args clkspec; |
|
|
|
if (of_parse_phandle_with_args(dev->of_node, "clocks", "#clock-cells", |
|
0, &clkspec)) |
|
return -EINVAL; |
|
|
|
return clkspec.args[0]; |
|
} |
|
|
|
static int scmi_dvfs_device_opps_add(const struct scmi_handle *handle, |
|
struct device *dev) |
|
{ |
|
int idx, ret, domain; |
|
unsigned long freq; |
|
struct scmi_opp *opp; |
|
struct perf_dom_info *dom; |
|
struct scmi_perf_info *pi = handle->perf_priv; |
|
|
|
domain = scmi_dev_domain_id(dev); |
|
if (domain < 0) |
|
return domain; |
|
|
|
dom = pi->dom_info + domain; |
|
|
|
for (opp = dom->opp, idx = 0; idx < dom->opp_count; idx++, opp++) { |
|
freq = opp->perf * dom->mult_factor; |
|
|
|
ret = dev_pm_opp_add(dev, freq, 0); |
|
if (ret) { |
|
dev_warn(dev, "failed to add opp %luHz\n", freq); |
|
|
|
while (idx-- > 0) { |
|
freq = (--opp)->perf * dom->mult_factor; |
|
dev_pm_opp_remove(dev, freq); |
|
} |
|
return ret; |
|
} |
|
} |
|
return 0; |
|
} |
|
|
|
static int scmi_dvfs_transition_latency_get(const struct scmi_handle *handle, |
|
struct device *dev) |
|
{ |
|
struct perf_dom_info *dom; |
|
struct scmi_perf_info *pi = handle->perf_priv; |
|
int domain = scmi_dev_domain_id(dev); |
|
|
|
if (domain < 0) |
|
return domain; |
|
|
|
dom = pi->dom_info + domain; |
|
/* uS to nS */ |
|
return dom->opp[dom->opp_count - 1].trans_latency_us * 1000; |
|
} |
|
|
|
static int scmi_dvfs_freq_set(const struct scmi_handle *handle, u32 domain, |
|
unsigned long freq, bool poll) |
|
{ |
|
struct scmi_perf_info *pi = handle->perf_priv; |
|
struct perf_dom_info *dom = pi->dom_info + domain; |
|
|
|
return scmi_perf_level_set(handle, domain, freq / dom->mult_factor, |
|
poll); |
|
} |
|
|
|
static int scmi_dvfs_freq_get(const struct scmi_handle *handle, u32 domain, |
|
unsigned long *freq, bool poll) |
|
{ |
|
int ret; |
|
u32 level; |
|
struct scmi_perf_info *pi = handle->perf_priv; |
|
struct perf_dom_info *dom = pi->dom_info + domain; |
|
|
|
ret = scmi_perf_level_get(handle, domain, &level, poll); |
|
if (!ret) |
|
*freq = level * dom->mult_factor; |
|
|
|
return ret; |
|
} |
|
|
|
static int scmi_dvfs_est_power_get(const struct scmi_handle *handle, u32 domain, |
|
unsigned long *freq, unsigned long *power) |
|
{ |
|
struct scmi_perf_info *pi = handle->perf_priv; |
|
struct perf_dom_info *dom; |
|
unsigned long opp_freq; |
|
int idx, ret = -EINVAL; |
|
struct scmi_opp *opp; |
|
|
|
dom = pi->dom_info + domain; |
|
if (!dom) |
|
return -EIO; |
|
|
|
for (opp = dom->opp, idx = 0; idx < dom->opp_count; idx++, opp++) { |
|
opp_freq = opp->perf * dom->mult_factor; |
|
if (opp_freq < *freq) |
|
continue; |
|
|
|
*freq = opp_freq; |
|
*power = opp->power; |
|
ret = 0; |
|
break; |
|
} |
|
|
|
return ret; |
|
} |
|
|
|
static bool scmi_fast_switch_possible(const struct scmi_handle *handle, |
|
struct device *dev) |
|
{ |
|
struct perf_dom_info *dom; |
|
struct scmi_perf_info *pi = handle->perf_priv; |
|
|
|
dom = pi->dom_info + scmi_dev_domain_id(dev); |
|
|
|
return dom->fc_info && dom->fc_info->level_set_addr; |
|
} |
|
|
|
static bool scmi_power_scale_mw_get(const struct scmi_handle *handle) |
|
{ |
|
struct scmi_perf_info *pi = handle->perf_priv; |
|
|
|
return pi->power_scale_mw; |
|
} |
|
|
|
static const struct scmi_perf_ops perf_ops = { |
|
.limits_set = scmi_perf_limits_set, |
|
.limits_get = scmi_perf_limits_get, |
|
.level_set = scmi_perf_level_set, |
|
.level_get = scmi_perf_level_get, |
|
.device_domain_id = scmi_dev_domain_id, |
|
.transition_latency_get = scmi_dvfs_transition_latency_get, |
|
.device_opps_add = scmi_dvfs_device_opps_add, |
|
.freq_set = scmi_dvfs_freq_set, |
|
.freq_get = scmi_dvfs_freq_get, |
|
.est_power_get = scmi_dvfs_est_power_get, |
|
.fast_switch_possible = scmi_fast_switch_possible, |
|
.power_scale_mw_get = scmi_power_scale_mw_get, |
|
}; |
|
|
|
static int scmi_perf_set_notify_enabled(const struct scmi_handle *handle, |
|
u8 evt_id, u32 src_id, bool enable) |
|
{ |
|
int ret, cmd_id; |
|
|
|
if (evt_id >= ARRAY_SIZE(evt_2_cmd)) |
|
return -EINVAL; |
|
|
|
cmd_id = evt_2_cmd[evt_id]; |
|
ret = scmi_perf_level_limits_notify(handle, src_id, cmd_id, enable); |
|
if (ret) |
|
pr_debug("FAIL_ENABLED - evt[%X] dom[%d] - ret:%d\n", |
|
evt_id, src_id, ret); |
|
|
|
return ret; |
|
} |
|
|
|
static void *scmi_perf_fill_custom_report(const struct scmi_handle *handle, |
|
u8 evt_id, ktime_t timestamp, |
|
const void *payld, size_t payld_sz, |
|
void *report, u32 *src_id) |
|
{ |
|
void *rep = NULL; |
|
|
|
switch (evt_id) { |
|
case SCMI_EVENT_PERFORMANCE_LIMITS_CHANGED: |
|
{ |
|
const struct scmi_perf_limits_notify_payld *p = payld; |
|
struct scmi_perf_limits_report *r = report; |
|
|
|
if (sizeof(*p) != payld_sz) |
|
break; |
|
|
|
r->timestamp = timestamp; |
|
r->agent_id = le32_to_cpu(p->agent_id); |
|
r->domain_id = le32_to_cpu(p->domain_id); |
|
r->range_max = le32_to_cpu(p->range_max); |
|
r->range_min = le32_to_cpu(p->range_min); |
|
*src_id = r->domain_id; |
|
rep = r; |
|
break; |
|
} |
|
case SCMI_EVENT_PERFORMANCE_LEVEL_CHANGED: |
|
{ |
|
const struct scmi_perf_level_notify_payld *p = payld; |
|
struct scmi_perf_level_report *r = report; |
|
|
|
if (sizeof(*p) != payld_sz) |
|
break; |
|
|
|
r->timestamp = timestamp; |
|
r->agent_id = le32_to_cpu(p->agent_id); |
|
r->domain_id = le32_to_cpu(p->domain_id); |
|
r->performance_level = le32_to_cpu(p->performance_level); |
|
*src_id = r->domain_id; |
|
rep = r; |
|
break; |
|
} |
|
default: |
|
break; |
|
} |
|
|
|
return rep; |
|
} |
|
|
|
static const struct scmi_event perf_events[] = { |
|
{ |
|
.id = SCMI_EVENT_PERFORMANCE_LIMITS_CHANGED, |
|
.max_payld_sz = sizeof(struct scmi_perf_limits_notify_payld), |
|
.max_report_sz = sizeof(struct scmi_perf_limits_report), |
|
}, |
|
{ |
|
.id = SCMI_EVENT_PERFORMANCE_LEVEL_CHANGED, |
|
.max_payld_sz = sizeof(struct scmi_perf_level_notify_payld), |
|
.max_report_sz = sizeof(struct scmi_perf_level_report), |
|
}, |
|
}; |
|
|
|
static const struct scmi_event_ops perf_event_ops = { |
|
.set_notify_enabled = scmi_perf_set_notify_enabled, |
|
.fill_custom_report = scmi_perf_fill_custom_report, |
|
}; |
|
|
|
static int scmi_perf_protocol_init(struct scmi_handle *handle) |
|
{ |
|
int domain; |
|
u32 version; |
|
struct scmi_perf_info *pinfo; |
|
|
|
scmi_version_get(handle, SCMI_PROTOCOL_PERF, &version); |
|
|
|
dev_dbg(handle->dev, "Performance Version %d.%d\n", |
|
PROTOCOL_REV_MAJOR(version), PROTOCOL_REV_MINOR(version)); |
|
|
|
pinfo = devm_kzalloc(handle->dev, sizeof(*pinfo), GFP_KERNEL); |
|
if (!pinfo) |
|
return -ENOMEM; |
|
|
|
scmi_perf_attributes_get(handle, pinfo); |
|
|
|
pinfo->dom_info = devm_kcalloc(handle->dev, pinfo->num_domains, |
|
sizeof(*pinfo->dom_info), GFP_KERNEL); |
|
if (!pinfo->dom_info) |
|
return -ENOMEM; |
|
|
|
for (domain = 0; domain < pinfo->num_domains; domain++) { |
|
struct perf_dom_info *dom = pinfo->dom_info + domain; |
|
|
|
scmi_perf_domain_attributes_get(handle, domain, dom); |
|
scmi_perf_describe_levels_get(handle, domain, dom); |
|
|
|
if (dom->perf_fastchannels) |
|
scmi_perf_domain_init_fc(handle, domain, &dom->fc_info); |
|
} |
|
|
|
scmi_register_protocol_events(handle, |
|
SCMI_PROTOCOL_PERF, SCMI_PROTO_QUEUE_SZ, |
|
&perf_event_ops, perf_events, |
|
ARRAY_SIZE(perf_events), |
|
pinfo->num_domains); |
|
|
|
pinfo->version = version; |
|
handle->perf_ops = &perf_ops; |
|
handle->perf_priv = pinfo; |
|
|
|
return 0; |
|
} |
|
|
|
DEFINE_SCMI_PROTOCOL_REGISTER_UNREGISTER(SCMI_PROTOCOL_PERF, perf)
|
|
|