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175 lines
4.0 KiB
175 lines
4.0 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com |
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* Author: Peter Ujfalusi <[email protected]> |
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*/ |
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#include <linux/kernel.h> |
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#include "k3-psil-priv.h" |
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#define PSIL_PDMA_XY_TR(x) \ |
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{ \ |
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.thread_id = x, \ |
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.ep_config = { \ |
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.ep_type = PSIL_EP_PDMA_XY, \ |
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}, \ |
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} |
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#define PSIL_PDMA_XY_PKT(x) \ |
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{ \ |
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.thread_id = x, \ |
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.ep_config = { \ |
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.ep_type = PSIL_EP_PDMA_XY, \ |
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.pkt_mode = 1, \ |
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}, \ |
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} |
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#define PSIL_ETHERNET(x) \ |
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{ \ |
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.thread_id = x, \ |
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.ep_config = { \ |
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.ep_type = PSIL_EP_NATIVE, \ |
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.pkt_mode = 1, \ |
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.needs_epib = 1, \ |
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.psd_size = 16, \ |
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}, \ |
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} |
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#define PSIL_SA2UL(x, tx) \ |
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{ \ |
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.thread_id = x, \ |
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.ep_config = { \ |
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.ep_type = PSIL_EP_NATIVE, \ |
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.pkt_mode = 1, \ |
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.needs_epib = 1, \ |
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.psd_size = 64, \ |
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.notdpkt = tx, \ |
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}, \ |
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} |
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/* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */ |
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static struct psil_ep am654_src_ep_map[] = { |
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/* SA2UL */ |
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PSIL_SA2UL(0x4000, 0), |
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PSIL_SA2UL(0x4001, 0), |
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PSIL_SA2UL(0x4002, 0), |
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PSIL_SA2UL(0x4003, 0), |
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/* PRU_ICSSG0 */ |
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PSIL_ETHERNET(0x4100), |
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PSIL_ETHERNET(0x4101), |
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PSIL_ETHERNET(0x4102), |
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PSIL_ETHERNET(0x4103), |
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/* PRU_ICSSG1 */ |
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PSIL_ETHERNET(0x4200), |
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PSIL_ETHERNET(0x4201), |
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PSIL_ETHERNET(0x4202), |
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PSIL_ETHERNET(0x4203), |
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/* PRU_ICSSG2 */ |
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PSIL_ETHERNET(0x4300), |
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PSIL_ETHERNET(0x4301), |
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PSIL_ETHERNET(0x4302), |
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PSIL_ETHERNET(0x4303), |
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/* PDMA0 - McASPs */ |
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PSIL_PDMA_XY_TR(0x4400), |
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PSIL_PDMA_XY_TR(0x4401), |
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PSIL_PDMA_XY_TR(0x4402), |
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/* PDMA1 - SPI0-4 */ |
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PSIL_PDMA_XY_PKT(0x4500), |
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PSIL_PDMA_XY_PKT(0x4501), |
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PSIL_PDMA_XY_PKT(0x4502), |
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PSIL_PDMA_XY_PKT(0x4503), |
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PSIL_PDMA_XY_PKT(0x4504), |
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PSIL_PDMA_XY_PKT(0x4505), |
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PSIL_PDMA_XY_PKT(0x4506), |
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PSIL_PDMA_XY_PKT(0x4507), |
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PSIL_PDMA_XY_PKT(0x4508), |
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PSIL_PDMA_XY_PKT(0x4509), |
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PSIL_PDMA_XY_PKT(0x450a), |
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PSIL_PDMA_XY_PKT(0x450b), |
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PSIL_PDMA_XY_PKT(0x450c), |
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PSIL_PDMA_XY_PKT(0x450d), |
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PSIL_PDMA_XY_PKT(0x450e), |
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PSIL_PDMA_XY_PKT(0x450f), |
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PSIL_PDMA_XY_PKT(0x4510), |
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PSIL_PDMA_XY_PKT(0x4511), |
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PSIL_PDMA_XY_PKT(0x4512), |
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PSIL_PDMA_XY_PKT(0x4513), |
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/* PDMA1 - USART0-2 */ |
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PSIL_PDMA_XY_PKT(0x4514), |
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PSIL_PDMA_XY_PKT(0x4515), |
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PSIL_PDMA_XY_PKT(0x4516), |
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/* CPSW0 */ |
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PSIL_ETHERNET(0x7000), |
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/* MCU_PDMA0 - ADCs */ |
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PSIL_PDMA_XY_TR(0x7100), |
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PSIL_PDMA_XY_TR(0x7101), |
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PSIL_PDMA_XY_TR(0x7102), |
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PSIL_PDMA_XY_TR(0x7103), |
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/* MCU_PDMA1 - MCU_SPI0-2 */ |
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PSIL_PDMA_XY_PKT(0x7200), |
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PSIL_PDMA_XY_PKT(0x7201), |
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PSIL_PDMA_XY_PKT(0x7202), |
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PSIL_PDMA_XY_PKT(0x7203), |
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PSIL_PDMA_XY_PKT(0x7204), |
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PSIL_PDMA_XY_PKT(0x7205), |
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PSIL_PDMA_XY_PKT(0x7206), |
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PSIL_PDMA_XY_PKT(0x7207), |
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PSIL_PDMA_XY_PKT(0x7208), |
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PSIL_PDMA_XY_PKT(0x7209), |
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PSIL_PDMA_XY_PKT(0x720a), |
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PSIL_PDMA_XY_PKT(0x720b), |
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/* MCU_PDMA1 - MCU_USART0 */ |
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PSIL_PDMA_XY_PKT(0x7212), |
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}; |
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/* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */ |
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static struct psil_ep am654_dst_ep_map[] = { |
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/* SA2UL */ |
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PSIL_SA2UL(0xc000, 1), |
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PSIL_SA2UL(0xc001, 1), |
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/* PRU_ICSSG0 */ |
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PSIL_ETHERNET(0xc100), |
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PSIL_ETHERNET(0xc101), |
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PSIL_ETHERNET(0xc102), |
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PSIL_ETHERNET(0xc103), |
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PSIL_ETHERNET(0xc104), |
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PSIL_ETHERNET(0xc105), |
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PSIL_ETHERNET(0xc106), |
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PSIL_ETHERNET(0xc107), |
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/* PRU_ICSSG1 */ |
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PSIL_ETHERNET(0xc200), |
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PSIL_ETHERNET(0xc201), |
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PSIL_ETHERNET(0xc202), |
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PSIL_ETHERNET(0xc203), |
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PSIL_ETHERNET(0xc204), |
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PSIL_ETHERNET(0xc205), |
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PSIL_ETHERNET(0xc206), |
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PSIL_ETHERNET(0xc207), |
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/* PRU_ICSSG2 */ |
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PSIL_ETHERNET(0xc300), |
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PSIL_ETHERNET(0xc301), |
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PSIL_ETHERNET(0xc302), |
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PSIL_ETHERNET(0xc303), |
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PSIL_ETHERNET(0xc304), |
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PSIL_ETHERNET(0xc305), |
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PSIL_ETHERNET(0xc306), |
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PSIL_ETHERNET(0xc307), |
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/* CPSW0 */ |
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PSIL_ETHERNET(0xf000), |
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PSIL_ETHERNET(0xf001), |
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PSIL_ETHERNET(0xf002), |
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PSIL_ETHERNET(0xf003), |
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PSIL_ETHERNET(0xf004), |
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PSIL_ETHERNET(0xf005), |
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PSIL_ETHERNET(0xf006), |
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PSIL_ETHERNET(0xf007), |
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}; |
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struct psil_ep_map am654_ep_map = { |
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.name = "am654", |
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.src = am654_src_ep_map, |
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.src_count = ARRAY_SIZE(am654_src_ep_map), |
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.dst = am654_dst_ep_map, |
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.dst_count = ARRAY_SIZE(am654_dst_ep_map), |
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};
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