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301 lines
7.0 KiB
301 lines
7.0 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* pata_cs5536.c - CS5536 PATA for new ATA layer |
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* (C) 2007 Martin K. Petersen <[email protected]> |
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* (C) 2011 Bartlomiej Zolnierkiewicz |
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* |
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* Documentation: |
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* Available from AMD web site. |
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* |
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* The IDE timing registers for the CS5536 live in the Geode Machine |
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* Specific Register file and not PCI config space. Most BIOSes |
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* virtualize the PCI registers so the chip looks like a standard IDE |
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* controller. Unfortunately not all implementations get this right. |
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* In particular some have problems with unaligned accesses to the |
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* virtualized PCI registers. This driver always does full dword |
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* writes to work around the issue. Also, in case of a bad BIOS this |
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* driver can be loaded with the "msr=1" parameter which forces using |
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* the Machine Specific Registers to configure the device. |
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*/ |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/pci.h> |
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#include <linux/blkdev.h> |
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#include <linux/delay.h> |
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#include <linux/libata.h> |
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#include <scsi/scsi_host.h> |
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#include <linux/dmi.h> |
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#ifdef CONFIG_X86_32 |
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#include <asm/msr.h> |
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static int use_msr; |
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module_param_named(msr, use_msr, int, 0644); |
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MODULE_PARM_DESC(msr, "Force using MSR to configure IDE function (Default: 0)"); |
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#else |
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#undef rdmsr /* avoid accidental MSR usage on, e.g. x86-64 */ |
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#undef wrmsr |
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#define rdmsr(x, y, z) do { } while (0) |
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#define wrmsr(x, y, z) do { } while (0) |
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#define use_msr 0 |
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#endif |
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#define DRV_NAME "pata_cs5536" |
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#define DRV_VERSION "0.0.8" |
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enum { |
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MSR_IDE_CFG = 0x51300010, |
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PCI_IDE_CFG = 0x40, |
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CFG = 0, |
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DTC = 2, |
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CAST = 3, |
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ETC = 4, |
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IDE_CFG_CHANEN = (1 << 1), |
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IDE_CFG_CABLE = (1 << 17) | (1 << 16), |
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IDE_D0_SHIFT = 24, |
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IDE_D1_SHIFT = 16, |
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IDE_DRV_MASK = 0xff, |
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IDE_CAST_D0_SHIFT = 6, |
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IDE_CAST_D1_SHIFT = 4, |
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IDE_CAST_DRV_MASK = 0x3, |
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IDE_CAST_CMD_MASK = 0xff, |
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IDE_CAST_CMD_SHIFT = 24, |
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IDE_ETC_UDMA_MASK = 0xc0, |
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}; |
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/* Some Bachmann OT200 devices have a non working UDMA support due a |
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* missing resistor. |
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*/ |
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static const struct dmi_system_id udma_quirk_dmi_table[] = { |
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{ |
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.ident = "Bachmann electronic OT200", |
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.matches = { |
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DMI_MATCH(DMI_SYS_VENDOR, "Bachmann electronic"), |
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DMI_MATCH(DMI_PRODUCT_NAME, "OT200"), |
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DMI_MATCH(DMI_PRODUCT_VERSION, "1") |
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}, |
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}, |
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{ } |
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}; |
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static int cs5536_read(struct pci_dev *pdev, int reg, u32 *val) |
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{ |
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if (unlikely(use_msr)) { |
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u32 dummy __maybe_unused; |
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rdmsr(MSR_IDE_CFG + reg, *val, dummy); |
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return 0; |
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} |
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return pci_read_config_dword(pdev, PCI_IDE_CFG + reg * 4, val); |
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} |
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static int cs5536_write(struct pci_dev *pdev, int reg, int val) |
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{ |
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if (unlikely(use_msr)) { |
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wrmsr(MSR_IDE_CFG + reg, val, 0); |
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return 0; |
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} |
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return pci_write_config_dword(pdev, PCI_IDE_CFG + reg * 4, val); |
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} |
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static void cs5536_program_dtc(struct ata_device *adev, u8 tim) |
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{ |
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struct pci_dev *pdev = to_pci_dev(adev->link->ap->host->dev); |
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int dshift = adev->devno ? IDE_D1_SHIFT : IDE_D0_SHIFT; |
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u32 dtc; |
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cs5536_read(pdev, DTC, &dtc); |
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dtc &= ~(IDE_DRV_MASK << dshift); |
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dtc |= tim << dshift; |
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cs5536_write(pdev, DTC, dtc); |
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} |
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/** |
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* cs5536_cable_detect - detect cable type |
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* @ap: Port to detect on |
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* |
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* Perform cable detection for ATA66 capable cable. |
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* |
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* Returns a cable type. |
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*/ |
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static int cs5536_cable_detect(struct ata_port *ap) |
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{ |
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struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
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u32 cfg; |
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cs5536_read(pdev, CFG, &cfg); |
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if (cfg & IDE_CFG_CABLE) |
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return ATA_CBL_PATA80; |
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else |
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return ATA_CBL_PATA40; |
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} |
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/** |
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* cs5536_set_piomode - PIO setup |
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* @ap: ATA interface |
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* @adev: device on the interface |
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*/ |
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static void cs5536_set_piomode(struct ata_port *ap, struct ata_device *adev) |
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{ |
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static const u8 drv_timings[5] = { |
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0x98, 0x55, 0x32, 0x21, 0x20, |
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}; |
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static const u8 addr_timings[5] = { |
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0x2, 0x1, 0x0, 0x0, 0x0, |
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}; |
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static const u8 cmd_timings[5] = { |
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0x99, 0x92, 0x90, 0x22, 0x20, |
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}; |
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struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
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struct ata_device *pair = ata_dev_pair(adev); |
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int mode = adev->pio_mode - XFER_PIO_0; |
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int cmdmode = mode; |
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int cshift = adev->devno ? IDE_CAST_D1_SHIFT : IDE_CAST_D0_SHIFT; |
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u32 cast; |
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if (pair) |
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cmdmode = min(mode, pair->pio_mode - XFER_PIO_0); |
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cs5536_program_dtc(adev, drv_timings[mode]); |
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cs5536_read(pdev, CAST, &cast); |
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cast &= ~(IDE_CAST_DRV_MASK << cshift); |
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cast |= addr_timings[mode] << cshift; |
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cast &= ~(IDE_CAST_CMD_MASK << IDE_CAST_CMD_SHIFT); |
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cast |= cmd_timings[cmdmode] << IDE_CAST_CMD_SHIFT; |
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cs5536_write(pdev, CAST, cast); |
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} |
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/** |
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* cs5536_set_dmamode - DMA timing setup |
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* @ap: ATA interface |
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* @adev: Device being configured |
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* |
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*/ |
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static void cs5536_set_dmamode(struct ata_port *ap, struct ata_device *adev) |
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{ |
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static const u8 udma_timings[6] = { |
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0xc2, 0xc1, 0xc0, 0xc4, 0xc5, 0xc6, |
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}; |
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static const u8 mwdma_timings[3] = { |
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0x67, 0x21, 0x20, |
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}; |
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struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
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u32 etc; |
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int mode = adev->dma_mode; |
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int dshift = adev->devno ? IDE_D1_SHIFT : IDE_D0_SHIFT; |
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cs5536_read(pdev, ETC, &etc); |
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if (mode >= XFER_UDMA_0) { |
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etc &= ~(IDE_DRV_MASK << dshift); |
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etc |= udma_timings[mode - XFER_UDMA_0] << dshift; |
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} else { /* MWDMA */ |
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etc &= ~(IDE_ETC_UDMA_MASK << dshift); |
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cs5536_program_dtc(adev, mwdma_timings[mode - XFER_MW_DMA_0]); |
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} |
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cs5536_write(pdev, ETC, etc); |
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} |
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static struct scsi_host_template cs5536_sht = { |
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ATA_BMDMA_SHT(DRV_NAME), |
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}; |
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static struct ata_port_operations cs5536_port_ops = { |
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.inherits = &ata_bmdma32_port_ops, |
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.cable_detect = cs5536_cable_detect, |
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.set_piomode = cs5536_set_piomode, |
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.set_dmamode = cs5536_set_dmamode, |
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}; |
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/** |
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* cs5536_init_one |
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* @dev: PCI device |
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* @id: Entry in match table |
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* |
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*/ |
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static int cs5536_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
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{ |
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static const struct ata_port_info info = { |
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.flags = ATA_FLAG_SLAVE_POSS, |
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.pio_mask = ATA_PIO4, |
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.mwdma_mask = ATA_MWDMA2, |
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.udma_mask = ATA_UDMA5, |
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.port_ops = &cs5536_port_ops, |
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}; |
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static const struct ata_port_info no_udma_info = { |
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.flags = ATA_FLAG_SLAVE_POSS, |
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.pio_mask = ATA_PIO4, |
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.port_ops = &cs5536_port_ops, |
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}; |
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const struct ata_port_info *ppi[2]; |
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u32 cfg; |
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if (dmi_check_system(udma_quirk_dmi_table)) |
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ppi[0] = &no_udma_info; |
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else |
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ppi[0] = &info; |
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ppi[1] = &ata_dummy_port_info; |
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if (use_msr) |
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printk(KERN_ERR DRV_NAME ": Using MSR regs instead of PCI\n"); |
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cs5536_read(dev, CFG, &cfg); |
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if ((cfg & IDE_CFG_CHANEN) == 0) { |
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printk(KERN_ERR DRV_NAME ": disabled by BIOS\n"); |
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return -ENODEV; |
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} |
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return ata_pci_bmdma_init_one(dev, ppi, &cs5536_sht, NULL, 0); |
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} |
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static const struct pci_device_id cs5536[] = { |
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5536_IDE), }, |
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5536_DEV_IDE), }, |
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{ }, |
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}; |
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static struct pci_driver cs5536_pci_driver = { |
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.name = DRV_NAME, |
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.id_table = cs5536, |
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.probe = cs5536_init_one, |
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.remove = ata_pci_remove_one, |
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#ifdef CONFIG_PM_SLEEP |
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.suspend = ata_pci_device_suspend, |
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.resume = ata_pci_device_resume, |
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#endif |
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}; |
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module_pci_driver(cs5536_pci_driver); |
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MODULE_AUTHOR("Martin K. Petersen"); |
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MODULE_DESCRIPTION("low-level driver for the CS5536 IDE controller"); |
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MODULE_LICENSE("GPL"); |
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MODULE_DEVICE_TABLE(pci, cs5536); |
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MODULE_VERSION(DRV_VERSION);
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