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99 lines
3.3 KiB
99 lines
3.3 KiB
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The I2C Protocol |
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This document describes the I2C protocol. Or will, when it is finished :-) |
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Key to symbols |
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=============== ============================================================= |
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S Start condition |
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P Stop condition |
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Rd/Wr (1 bit) Read/Write bit. Rd equals 1, Wr equals 0. |
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A, NA (1 bit) Acknowledge (ACK) and Not Acknowledge (NACK) bit |
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Addr (7 bits) I2C 7 bit address. Note that this can be expanded as usual to |
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get a 10 bit I2C address. |
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Comm (8 bits) Command byte, a data byte which often selects a register on |
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the device. |
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Data (8 bits) A plain data byte. Sometimes, I write DataLow, DataHigh |
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for 16 bit data. |
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Count (8 bits) A data byte containing the length of a block operation. |
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[..] Data sent by I2C device, as opposed to data sent by the |
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host adapter. |
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=============== ============================================================= |
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Simple send transaction |
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======================= |
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Implemented by i2c_master_send():: |
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S Addr Wr [A] Data [A] Data [A] ... [A] Data [A] P |
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Simple receive transaction |
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========================== |
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Implemented by i2c_master_recv():: |
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S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P |
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Combined transactions |
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===================== |
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Implemented by i2c_transfer(). |
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They are just like the above transactions, but instead of a stop |
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condition P a start condition S is sent and the transaction continues. |
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An example of a byte read, followed by a byte write:: |
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S Addr Rd [A] [Data] NA S Addr Wr [A] Data [A] P |
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Modified transactions |
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===================== |
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The following modifications to the I2C protocol can also be generated by |
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setting these flags for I2C messages. With the exception of I2C_M_NOSTART, they |
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are usually only needed to work around device issues: |
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I2C_M_IGNORE_NAK: |
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Normally message is interrupted immediately if there is [NA] from the |
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client. Setting this flag treats any [NA] as [A], and all of |
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message is sent. |
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These messages may still fail to SCL lo->hi timeout. |
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I2C_M_NO_RD_ACK: |
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In a read message, master A/NA bit is skipped. |
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I2C_M_NOSTART: |
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In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some |
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point. For example, setting I2C_M_NOSTART on the second partial message |
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generates something like:: |
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S Addr Rd [A] [Data] NA Data [A] P |
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If you set the I2C_M_NOSTART variable for the first partial message, |
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we do not generate Addr, but we do generate the start condition S. |
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This will probably confuse all other clients on your bus, so don't |
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try this. |
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This is often used to gather transmits from multiple data buffers in |
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system memory into something that appears as a single transfer to the |
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I2C device but may also be used between direction changes by some |
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rare devices. |
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I2C_M_REV_DIR_ADDR: |
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This toggles the Rd/Wr flag. That is, if you want to do a write, but |
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need to emit an Rd instead of a Wr, or vice versa, you set this |
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flag. For example:: |
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S Addr Rd [A] Data [A] Data [A] ... [A] Data [A] P |
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I2C_M_STOP: |
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Force a stop condition (P) after the message. Some I2C related protocols |
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like SCCB require that. Normally, you really don't want to get interrupted |
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between the messages of one transfer.
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