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71 lines
3.5 KiB
71 lines
3.5 KiB
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Freescale i.MX8 DDR Performance Monitoring Unit (PMU) |
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There are no performance counters inside the DRAM controller, so performance |
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signals are brought out to the edge of the controller where a set of 4 x 32 bit |
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counters is implemented. This is controlled by the CSV modes programmed in counter |
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control register which causes a large number of PERF signals to be generated. |
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Selection of the value for each counter is done via the config registers. There |
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is one register for each counter. Counter 0 is special in that it always counts |
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“time” and when expired causes a lock on itself and the other counters and an |
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interrupt is raised. If any other counter overflows, it continues counting, and |
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no interrupt is raised. |
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The "format" directory describes format of the config (event ID) and config1 |
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(AXI filtering) fields of the perf_event_attr structure, see /sys/bus/event_source/ |
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devices/imx8_ddr0/format/. The "events" directory describes the events types |
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hardware supported that can be used with perf tool, see /sys/bus/event_source/ |
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devices/imx8_ddr0/events/. The "caps" directory describes filter features implemented |
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in DDR PMU, see /sys/bus/events_source/devices/imx8_ddr0/caps/. |
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.. code-block:: bash |
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perf stat -a -e imx8_ddr0/cycles/ cmd |
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perf stat -a -e imx8_ddr0/read/,imx8_ddr0/write/ cmd |
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AXI filtering is only used by CSV modes 0x41 (axid-read) and 0x42 (axid-write) |
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to count reading or writing matches filter setting. Filter setting is various |
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from different DRAM controller implementations, which is distinguished by quirks |
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in the driver. You also can dump info from userspace, filter in "caps" directory |
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indicates whether PMU supports AXI ID filter or not; enhanced_filter indicates |
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whether PMU supports enhanced AXI ID filter or not. Value 0 for un-supported, and |
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value 1 for supported. |
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* With DDR_CAP_AXI_ID_FILTER quirk(filter: 1, enhanced_filter: 0). |
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Filter is defined with two configuration parts: |
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--AXI_ID defines AxID matching value. |
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--AXI_MASKING defines which bits of AxID are meaningful for the matching. |
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- 0: corresponding bit is masked. |
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- 1: corresponding bit is not masked, i.e. used to do the matching. |
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AXI_ID and AXI_MASKING are mapped on DPCR1 register in performance counter. |
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When non-masked bits are matching corresponding AXI_ID bits then counter is |
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incremented. Perf counter is incremented if:: |
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AxID && AXI_MASKING == AXI_ID && AXI_MASKING |
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This filter doesn't support filter different AXI ID for axid-read and axid-write |
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event at the same time as this filter is shared between counters. |
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.. code-block:: bash |
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perf stat -a -e imx8_ddr0/axid-read,axi_mask=0xMMMM,axi_id=0xDDDD/ cmd |
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perf stat -a -e imx8_ddr0/axid-write,axi_mask=0xMMMM,axi_id=0xDDDD/ cmd |
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.. note:: |
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axi_mask is inverted in userspace(i.e. set bits are bits to mask), and |
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it will be reverted in driver automatically. so that the user can just specify |
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axi_id to monitor a specific id, rather than having to specify axi_mask. |
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.. code-block:: bash |
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perf stat -a -e imx8_ddr0/axid-read,axi_id=0x12/ cmd, which will monitor ARID=0x12 |
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* With DDR_CAP_AXI_ID_FILTER_ENHANCED quirk(filter: 1, enhanced_filter: 1). |
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This is an extension to the DDR_CAP_AXI_ID_FILTER quirk which permits |
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counting the number of bytes (as opposed to the number of bursts) from DDR |
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read and write transactions concurrently with another set of data counters.
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