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61 lines
1.7 KiB
61 lines
1.7 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* arch/arm/mach-footbridge/include/mach/memory.h |
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* |
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* Copyright (C) 1996-1999 Russell King. |
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* |
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* Changelog: |
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* 20-Oct-1996 RMK Created |
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* 31-Dec-1997 RMK Fixed definitions to reduce warnings. |
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* 17-May-1998 DAG Added __virt_to_bus and __bus_to_virt functions. |
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* 21-Nov-1998 RMK Changed __virt_to_bus and __bus_to_virt to macros. |
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* 21-Mar-1999 RMK Added PAGE_OFFSET for co285 architecture. |
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* Renamed to memory.h |
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* Moved PAGE_OFFSET and TASK_SIZE here |
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*/ |
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#ifndef __ASM_ARCH_MEMORY_H |
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#define __ASM_ARCH_MEMORY_H |
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#if defined(CONFIG_FOOTBRIDGE_ADDIN) |
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/* |
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* If we may be using add-in footbridge mode, then we must |
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* use the out-of-line translation that makes use of the |
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* PCI BAR |
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*/ |
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#ifndef __ASSEMBLY__ |
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extern unsigned long __virt_to_bus(unsigned long); |
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extern unsigned long __bus_to_virt(unsigned long); |
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extern unsigned long __pfn_to_bus(unsigned long); |
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extern unsigned long __bus_to_pfn(unsigned long); |
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#endif |
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#define __virt_to_bus __virt_to_bus |
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#define __bus_to_virt __bus_to_virt |
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#elif defined(CONFIG_FOOTBRIDGE_HOST) |
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/* |
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* The footbridge is programmed to expose the system RAM at 0xe0000000. |
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* The requirement is that the RAM isn't placed at bus address 0, which |
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* would clash with VGA cards. |
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*/ |
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#define BUS_OFFSET 0xe0000000 |
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#define __virt_to_bus(x) ((x) + (BUS_OFFSET - PAGE_OFFSET)) |
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#define __bus_to_virt(x) ((x) - (BUS_OFFSET - PAGE_OFFSET)) |
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#define __pfn_to_bus(x) (__pfn_to_phys(x) + (BUS_OFFSET - PHYS_OFFSET)) |
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#define __bus_to_pfn(x) __phys_to_pfn((x) - (BUS_OFFSET - PHYS_OFFSET)) |
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#else |
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#error "Undefined footbridge mode" |
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#endif |
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/* |
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* Cache flushing area. |
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*/ |
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#define FLUSH_BASE 0xf9000000 |
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#define FLUSH_BASE_PHYS 0x50000000 |
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#endif
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