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a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
91 lines
1.8 KiB
YAML
91 lines
1.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/i2c/ingenic,i2c.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Ingenic SoCs I2C controller devicetree bindings
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maintainers:
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- Paul Cercueil <paul@crapouillou.net>
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allOf:
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- $ref: /schemas/i2c/i2c-controller.yaml#
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properties:
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$nodename:
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pattern: "^i2c@[0-9a-f]+$"
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compatible:
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oneOf:
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- enum:
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- ingenic,jz4770-i2c
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- ingenic,x1000-i2c
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- items:
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- const: ingenic,jz4780-i2c
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- const: ingenic,jz4770-i2c
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-frequency:
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enum: [ 100000, 400000 ]
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dmas:
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items:
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- description: DMA controller phandle and request line for RX
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- description: DMA controller phandle and request line for TX
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dma-names:
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items:
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- const: rx
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- const: tx
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-frequency
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- dmas
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- dma-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/ingenic,jz4780-cgu.h>
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#include <dt-bindings/dma/jz4780-dma.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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i2c@10054000 {
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compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x10054000 0x1000>;
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interrupts = <56 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&cgu JZ4780_CLK_SMB4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pins_i2c4_data>;
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dmas = <&dma JZ4780_DMA_SMB4_RX 0xffffffff>,
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<&dma JZ4780_DMA_SMB4_TX 0xffffffff>;
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dma-names = "rx", "tx";
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clock-frequency = <400000>;
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rtc@51 {
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compatible = "nxp,pcf8563";
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reg = <0x51>;
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interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
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};
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};
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