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794 lines
23 KiB
794 lines
23 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* wm8940.c -- WM8940 ALSA Soc Audio driver |
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* |
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* Author: Jonathan Cameron <[email protected]> |
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* |
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* Based on wm8510.c |
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* Copyright 2006 Wolfson Microelectronics PLC. |
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* Author: Liam Girdwood <[email protected]> |
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* |
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* Not currently handled: |
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* Notch filter control |
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* AUXMode (inverting vs mixer) |
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* No means to obtain current gain if alc enabled. |
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* No use made of gpio |
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* Fast VMID discharge for power down |
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* Soft Start |
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* DLR and ALR Swaps not enabled |
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* Digital Sidetone not supported |
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*/ |
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#include <linux/module.h> |
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#include <linux/moduleparam.h> |
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#include <linux/kernel.h> |
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#include <linux/init.h> |
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#include <linux/delay.h> |
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#include <linux/pm.h> |
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#include <linux/i2c.h> |
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#include <linux/regmap.h> |
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#include <linux/slab.h> |
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#include <sound/core.h> |
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#include <sound/pcm.h> |
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#include <sound/pcm_params.h> |
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#include <sound/soc.h> |
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#include <sound/initval.h> |
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#include <sound/tlv.h> |
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#include "wm8940.h" |
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struct wm8940_priv { |
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unsigned int sysclk; |
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struct regmap *regmap; |
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}; |
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static bool wm8940_volatile_register(struct device *dev, unsigned int reg) |
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{ |
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switch (reg) { |
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case WM8940_SOFTRESET: |
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return true; |
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default: |
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return false; |
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} |
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} |
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static bool wm8940_readable_register(struct device *dev, unsigned int reg) |
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{ |
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switch (reg) { |
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case WM8940_SOFTRESET: |
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case WM8940_POWER1: |
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case WM8940_POWER2: |
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case WM8940_POWER3: |
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case WM8940_IFACE: |
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case WM8940_COMPANDINGCTL: |
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case WM8940_CLOCK: |
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case WM8940_ADDCNTRL: |
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case WM8940_GPIO: |
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case WM8940_CTLINT: |
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case WM8940_DAC: |
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case WM8940_DACVOL: |
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case WM8940_ADC: |
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case WM8940_ADCVOL: |
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case WM8940_NOTCH1: |
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case WM8940_NOTCH2: |
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case WM8940_NOTCH3: |
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case WM8940_NOTCH4: |
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case WM8940_NOTCH5: |
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case WM8940_NOTCH6: |
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case WM8940_NOTCH7: |
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case WM8940_NOTCH8: |
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case WM8940_DACLIM1: |
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case WM8940_DACLIM2: |
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case WM8940_ALC1: |
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case WM8940_ALC2: |
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case WM8940_ALC3: |
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case WM8940_NOISEGATE: |
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case WM8940_PLLN: |
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case WM8940_PLLK1: |
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case WM8940_PLLK2: |
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case WM8940_PLLK3: |
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case WM8940_ALC4: |
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case WM8940_INPUTCTL: |
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case WM8940_PGAGAIN: |
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case WM8940_ADCBOOST: |
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case WM8940_OUTPUTCTL: |
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case WM8940_SPKMIX: |
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case WM8940_SPKVOL: |
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case WM8940_MONOMIX: |
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return true; |
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default: |
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return false; |
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} |
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} |
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static const struct reg_default wm8940_reg_defaults[] = { |
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{ 0x1, 0x0000 }, /* Power 1 */ |
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{ 0x2, 0x0000 }, /* Power 2 */ |
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{ 0x3, 0x0000 }, /* Power 3 */ |
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{ 0x4, 0x0010 }, /* Interface Control */ |
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{ 0x5, 0x0000 }, /* Companding Control */ |
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{ 0x6, 0x0140 }, /* Clock Control */ |
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{ 0x7, 0x0000 }, /* Additional Controls */ |
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{ 0x8, 0x0000 }, /* GPIO Control */ |
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{ 0x9, 0x0002 }, /* Auto Increment Control */ |
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{ 0xa, 0x0000 }, /* DAC Control */ |
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{ 0xb, 0x00FF }, /* DAC Volume */ |
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{ 0xe, 0x0100 }, /* ADC Control */ |
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{ 0xf, 0x00FF }, /* ADC Volume */ |
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{ 0x10, 0x0000 }, /* Notch Filter 1 Control 1 */ |
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{ 0x11, 0x0000 }, /* Notch Filter 1 Control 2 */ |
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{ 0x12, 0x0000 }, /* Notch Filter 2 Control 1 */ |
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{ 0x13, 0x0000 }, /* Notch Filter 2 Control 2 */ |
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{ 0x14, 0x0000 }, /* Notch Filter 3 Control 1 */ |
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{ 0x15, 0x0000 }, /* Notch Filter 3 Control 2 */ |
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{ 0x16, 0x0000 }, /* Notch Filter 4 Control 1 */ |
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{ 0x17, 0x0000 }, /* Notch Filter 4 Control 2 */ |
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{ 0x18, 0x0032 }, /* DAC Limit Control 1 */ |
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{ 0x19, 0x0000 }, /* DAC Limit Control 2 */ |
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{ 0x20, 0x0038 }, /* ALC Control 1 */ |
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{ 0x21, 0x000B }, /* ALC Control 2 */ |
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{ 0x22, 0x0032 }, /* ALC Control 3 */ |
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{ 0x23, 0x0000 }, /* Noise Gate */ |
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{ 0x24, 0x0041 }, /* PLLN */ |
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{ 0x25, 0x000C }, /* PLLK1 */ |
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{ 0x26, 0x0093 }, /* PLLK2 */ |
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{ 0x27, 0x00E9 }, /* PLLK3 */ |
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{ 0x2a, 0x0030 }, /* ALC Control 4 */ |
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{ 0x2c, 0x0002 }, /* Input Control */ |
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{ 0x2d, 0x0050 }, /* PGA Gain */ |
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{ 0x2f, 0x0002 }, /* ADC Boost Control */ |
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{ 0x31, 0x0002 }, /* Output Control */ |
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{ 0x32, 0x0000 }, /* Speaker Mixer Control */ |
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{ 0x36, 0x0079 }, /* Speaker Volume */ |
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{ 0x38, 0x0000 }, /* Mono Mixer Control */ |
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}; |
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static const char *wm8940_companding[] = { "Off", "NC", "u-law", "A-law" }; |
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static SOC_ENUM_SINGLE_DECL(wm8940_adc_companding_enum, |
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WM8940_COMPANDINGCTL, 1, wm8940_companding); |
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static SOC_ENUM_SINGLE_DECL(wm8940_dac_companding_enum, |
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WM8940_COMPANDINGCTL, 3, wm8940_companding); |
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static const char *wm8940_alc_mode_text[] = {"ALC", "Limiter"}; |
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static SOC_ENUM_SINGLE_DECL(wm8940_alc_mode_enum, |
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WM8940_ALC3, 8, wm8940_alc_mode_text); |
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static const char *wm8940_mic_bias_level_text[] = {"0.9", "0.65"}; |
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static SOC_ENUM_SINGLE_DECL(wm8940_mic_bias_level_enum, |
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WM8940_INPUTCTL, 8, wm8940_mic_bias_level_text); |
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static const char *wm8940_filter_mode_text[] = {"Audio", "Application"}; |
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static SOC_ENUM_SINGLE_DECL(wm8940_filter_mode_enum, |
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WM8940_ADC, 7, wm8940_filter_mode_text); |
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static DECLARE_TLV_DB_SCALE(wm8940_spk_vol_tlv, -5700, 100, 1); |
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static DECLARE_TLV_DB_SCALE(wm8940_att_tlv, -1000, 1000, 0); |
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static DECLARE_TLV_DB_SCALE(wm8940_pga_vol_tlv, -1200, 75, 0); |
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static DECLARE_TLV_DB_SCALE(wm8940_alc_min_tlv, -1200, 600, 0); |
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static DECLARE_TLV_DB_SCALE(wm8940_alc_max_tlv, 675, 600, 0); |
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static DECLARE_TLV_DB_SCALE(wm8940_alc_tar_tlv, -2250, 50, 0); |
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static DECLARE_TLV_DB_SCALE(wm8940_lim_boost_tlv, 0, 100, 0); |
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static DECLARE_TLV_DB_SCALE(wm8940_lim_thresh_tlv, -600, 100, 0); |
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static DECLARE_TLV_DB_SCALE(wm8940_adc_tlv, -12750, 50, 1); |
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static DECLARE_TLV_DB_SCALE(wm8940_capture_boost_vol_tlv, 0, 2000, 0); |
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static const struct snd_kcontrol_new wm8940_snd_controls[] = { |
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SOC_SINGLE("Digital Loopback Switch", WM8940_COMPANDINGCTL, |
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6, 1, 0), |
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SOC_ENUM("DAC Companding", wm8940_dac_companding_enum), |
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SOC_ENUM("ADC Companding", wm8940_adc_companding_enum), |
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SOC_ENUM("ALC Mode", wm8940_alc_mode_enum), |
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SOC_SINGLE("ALC Switch", WM8940_ALC1, 8, 1, 0), |
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SOC_SINGLE_TLV("ALC Capture Max Gain", WM8940_ALC1, |
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3, 7, 1, wm8940_alc_max_tlv), |
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SOC_SINGLE_TLV("ALC Capture Min Gain", WM8940_ALC1, |
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0, 7, 0, wm8940_alc_min_tlv), |
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SOC_SINGLE_TLV("ALC Capture Target", WM8940_ALC2, |
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0, 14, 0, wm8940_alc_tar_tlv), |
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SOC_SINGLE("ALC Capture Hold", WM8940_ALC2, 4, 10, 0), |
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SOC_SINGLE("ALC Capture Decay", WM8940_ALC3, 4, 10, 0), |
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SOC_SINGLE("ALC Capture Attach", WM8940_ALC3, 0, 10, 0), |
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SOC_SINGLE("ALC ZC Switch", WM8940_ALC4, 1, 1, 0), |
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SOC_SINGLE("ALC Capture Noise Gate Switch", WM8940_NOISEGATE, |
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3, 1, 0), |
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SOC_SINGLE("ALC Capture Noise Gate Threshold", WM8940_NOISEGATE, |
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0, 7, 0), |
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SOC_SINGLE("DAC Playback Limiter Switch", WM8940_DACLIM1, 8, 1, 0), |
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SOC_SINGLE("DAC Playback Limiter Attack", WM8940_DACLIM1, 0, 9, 0), |
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SOC_SINGLE("DAC Playback Limiter Decay", WM8940_DACLIM1, 4, 11, 0), |
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SOC_SINGLE_TLV("DAC Playback Limiter Threshold", WM8940_DACLIM2, |
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4, 9, 1, wm8940_lim_thresh_tlv), |
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SOC_SINGLE_TLV("DAC Playback Limiter Boost", WM8940_DACLIM2, |
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0, 12, 0, wm8940_lim_boost_tlv), |
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SOC_SINGLE("Capture PGA ZC Switch", WM8940_PGAGAIN, 7, 1, 0), |
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SOC_SINGLE_TLV("Capture PGA Volume", WM8940_PGAGAIN, |
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0, 63, 0, wm8940_pga_vol_tlv), |
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SOC_SINGLE_TLV("Digital Playback Volume", WM8940_DACVOL, |
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0, 255, 0, wm8940_adc_tlv), |
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SOC_SINGLE_TLV("Digital Capture Volume", WM8940_ADCVOL, |
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0, 255, 0, wm8940_adc_tlv), |
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SOC_ENUM("Mic Bias Level", wm8940_mic_bias_level_enum), |
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SOC_SINGLE_TLV("Capture Boost Volue", WM8940_ADCBOOST, |
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8, 1, 0, wm8940_capture_boost_vol_tlv), |
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SOC_SINGLE_TLV("Speaker Playback Volume", WM8940_SPKVOL, |
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0, 63, 0, wm8940_spk_vol_tlv), |
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SOC_SINGLE("Speaker Playback Switch", WM8940_SPKVOL, 6, 1, 1), |
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SOC_SINGLE_TLV("Speaker Mixer Line Bypass Volume", WM8940_SPKVOL, |
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8, 1, 1, wm8940_att_tlv), |
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SOC_SINGLE("Speaker Playback ZC Switch", WM8940_SPKVOL, 7, 1, 0), |
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SOC_SINGLE("Mono Out Switch", WM8940_MONOMIX, 6, 1, 1), |
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SOC_SINGLE_TLV("Mono Mixer Line Bypass Volume", WM8940_MONOMIX, |
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7, 1, 1, wm8940_att_tlv), |
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SOC_SINGLE("High Pass Filter Switch", WM8940_ADC, 8, 1, 0), |
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SOC_ENUM("High Pass Filter Mode", wm8940_filter_mode_enum), |
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SOC_SINGLE("High Pass Filter Cut Off", WM8940_ADC, 4, 7, 0), |
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SOC_SINGLE("ADC Inversion Switch", WM8940_ADC, 0, 1, 0), |
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SOC_SINGLE("DAC Inversion Switch", WM8940_DAC, 0, 1, 0), |
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SOC_SINGLE("DAC Auto Mute Switch", WM8940_DAC, 2, 1, 0), |
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SOC_SINGLE("ZC Timeout Clock Switch", WM8940_ADDCNTRL, 0, 1, 0), |
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}; |
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static const struct snd_kcontrol_new wm8940_speaker_mixer_controls[] = { |
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SOC_DAPM_SINGLE("Line Bypass Switch", WM8940_SPKMIX, 1, 1, 0), |
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SOC_DAPM_SINGLE("Aux Playback Switch", WM8940_SPKMIX, 5, 1, 0), |
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SOC_DAPM_SINGLE("PCM Playback Switch", WM8940_SPKMIX, 0, 1, 0), |
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}; |
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static const struct snd_kcontrol_new wm8940_mono_mixer_controls[] = { |
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SOC_DAPM_SINGLE("Line Bypass Switch", WM8940_MONOMIX, 1, 1, 0), |
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SOC_DAPM_SINGLE("Aux Playback Switch", WM8940_MONOMIX, 2, 1, 0), |
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SOC_DAPM_SINGLE("PCM Playback Switch", WM8940_MONOMIX, 0, 1, 0), |
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}; |
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static DECLARE_TLV_DB_SCALE(wm8940_boost_vol_tlv, -1500, 300, 1); |
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static const struct snd_kcontrol_new wm8940_input_boost_controls[] = { |
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SOC_DAPM_SINGLE("Mic PGA Switch", WM8940_PGAGAIN, 6, 1, 1), |
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SOC_DAPM_SINGLE_TLV("Aux Volume", WM8940_ADCBOOST, |
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0, 7, 0, wm8940_boost_vol_tlv), |
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SOC_DAPM_SINGLE_TLV("Mic Volume", WM8940_ADCBOOST, |
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4, 7, 0, wm8940_boost_vol_tlv), |
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}; |
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static const struct snd_kcontrol_new wm8940_micpga_controls[] = { |
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SOC_DAPM_SINGLE("AUX Switch", WM8940_INPUTCTL, 2, 1, 0), |
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SOC_DAPM_SINGLE("MICP Switch", WM8940_INPUTCTL, 0, 1, 0), |
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SOC_DAPM_SINGLE("MICN Switch", WM8940_INPUTCTL, 1, 1, 0), |
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}; |
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static const struct snd_soc_dapm_widget wm8940_dapm_widgets[] = { |
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SND_SOC_DAPM_MIXER("Speaker Mixer", WM8940_POWER3, 2, 0, |
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&wm8940_speaker_mixer_controls[0], |
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ARRAY_SIZE(wm8940_speaker_mixer_controls)), |
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SND_SOC_DAPM_MIXER("Mono Mixer", WM8940_POWER3, 3, 0, |
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&wm8940_mono_mixer_controls[0], |
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ARRAY_SIZE(wm8940_mono_mixer_controls)), |
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SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8940_POWER3, 0, 0), |
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SND_SOC_DAPM_PGA("SpkN Out", WM8940_POWER3, 5, 0, NULL, 0), |
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SND_SOC_DAPM_PGA("SpkP Out", WM8940_POWER3, 6, 0, NULL, 0), |
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SND_SOC_DAPM_PGA("Mono Out", WM8940_POWER3, 7, 0, NULL, 0), |
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SND_SOC_DAPM_OUTPUT("MONOOUT"), |
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SND_SOC_DAPM_OUTPUT("SPKOUTP"), |
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SND_SOC_DAPM_OUTPUT("SPKOUTN"), |
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SND_SOC_DAPM_PGA("Aux Input", WM8940_POWER1, 6, 0, NULL, 0), |
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SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8940_POWER2, 0, 0), |
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SND_SOC_DAPM_MIXER("Mic PGA", WM8940_POWER2, 2, 0, |
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&wm8940_micpga_controls[0], |
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ARRAY_SIZE(wm8940_micpga_controls)), |
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SND_SOC_DAPM_MIXER("Boost Mixer", WM8940_POWER2, 4, 0, |
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&wm8940_input_boost_controls[0], |
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ARRAY_SIZE(wm8940_input_boost_controls)), |
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SND_SOC_DAPM_MICBIAS("Mic Bias", WM8940_POWER1, 4, 0), |
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SND_SOC_DAPM_INPUT("MICN"), |
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SND_SOC_DAPM_INPUT("MICP"), |
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SND_SOC_DAPM_INPUT("AUX"), |
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}; |
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static const struct snd_soc_dapm_route wm8940_dapm_routes[] = { |
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/* Mono output mixer */ |
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{"Mono Mixer", "PCM Playback Switch", "DAC"}, |
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{"Mono Mixer", "Aux Playback Switch", "Aux Input"}, |
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{"Mono Mixer", "Line Bypass Switch", "Boost Mixer"}, |
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/* Speaker output mixer */ |
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{"Speaker Mixer", "PCM Playback Switch", "DAC"}, |
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{"Speaker Mixer", "Aux Playback Switch", "Aux Input"}, |
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{"Speaker Mixer", "Line Bypass Switch", "Boost Mixer"}, |
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|
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/* Outputs */ |
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{"Mono Out", NULL, "Mono Mixer"}, |
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{"MONOOUT", NULL, "Mono Out"}, |
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{"SpkN Out", NULL, "Speaker Mixer"}, |
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{"SpkP Out", NULL, "Speaker Mixer"}, |
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{"SPKOUTN", NULL, "SpkN Out"}, |
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{"SPKOUTP", NULL, "SpkP Out"}, |
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|
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/* Microphone PGA */ |
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{"Mic PGA", "MICN Switch", "MICN"}, |
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{"Mic PGA", "MICP Switch", "MICP"}, |
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{"Mic PGA", "AUX Switch", "AUX"}, |
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|
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/* Boost Mixer */ |
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{"Boost Mixer", "Mic PGA Switch", "Mic PGA"}, |
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{"Boost Mixer", "Mic Volume", "MICP"}, |
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{"Boost Mixer", "Aux Volume", "Aux Input"}, |
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{"ADC", NULL, "Boost Mixer"}, |
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}; |
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|
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#define wm8940_reset(c) snd_soc_component_write(c, WM8940_SOFTRESET, 0); |
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|
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static int wm8940_set_dai_fmt(struct snd_soc_dai *codec_dai, |
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unsigned int fmt) |
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{ |
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struct snd_soc_component *component = codec_dai->component; |
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u16 iface = snd_soc_component_read(component, WM8940_IFACE) & 0xFE67; |
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u16 clk = snd_soc_component_read(component, WM8940_CLOCK) & 0x1fe; |
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|
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
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case SND_SOC_DAIFMT_CBM_CFM: |
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clk |= 1; |
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break; |
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case SND_SOC_DAIFMT_CBS_CFS: |
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break; |
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default: |
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return -EINVAL; |
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} |
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snd_soc_component_write(component, WM8940_CLOCK, clk); |
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|
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
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case SND_SOC_DAIFMT_I2S: |
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iface |= (2 << 3); |
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break; |
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case SND_SOC_DAIFMT_LEFT_J: |
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iface |= (1 << 3); |
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break; |
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case SND_SOC_DAIFMT_RIGHT_J: |
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break; |
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case SND_SOC_DAIFMT_DSP_A: |
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iface |= (3 << 3); |
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break; |
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case SND_SOC_DAIFMT_DSP_B: |
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iface |= (3 << 3) | (1 << 7); |
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break; |
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} |
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|
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
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case SND_SOC_DAIFMT_NB_NF: |
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break; |
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case SND_SOC_DAIFMT_NB_IF: |
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iface |= (1 << 7); |
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break; |
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case SND_SOC_DAIFMT_IB_NF: |
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iface |= (1 << 8); |
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break; |
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case SND_SOC_DAIFMT_IB_IF: |
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iface |= (1 << 8) | (1 << 7); |
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break; |
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} |
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|
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snd_soc_component_write(component, WM8940_IFACE, iface); |
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|
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return 0; |
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} |
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|
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static int wm8940_i2s_hw_params(struct snd_pcm_substream *substream, |
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struct snd_pcm_hw_params *params, |
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struct snd_soc_dai *dai) |
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{ |
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struct snd_soc_component *component = dai->component; |
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u16 iface = snd_soc_component_read(component, WM8940_IFACE) & 0xFD9F; |
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u16 addcntrl = snd_soc_component_read(component, WM8940_ADDCNTRL) & 0xFFF1; |
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u16 companding = snd_soc_component_read(component, |
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WM8940_COMPANDINGCTL) & 0xFFDF; |
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int ret; |
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|
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/* LoutR control */ |
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE |
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&& params_channels(params) == 2) |
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iface |= (1 << 9); |
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|
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switch (params_rate(params)) { |
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case 8000: |
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addcntrl |= (0x5 << 1); |
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break; |
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case 11025: |
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addcntrl |= (0x4 << 1); |
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break; |
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case 16000: |
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addcntrl |= (0x3 << 1); |
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break; |
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case 22050: |
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addcntrl |= (0x2 << 1); |
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break; |
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case 32000: |
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addcntrl |= (0x1 << 1); |
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break; |
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case 44100: |
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case 48000: |
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break; |
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} |
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ret = snd_soc_component_write(component, WM8940_ADDCNTRL, addcntrl); |
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if (ret) |
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goto error_ret; |
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|
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switch (params_width(params)) { |
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case 8: |
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companding = companding | (1 << 5); |
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break; |
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case 16: |
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break; |
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case 20: |
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iface |= (1 << 5); |
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break; |
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case 24: |
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iface |= (2 << 5); |
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break; |
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case 32: |
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iface |= (3 << 5); |
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break; |
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} |
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ret = snd_soc_component_write(component, WM8940_COMPANDINGCTL, companding); |
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if (ret) |
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goto error_ret; |
|
ret = snd_soc_component_write(component, WM8940_IFACE, iface); |
|
|
|
error_ret: |
|
return ret; |
|
} |
|
|
|
static int wm8940_mute(struct snd_soc_dai *dai, int mute, int direction) |
|
{ |
|
struct snd_soc_component *component = dai->component; |
|
u16 mute_reg = snd_soc_component_read(component, WM8940_DAC) & 0xffbf; |
|
|
|
if (mute) |
|
mute_reg |= 0x40; |
|
|
|
return snd_soc_component_write(component, WM8940_DAC, mute_reg); |
|
} |
|
|
|
static int wm8940_set_bias_level(struct snd_soc_component *component, |
|
enum snd_soc_bias_level level) |
|
{ |
|
struct wm8940_priv *wm8940 = snd_soc_component_get_drvdata(component); |
|
u16 val; |
|
u16 pwr_reg = snd_soc_component_read(component, WM8940_POWER1) & 0x1F0; |
|
int ret = 0; |
|
|
|
switch (level) { |
|
case SND_SOC_BIAS_ON: |
|
/* ensure bufioen and biasen */ |
|
pwr_reg |= (1 << 2) | (1 << 3); |
|
/* Enable thermal shutdown */ |
|
val = snd_soc_component_read(component, WM8940_OUTPUTCTL); |
|
ret = snd_soc_component_write(component, WM8940_OUTPUTCTL, val | 0x2); |
|
if (ret) |
|
break; |
|
/* set vmid to 75k */ |
|
ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg | 0x1); |
|
break; |
|
case SND_SOC_BIAS_PREPARE: |
|
/* ensure bufioen and biasen */ |
|
pwr_reg |= (1 << 2) | (1 << 3); |
|
ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg | 0x1); |
|
break; |
|
case SND_SOC_BIAS_STANDBY: |
|
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) { |
|
ret = regcache_sync(wm8940->regmap); |
|
if (ret < 0) { |
|
dev_err(component->dev, "Failed to sync cache: %d\n", ret); |
|
return ret; |
|
} |
|
} |
|
|
|
/* ensure bufioen and biasen */ |
|
pwr_reg |= (1 << 2) | (1 << 3); |
|
/* set vmid to 300k for standby */ |
|
ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg | 0x2); |
|
break; |
|
case SND_SOC_BIAS_OFF: |
|
ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg); |
|
break; |
|
} |
|
|
|
return ret; |
|
} |
|
|
|
struct pll_ { |
|
unsigned int pre_scale:2; |
|
unsigned int n:4; |
|
unsigned int k; |
|
}; |
|
|
|
static struct pll_ pll_div; |
|
|
|
/* The size in bits of the pll divide multiplied by 10 |
|
* to allow rounding later */ |
|
#define FIXED_PLL_SIZE ((1 << 24) * 10) |
|
static void pll_factors(unsigned int target, unsigned int source) |
|
{ |
|
unsigned long long Kpart; |
|
unsigned int K, Ndiv, Nmod; |
|
/* The left shift ist to avoid accuracy loss when right shifting */ |
|
Ndiv = target / source; |
|
|
|
if (Ndiv > 12) { |
|
source <<= 1; |
|
/* Multiply by 2 */ |
|
pll_div.pre_scale = 0; |
|
Ndiv = target / source; |
|
} else if (Ndiv < 3) { |
|
source >>= 2; |
|
/* Divide by 4 */ |
|
pll_div.pre_scale = 3; |
|
Ndiv = target / source; |
|
} else if (Ndiv < 6) { |
|
source >>= 1; |
|
/* divide by 2 */ |
|
pll_div.pre_scale = 2; |
|
Ndiv = target / source; |
|
} else |
|
pll_div.pre_scale = 1; |
|
|
|
if ((Ndiv < 6) || (Ndiv > 12)) |
|
printk(KERN_WARNING |
|
"WM8940 N value %d outwith recommended range!d\n", |
|
Ndiv); |
|
|
|
pll_div.n = Ndiv; |
|
Nmod = target % source; |
|
Kpart = FIXED_PLL_SIZE * (long long)Nmod; |
|
|
|
do_div(Kpart, source); |
|
|
|
K = Kpart & 0xFFFFFFFF; |
|
|
|
/* Check if we need to round */ |
|
if ((K % 10) >= 5) |
|
K += 5; |
|
|
|
/* Move down to proper range now rounding is done */ |
|
K /= 10; |
|
|
|
pll_div.k = K; |
|
} |
|
|
|
/* Untested at the moment */ |
|
static int wm8940_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, |
|
int source, unsigned int freq_in, unsigned int freq_out) |
|
{ |
|
struct snd_soc_component *component = codec_dai->component; |
|
u16 reg; |
|
|
|
/* Turn off PLL */ |
|
reg = snd_soc_component_read(component, WM8940_POWER1); |
|
snd_soc_component_write(component, WM8940_POWER1, reg & 0x1df); |
|
|
|
if (freq_in == 0 || freq_out == 0) { |
|
/* Clock CODEC directly from MCLK */ |
|
reg = snd_soc_component_read(component, WM8940_CLOCK); |
|
snd_soc_component_write(component, WM8940_CLOCK, reg & 0x0ff); |
|
/* Pll power down */ |
|
snd_soc_component_write(component, WM8940_PLLN, (1 << 7)); |
|
return 0; |
|
} |
|
|
|
/* Pll is followed by a frequency divide by 4 */ |
|
pll_factors(freq_out*4, freq_in); |
|
if (pll_div.k) |
|
snd_soc_component_write(component, WM8940_PLLN, |
|
(pll_div.pre_scale << 4) | pll_div.n | (1 << 6)); |
|
else /* No factional component */ |
|
snd_soc_component_write(component, WM8940_PLLN, |
|
(pll_div.pre_scale << 4) | pll_div.n); |
|
snd_soc_component_write(component, WM8940_PLLK1, pll_div.k >> 18); |
|
snd_soc_component_write(component, WM8940_PLLK2, (pll_div.k >> 9) & 0x1ff); |
|
snd_soc_component_write(component, WM8940_PLLK3, pll_div.k & 0x1ff); |
|
/* Enable the PLL */ |
|
reg = snd_soc_component_read(component, WM8940_POWER1); |
|
snd_soc_component_write(component, WM8940_POWER1, reg | 0x020); |
|
|
|
/* Run CODEC from PLL instead of MCLK */ |
|
reg = snd_soc_component_read(component, WM8940_CLOCK); |
|
snd_soc_component_write(component, WM8940_CLOCK, reg | 0x100); |
|
|
|
return 0; |
|
} |
|
|
|
static int wm8940_set_dai_sysclk(struct snd_soc_dai *codec_dai, |
|
int clk_id, unsigned int freq, int dir) |
|
{ |
|
struct snd_soc_component *component = codec_dai->component; |
|
struct wm8940_priv *wm8940 = snd_soc_component_get_drvdata(component); |
|
|
|
switch (freq) { |
|
case 11289600: |
|
case 12000000: |
|
case 12288000: |
|
case 16934400: |
|
case 18432000: |
|
wm8940->sysclk = freq; |
|
return 0; |
|
} |
|
return -EINVAL; |
|
} |
|
|
|
static int wm8940_set_dai_clkdiv(struct snd_soc_dai *codec_dai, |
|
int div_id, int div) |
|
{ |
|
struct snd_soc_component *component = codec_dai->component; |
|
u16 reg; |
|
int ret = 0; |
|
|
|
switch (div_id) { |
|
case WM8940_BCLKDIV: |
|
reg = snd_soc_component_read(component, WM8940_CLOCK) & 0xFFE3; |
|
ret = snd_soc_component_write(component, WM8940_CLOCK, reg | (div << 2)); |
|
break; |
|
case WM8940_MCLKDIV: |
|
reg = snd_soc_component_read(component, WM8940_CLOCK) & 0xFF1F; |
|
ret = snd_soc_component_write(component, WM8940_CLOCK, reg | (div << 5)); |
|
break; |
|
case WM8940_OPCLKDIV: |
|
reg = snd_soc_component_read(component, WM8940_GPIO) & 0xFFCF; |
|
ret = snd_soc_component_write(component, WM8940_GPIO, reg | (div << 4)); |
|
break; |
|
} |
|
return ret; |
|
} |
|
|
|
#define WM8940_RATES SNDRV_PCM_RATE_8000_48000 |
|
|
|
#define WM8940_FORMATS (SNDRV_PCM_FMTBIT_S8 | \ |
|
SNDRV_PCM_FMTBIT_S16_LE | \ |
|
SNDRV_PCM_FMTBIT_S20_3LE | \ |
|
SNDRV_PCM_FMTBIT_S24_LE | \ |
|
SNDRV_PCM_FMTBIT_S32_LE) |
|
|
|
static const struct snd_soc_dai_ops wm8940_dai_ops = { |
|
.hw_params = wm8940_i2s_hw_params, |
|
.set_sysclk = wm8940_set_dai_sysclk, |
|
.mute_stream = wm8940_mute, |
|
.set_fmt = wm8940_set_dai_fmt, |
|
.set_clkdiv = wm8940_set_dai_clkdiv, |
|
.set_pll = wm8940_set_dai_pll, |
|
.no_capture_mute = 1, |
|
}; |
|
|
|
static struct snd_soc_dai_driver wm8940_dai = { |
|
.name = "wm8940-hifi", |
|
.playback = { |
|
.stream_name = "Playback", |
|
.channels_min = 1, |
|
.channels_max = 2, |
|
.rates = WM8940_RATES, |
|
.formats = WM8940_FORMATS, |
|
}, |
|
.capture = { |
|
.stream_name = "Capture", |
|
.channels_min = 1, |
|
.channels_max = 2, |
|
.rates = WM8940_RATES, |
|
.formats = WM8940_FORMATS, |
|
}, |
|
.ops = &wm8940_dai_ops, |
|
.symmetric_rate = 1, |
|
}; |
|
|
|
static int wm8940_probe(struct snd_soc_component *component) |
|
{ |
|
struct wm8940_setup_data *pdata = component->dev->platform_data; |
|
int ret; |
|
u16 reg; |
|
|
|
ret = wm8940_reset(component); |
|
if (ret < 0) { |
|
dev_err(component->dev, "Failed to issue reset\n"); |
|
return ret; |
|
} |
|
|
|
snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY); |
|
|
|
ret = snd_soc_component_write(component, WM8940_POWER1, 0x180); |
|
if (ret < 0) |
|
return ret; |
|
|
|
if (!pdata) |
|
dev_warn(component->dev, "No platform data supplied\n"); |
|
else { |
|
reg = snd_soc_component_read(component, WM8940_OUTPUTCTL); |
|
ret = snd_soc_component_write(component, WM8940_OUTPUTCTL, reg | pdata->vroi); |
|
if (ret < 0) |
|
return ret; |
|
} |
|
|
|
return ret; |
|
} |
|
|
|
static const struct snd_soc_component_driver soc_component_dev_wm8940 = { |
|
.probe = wm8940_probe, |
|
.set_bias_level = wm8940_set_bias_level, |
|
.controls = wm8940_snd_controls, |
|
.num_controls = ARRAY_SIZE(wm8940_snd_controls), |
|
.dapm_widgets = wm8940_dapm_widgets, |
|
.num_dapm_widgets = ARRAY_SIZE(wm8940_dapm_widgets), |
|
.dapm_routes = wm8940_dapm_routes, |
|
.num_dapm_routes = ARRAY_SIZE(wm8940_dapm_routes), |
|
.suspend_bias_off = 1, |
|
.idle_bias_on = 1, |
|
.use_pmdown_time = 1, |
|
.endianness = 1, |
|
.non_legacy_dai_naming = 1, |
|
}; |
|
|
|
static const struct regmap_config wm8940_regmap = { |
|
.reg_bits = 8, |
|
.val_bits = 16, |
|
|
|
.max_register = WM8940_MONOMIX, |
|
.reg_defaults = wm8940_reg_defaults, |
|
.num_reg_defaults = ARRAY_SIZE(wm8940_reg_defaults), |
|
.cache_type = REGCACHE_RBTREE, |
|
|
|
.readable_reg = wm8940_readable_register, |
|
.volatile_reg = wm8940_volatile_register, |
|
}; |
|
|
|
static int wm8940_i2c_probe(struct i2c_client *i2c, |
|
const struct i2c_device_id *id) |
|
{ |
|
struct wm8940_priv *wm8940; |
|
int ret; |
|
|
|
wm8940 = devm_kzalloc(&i2c->dev, sizeof(struct wm8940_priv), |
|
GFP_KERNEL); |
|
if (wm8940 == NULL) |
|
return -ENOMEM; |
|
|
|
wm8940->regmap = devm_regmap_init_i2c(i2c, &wm8940_regmap); |
|
if (IS_ERR(wm8940->regmap)) |
|
return PTR_ERR(wm8940->regmap); |
|
|
|
i2c_set_clientdata(i2c, wm8940); |
|
|
|
ret = devm_snd_soc_register_component(&i2c->dev, |
|
&soc_component_dev_wm8940, &wm8940_dai, 1); |
|
|
|
return ret; |
|
} |
|
|
|
static const struct i2c_device_id wm8940_i2c_id[] = { |
|
{ "wm8940", 0 }, |
|
{ } |
|
}; |
|
MODULE_DEVICE_TABLE(i2c, wm8940_i2c_id); |
|
|
|
static struct i2c_driver wm8940_i2c_driver = { |
|
.driver = { |
|
.name = "wm8940", |
|
}, |
|
.probe = wm8940_i2c_probe, |
|
.id_table = wm8940_i2c_id, |
|
}; |
|
|
|
module_i2c_driver(wm8940_i2c_driver); |
|
|
|
MODULE_DESCRIPTION("ASoC WM8940 driver"); |
|
MODULE_AUTHOR("Jonathan Cameron"); |
|
MODULE_LICENSE("GPL");
|
|
|