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472 lines
12 KiB
472 lines
12 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/** |
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* omap-usb-tll.c - The USB TLL driver for OMAP EHCI & OHCI |
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* |
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* Copyright (C) 2012-2013 Texas Instruments Incorporated - https://www.ti.com |
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* Author: Keshava Munegowda <[email protected]> |
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* Author: Roger Quadros <[email protected]> |
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*/ |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/types.h> |
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#include <linux/slab.h> |
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#include <linux/spinlock.h> |
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#include <linux/platform_device.h> |
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#include <linux/clk.h> |
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#include <linux/io.h> |
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#include <linux/err.h> |
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#include <linux/pm_runtime.h> |
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#include <linux/platform_data/usb-omap.h> |
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#include <linux/of.h> |
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#include "omap-usb.h" |
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#define USBTLL_DRIVER_NAME "usbhs_tll" |
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/* TLL Register Set */ |
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#define OMAP_USBTLL_REVISION (0x00) |
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#define OMAP_USBTLL_SYSCONFIG (0x10) |
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#define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8) |
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#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3) |
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#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2) |
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#define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1) |
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#define OMAP_USBTLL_SYSCONFIG_AUTOIDLE (1 << 0) |
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#define OMAP_USBTLL_SYSSTATUS (0x14) |
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#define OMAP_USBTLL_SYSSTATUS_RESETDONE (1 << 0) |
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#define OMAP_USBTLL_IRQSTATUS (0x18) |
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#define OMAP_USBTLL_IRQENABLE (0x1C) |
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#define OMAP_TLL_SHARED_CONF (0x30) |
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#define OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN (1 << 6) |
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#define OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN (1 << 5) |
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#define OMAP_TLL_SHARED_CONF_USB_DIVRATION (1 << 2) |
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#define OMAP_TLL_SHARED_CONF_FCLK_REQ (1 << 1) |
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#define OMAP_TLL_SHARED_CONF_FCLK_IS_ON (1 << 0) |
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#define OMAP_TLL_CHANNEL_CONF(num) (0x040 + 0x004 * num) |
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#define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT 24 |
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#define OMAP_TLL_CHANNEL_CONF_DRVVBUS (1 << 16) |
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#define OMAP_TLL_CHANNEL_CONF_CHRGVBUS (1 << 15) |
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#define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF (1 << 11) |
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#define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE (1 << 10) |
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#define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE (1 << 9) |
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#define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE (1 << 8) |
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#define OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI (2 << 1) |
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#define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS (1 << 1) |
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#define OMAP_TLL_CHANNEL_CONF_CHANEN (1 << 0) |
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#define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0 0x0 |
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#define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM 0x1 |
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#define OMAP_TLL_FSLSMODE_3PIN_PHY 0x2 |
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#define OMAP_TLL_FSLSMODE_4PIN_PHY 0x3 |
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#define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0 0x4 |
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#define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM 0x5 |
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#define OMAP_TLL_FSLSMODE_3PIN_TLL 0x6 |
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#define OMAP_TLL_FSLSMODE_4PIN_TLL 0x7 |
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#define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0 0xA |
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#define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM 0xB |
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#define OMAP_TLL_ULPI_FUNCTION_CTRL(num) (0x804 + 0x100 * num) |
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#define OMAP_TLL_ULPI_INTERFACE_CTRL(num) (0x807 + 0x100 * num) |
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#define OMAP_TLL_ULPI_OTG_CTRL(num) (0x80A + 0x100 * num) |
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#define OMAP_TLL_ULPI_INT_EN_RISE(num) (0x80D + 0x100 * num) |
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#define OMAP_TLL_ULPI_INT_EN_FALL(num) (0x810 + 0x100 * num) |
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#define OMAP_TLL_ULPI_INT_STATUS(num) (0x813 + 0x100 * num) |
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#define OMAP_TLL_ULPI_INT_LATCH(num) (0x814 + 0x100 * num) |
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#define OMAP_TLL_ULPI_DEBUG(num) (0x815 + 0x100 * num) |
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#define OMAP_TLL_ULPI_SCRATCH_REGISTER(num) (0x816 + 0x100 * num) |
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#define OMAP_REV2_TLL_CHANNEL_COUNT 2 |
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#define OMAP_TLL_CHANNEL_COUNT 3 |
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#define OMAP_TLL_CHANNEL_1_EN_MASK (1 << 0) |
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#define OMAP_TLL_CHANNEL_2_EN_MASK (1 << 1) |
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#define OMAP_TLL_CHANNEL_3_EN_MASK (1 << 2) |
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/* Values of USBTLL_REVISION - Note: these are not given in the TRM */ |
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#define OMAP_USBTLL_REV1 0x00000015 /* OMAP3 */ |
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#define OMAP_USBTLL_REV2 0x00000018 /* OMAP 3630 */ |
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#define OMAP_USBTLL_REV3 0x00000004 /* OMAP4 */ |
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#define OMAP_USBTLL_REV4 0x00000006 /* OMAP5 */ |
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#define is_ehci_tll_mode(x) (x == OMAP_EHCI_PORT_MODE_TLL) |
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/* only PHY and UNUSED modes don't need TLL */ |
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#define omap_usb_mode_needs_tll(x) ((x) != OMAP_USBHS_PORT_MODE_UNUSED &&\ |
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(x) != OMAP_EHCI_PORT_MODE_PHY) |
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struct usbtll_omap { |
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void __iomem *base; |
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int nch; /* num. of channels */ |
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struct clk *ch_clk[]; /* must be the last member */ |
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}; |
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/*-------------------------------------------------------------------------*/ |
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static const char usbtll_driver_name[] = USBTLL_DRIVER_NAME; |
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static struct device *tll_dev; |
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static DEFINE_SPINLOCK(tll_lock); /* serialize access to tll_dev */ |
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/*-------------------------------------------------------------------------*/ |
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static inline void usbtll_write(void __iomem *base, u32 reg, u32 val) |
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{ |
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writel_relaxed(val, base + reg); |
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} |
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static inline u32 usbtll_read(void __iomem *base, u32 reg) |
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{ |
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return readl_relaxed(base + reg); |
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} |
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static inline void usbtll_writeb(void __iomem *base, u32 reg, u8 val) |
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{ |
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writeb_relaxed(val, base + reg); |
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} |
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static inline u8 usbtll_readb(void __iomem *base, u32 reg) |
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{ |
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return readb_relaxed(base + reg); |
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} |
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/*-------------------------------------------------------------------------*/ |
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static bool is_ohci_port(enum usbhs_omap_port_mode pmode) |
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{ |
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switch (pmode) { |
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case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: |
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case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM: |
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case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0: |
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case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM: |
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case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0: |
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case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM: |
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case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0: |
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case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM: |
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case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0: |
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case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM: |
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return true; |
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default: |
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return false; |
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} |
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} |
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/* |
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* convert the port-mode enum to a value we can use in the FSLSMODE |
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* field of USBTLL_CHANNEL_CONF |
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*/ |
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static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode) |
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{ |
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switch (mode) { |
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case OMAP_USBHS_PORT_MODE_UNUSED: |
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case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: |
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return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0; |
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case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM: |
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return OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM; |
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case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0: |
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return OMAP_TLL_FSLSMODE_3PIN_PHY; |
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case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM: |
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return OMAP_TLL_FSLSMODE_4PIN_PHY; |
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case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0: |
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return OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0; |
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case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM: |
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return OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM; |
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case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0: |
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return OMAP_TLL_FSLSMODE_3PIN_TLL; |
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case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM: |
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return OMAP_TLL_FSLSMODE_4PIN_TLL; |
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case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0: |
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return OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0; |
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case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM: |
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return OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM; |
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default: |
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pr_warn("Invalid port mode, using default\n"); |
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return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0; |
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} |
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} |
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/** |
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* usbtll_omap_probe - initialize TI-based HCDs |
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* |
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* Allocates basic resources for this USB host controller. |
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* |
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* @pdev: Pointer to this device's platform device structure |
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*/ |
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static int usbtll_omap_probe(struct platform_device *pdev) |
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{ |
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struct device *dev = &pdev->dev; |
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struct resource *res; |
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struct usbtll_omap *tll; |
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void __iomem *base; |
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int i, nch, ver; |
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dev_dbg(dev, "starting TI HSUSB TLL Controller\n"); |
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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base = devm_ioremap_resource(dev, res); |
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if (IS_ERR(base)) |
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return PTR_ERR(base); |
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pm_runtime_enable(dev); |
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pm_runtime_get_sync(dev); |
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ver = usbtll_read(base, OMAP_USBTLL_REVISION); |
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switch (ver) { |
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case OMAP_USBTLL_REV1: |
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case OMAP_USBTLL_REV4: |
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nch = OMAP_TLL_CHANNEL_COUNT; |
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break; |
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case OMAP_USBTLL_REV2: |
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case OMAP_USBTLL_REV3: |
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nch = OMAP_REV2_TLL_CHANNEL_COUNT; |
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break; |
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default: |
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nch = OMAP_TLL_CHANNEL_COUNT; |
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dev_dbg(dev, "rev 0x%x not recognized, assuming %d channels\n", |
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ver, nch); |
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break; |
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} |
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tll = devm_kzalloc(dev, sizeof(*tll) + sizeof(tll->ch_clk[nch]), |
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GFP_KERNEL); |
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if (!tll) { |
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pm_runtime_put_sync(dev); |
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pm_runtime_disable(dev); |
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return -ENOMEM; |
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} |
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tll->base = base; |
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tll->nch = nch; |
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platform_set_drvdata(pdev, tll); |
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for (i = 0; i < nch; i++) { |
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char clkname[] = "usb_tll_hs_usb_chx_clk"; |
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snprintf(clkname, sizeof(clkname), |
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"usb_tll_hs_usb_ch%d_clk", i); |
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tll->ch_clk[i] = clk_get(dev, clkname); |
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if (IS_ERR(tll->ch_clk[i])) |
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dev_dbg(dev, "can't get clock : %s\n", clkname); |
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else |
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clk_prepare(tll->ch_clk[i]); |
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} |
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pm_runtime_put_sync(dev); |
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/* only after this can omap_tll_enable/disable work */ |
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spin_lock(&tll_lock); |
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tll_dev = dev; |
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spin_unlock(&tll_lock); |
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return 0; |
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} |
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/** |
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* usbtll_omap_remove - shutdown processing for UHH & TLL HCDs |
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* @pdev: USB Host Controller being removed |
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* |
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* Reverses the effect of usbtll_omap_probe(). |
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*/ |
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static int usbtll_omap_remove(struct platform_device *pdev) |
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{ |
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struct usbtll_omap *tll = platform_get_drvdata(pdev); |
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int i; |
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spin_lock(&tll_lock); |
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tll_dev = NULL; |
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spin_unlock(&tll_lock); |
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for (i = 0; i < tll->nch; i++) { |
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if (!IS_ERR(tll->ch_clk[i])) { |
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clk_unprepare(tll->ch_clk[i]); |
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clk_put(tll->ch_clk[i]); |
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} |
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} |
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pm_runtime_disable(&pdev->dev); |
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return 0; |
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} |
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static const struct of_device_id usbtll_omap_dt_ids[] = { |
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{ .compatible = "ti,usbhs-tll" }, |
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{ } |
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}; |
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MODULE_DEVICE_TABLE(of, usbtll_omap_dt_ids); |
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static struct platform_driver usbtll_omap_driver = { |
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.driver = { |
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.name = usbtll_driver_name, |
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.of_match_table = usbtll_omap_dt_ids, |
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}, |
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.probe = usbtll_omap_probe, |
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.remove = usbtll_omap_remove, |
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}; |
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int omap_tll_init(struct usbhs_omap_platform_data *pdata) |
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{ |
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int i; |
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bool needs_tll; |
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unsigned reg; |
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struct usbtll_omap *tll; |
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if (!tll_dev) |
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return -ENODEV; |
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pm_runtime_get_sync(tll_dev); |
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spin_lock(&tll_lock); |
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tll = dev_get_drvdata(tll_dev); |
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needs_tll = false; |
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for (i = 0; i < tll->nch; i++) |
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needs_tll |= omap_usb_mode_needs_tll(pdata->port_mode[i]); |
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if (needs_tll) { |
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void __iomem *base = tll->base; |
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/* Program Common TLL register */ |
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reg = usbtll_read(base, OMAP_TLL_SHARED_CONF); |
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reg |= (OMAP_TLL_SHARED_CONF_FCLK_IS_ON |
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| OMAP_TLL_SHARED_CONF_USB_DIVRATION); |
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reg &= ~OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN; |
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reg &= ~OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN; |
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usbtll_write(base, OMAP_TLL_SHARED_CONF, reg); |
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/* Enable channels now */ |
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for (i = 0; i < tll->nch; i++) { |
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reg = usbtll_read(base, OMAP_TLL_CHANNEL_CONF(i)); |
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if (is_ohci_port(pdata->port_mode[i])) { |
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reg |= ohci_omap3_fslsmode(pdata->port_mode[i]) |
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<< OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT; |
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reg |= OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS; |
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} else if (pdata->port_mode[i] == |
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OMAP_EHCI_PORT_MODE_TLL) { |
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/* |
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* Disable UTMI AutoIdle, BitStuffing |
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* and use SDR Mode. Enable ULPI AutoIdle. |
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*/ |
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reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE |
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| OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE); |
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reg |= OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF; |
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reg |= OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE; |
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} else if (pdata->port_mode[i] == |
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OMAP_EHCI_PORT_MODE_HSIC) { |
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/* |
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* HSIC Mode requires UTMI port configurations |
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*/ |
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reg |= OMAP_TLL_CHANNEL_CONF_DRVVBUS |
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| OMAP_TLL_CHANNEL_CONF_CHRGVBUS |
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| OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI |
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| OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF; |
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} else { |
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continue; |
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} |
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reg |= OMAP_TLL_CHANNEL_CONF_CHANEN; |
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usbtll_write(base, OMAP_TLL_CHANNEL_CONF(i), reg); |
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usbtll_writeb(base, |
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OMAP_TLL_ULPI_SCRATCH_REGISTER(i), |
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0xbe); |
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} |
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} |
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spin_unlock(&tll_lock); |
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pm_runtime_put_sync(tll_dev); |
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return 0; |
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} |
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EXPORT_SYMBOL_GPL(omap_tll_init); |
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int omap_tll_enable(struct usbhs_omap_platform_data *pdata) |
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{ |
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int i; |
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struct usbtll_omap *tll; |
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if (!tll_dev) |
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return -ENODEV; |
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pm_runtime_get_sync(tll_dev); |
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spin_lock(&tll_lock); |
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tll = dev_get_drvdata(tll_dev); |
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for (i = 0; i < tll->nch; i++) { |
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if (omap_usb_mode_needs_tll(pdata->port_mode[i])) { |
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int r; |
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if (IS_ERR(tll->ch_clk[i])) |
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continue; |
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r = clk_enable(tll->ch_clk[i]); |
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if (r) { |
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dev_err(tll_dev, |
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"Error enabling ch %d clock: %d\n", i, r); |
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} |
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} |
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} |
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spin_unlock(&tll_lock); |
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return 0; |
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} |
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EXPORT_SYMBOL_GPL(omap_tll_enable); |
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int omap_tll_disable(struct usbhs_omap_platform_data *pdata) |
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{ |
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int i; |
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struct usbtll_omap *tll; |
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if (!tll_dev) |
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return -ENODEV; |
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spin_lock(&tll_lock); |
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tll = dev_get_drvdata(tll_dev); |
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for (i = 0; i < tll->nch; i++) { |
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if (omap_usb_mode_needs_tll(pdata->port_mode[i])) { |
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if (!IS_ERR(tll->ch_clk[i])) |
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clk_disable(tll->ch_clk[i]); |
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} |
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} |
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spin_unlock(&tll_lock); |
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pm_runtime_put_sync(tll_dev); |
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return 0; |
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} |
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EXPORT_SYMBOL_GPL(omap_tll_disable); |
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MODULE_AUTHOR("Keshava Munegowda <[email protected]>"); |
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MODULE_AUTHOR("Roger Quadros <[email protected]>"); |
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MODULE_LICENSE("GPL v2"); |
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MODULE_DESCRIPTION("usb tll driver for TI OMAP EHCI and OHCI controllers"); |
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static int __init omap_usbtll_drvinit(void) |
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{ |
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return platform_driver_register(&usbtll_omap_driver); |
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} |
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/* |
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* init before usbhs core driver; |
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* The usbtll driver should be initialized before |
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* the usbhs core driver probe function is called. |
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*/ |
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fs_initcall(omap_usbtll_drvinit); |
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static void __exit omap_usbtll_drvexit(void) |
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{ |
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platform_driver_unregister(&usbtll_omap_driver); |
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} |
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module_exit(omap_usbtll_drvexit);
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