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519 lines
12 KiB
519 lines
12 KiB
// SPDX-License-Identifier: GPL-2.0 |
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#define KMSG_COMPONENT "zpci" |
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#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt |
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#include <linux/kernel.h> |
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#include <linux/irq.h> |
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#include <linux/kernel_stat.h> |
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#include <linux/pci.h> |
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#include <linux/msi.h> |
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#include <linux/smp.h> |
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#include <asm/isc.h> |
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#include <asm/airq.h> |
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static enum {FLOATING, DIRECTED} irq_delivery; |
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#define SIC_IRQ_MODE_ALL 0 |
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#define SIC_IRQ_MODE_SINGLE 1 |
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#define SIC_IRQ_MODE_DIRECT 4 |
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#define SIC_IRQ_MODE_D_ALL 16 |
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#define SIC_IRQ_MODE_D_SINGLE 17 |
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#define SIC_IRQ_MODE_SET_CPU 18 |
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/* |
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* summary bit vector |
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* FLOATING - summary bit per function |
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* DIRECTED - summary bit per cpu (only used in fallback path) |
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*/ |
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static struct airq_iv *zpci_sbv; |
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/* |
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* interrupt bit vectors |
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* FLOATING - interrupt bit vector per function |
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* DIRECTED - interrupt bit vector per cpu |
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*/ |
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static struct airq_iv **zpci_ibv; |
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/* Modify PCI: Register floating adapter interruptions */ |
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static int zpci_set_airq(struct zpci_dev *zdev) |
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{ |
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u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT); |
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struct zpci_fib fib = {0}; |
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u8 status; |
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fib.fmt0.isc = PCI_ISC; |
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fib.fmt0.sum = 1; /* enable summary notifications */ |
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fib.fmt0.noi = airq_iv_end(zdev->aibv); |
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fib.fmt0.aibv = (unsigned long) zdev->aibv->vector; |
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fib.fmt0.aibvo = 0; /* each zdev has its own interrupt vector */ |
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fib.fmt0.aisb = (unsigned long) zpci_sbv->vector + (zdev->aisb/64)*8; |
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fib.fmt0.aisbo = zdev->aisb & 63; |
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return zpci_mod_fc(req, &fib, &status) ? -EIO : 0; |
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} |
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/* Modify PCI: Unregister floating adapter interruptions */ |
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static int zpci_clear_airq(struct zpci_dev *zdev) |
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{ |
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u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_DEREG_INT); |
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struct zpci_fib fib = {0}; |
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u8 cc, status; |
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cc = zpci_mod_fc(req, &fib, &status); |
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if (cc == 3 || (cc == 1 && status == 24)) |
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/* Function already gone or IRQs already deregistered. */ |
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cc = 0; |
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return cc ? -EIO : 0; |
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} |
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/* Modify PCI: Register CPU directed interruptions */ |
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static int zpci_set_directed_irq(struct zpci_dev *zdev) |
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{ |
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u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT_D); |
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struct zpci_fib fib = {0}; |
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u8 status; |
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fib.fmt = 1; |
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fib.fmt1.noi = zdev->msi_nr_irqs; |
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fib.fmt1.dibvo = zdev->msi_first_bit; |
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return zpci_mod_fc(req, &fib, &status) ? -EIO : 0; |
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} |
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/* Modify PCI: Unregister CPU directed interruptions */ |
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static int zpci_clear_directed_irq(struct zpci_dev *zdev) |
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{ |
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u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_DEREG_INT_D); |
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struct zpci_fib fib = {0}; |
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u8 cc, status; |
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fib.fmt = 1; |
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cc = zpci_mod_fc(req, &fib, &status); |
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if (cc == 3 || (cc == 1 && status == 24)) |
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/* Function already gone or IRQs already deregistered. */ |
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cc = 0; |
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return cc ? -EIO : 0; |
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} |
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/* Register adapter interruptions */ |
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int zpci_set_irq(struct zpci_dev *zdev) |
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{ |
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int rc; |
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if (irq_delivery == DIRECTED) |
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rc = zpci_set_directed_irq(zdev); |
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else |
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rc = zpci_set_airq(zdev); |
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if (!rc) |
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zdev->irqs_registered = 1; |
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return rc; |
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} |
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/* Clear adapter interruptions */ |
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int zpci_clear_irq(struct zpci_dev *zdev) |
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{ |
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int rc; |
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if (irq_delivery == DIRECTED) |
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rc = zpci_clear_directed_irq(zdev); |
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else |
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rc = zpci_clear_airq(zdev); |
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if (!rc) |
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zdev->irqs_registered = 0; |
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return rc; |
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} |
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static int zpci_set_irq_affinity(struct irq_data *data, const struct cpumask *dest, |
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bool force) |
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{ |
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struct msi_desc *entry = irq_get_msi_desc(data->irq); |
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struct msi_msg msg = entry->msg; |
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int cpu_addr = smp_cpu_get_cpu_address(cpumask_first(dest)); |
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msg.address_lo &= 0xff0000ff; |
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msg.address_lo |= (cpu_addr << 8); |
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pci_write_msi_msg(data->irq, &msg); |
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return IRQ_SET_MASK_OK; |
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} |
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static struct irq_chip zpci_irq_chip = { |
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.name = "PCI-MSI", |
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.irq_unmask = pci_msi_unmask_irq, |
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.irq_mask = pci_msi_mask_irq, |
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}; |
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static void zpci_handle_cpu_local_irq(bool rescan) |
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{ |
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struct airq_iv *dibv = zpci_ibv[smp_processor_id()]; |
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unsigned long bit; |
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int irqs_on = 0; |
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for (bit = 0;;) { |
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/* Scan the directed IRQ bit vector */ |
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bit = airq_iv_scan(dibv, bit, airq_iv_end(dibv)); |
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if (bit == -1UL) { |
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if (!rescan || irqs_on++) |
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/* End of second scan with interrupts on. */ |
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break; |
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/* First scan complete, reenable interrupts. */ |
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if (zpci_set_irq_ctrl(SIC_IRQ_MODE_D_SINGLE, PCI_ISC)) |
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break; |
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bit = 0; |
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continue; |
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} |
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inc_irq_stat(IRQIO_MSI); |
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generic_handle_irq(airq_iv_get_data(dibv, bit)); |
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} |
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} |
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struct cpu_irq_data { |
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call_single_data_t csd; |
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atomic_t scheduled; |
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}; |
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static DEFINE_PER_CPU_SHARED_ALIGNED(struct cpu_irq_data, irq_data); |
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static void zpci_handle_remote_irq(void *data) |
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{ |
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atomic_t *scheduled = data; |
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do { |
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zpci_handle_cpu_local_irq(false); |
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} while (atomic_dec_return(scheduled)); |
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} |
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static void zpci_handle_fallback_irq(void) |
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{ |
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struct cpu_irq_data *cpu_data; |
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unsigned long cpu; |
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int irqs_on = 0; |
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for (cpu = 0;;) { |
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cpu = airq_iv_scan(zpci_sbv, cpu, airq_iv_end(zpci_sbv)); |
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if (cpu == -1UL) { |
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if (irqs_on++) |
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/* End of second scan with interrupts on. */ |
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break; |
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/* First scan complete, reenable interrupts. */ |
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if (zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC)) |
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break; |
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cpu = 0; |
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continue; |
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} |
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cpu_data = &per_cpu(irq_data, cpu); |
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if (atomic_inc_return(&cpu_data->scheduled) > 1) |
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continue; |
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INIT_CSD(&cpu_data->csd, zpci_handle_remote_irq, &cpu_data->scheduled); |
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smp_call_function_single_async(cpu, &cpu_data->csd); |
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} |
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} |
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static void zpci_directed_irq_handler(struct airq_struct *airq, bool floating) |
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{ |
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if (floating) { |
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inc_irq_stat(IRQIO_PCF); |
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zpci_handle_fallback_irq(); |
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} else { |
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inc_irq_stat(IRQIO_PCD); |
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zpci_handle_cpu_local_irq(true); |
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} |
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} |
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static void zpci_floating_irq_handler(struct airq_struct *airq, bool floating) |
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{ |
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unsigned long si, ai; |
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struct airq_iv *aibv; |
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int irqs_on = 0; |
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inc_irq_stat(IRQIO_PCF); |
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for (si = 0;;) { |
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/* Scan adapter summary indicator bit vector */ |
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si = airq_iv_scan(zpci_sbv, si, airq_iv_end(zpci_sbv)); |
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if (si == -1UL) { |
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if (irqs_on++) |
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/* End of second scan with interrupts on. */ |
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break; |
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/* First scan complete, reenable interrupts. */ |
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if (zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC)) |
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break; |
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si = 0; |
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continue; |
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} |
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/* Scan the adapter interrupt vector for this device. */ |
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aibv = zpci_ibv[si]; |
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for (ai = 0;;) { |
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ai = airq_iv_scan(aibv, ai, airq_iv_end(aibv)); |
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if (ai == -1UL) |
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break; |
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inc_irq_stat(IRQIO_MSI); |
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airq_iv_lock(aibv, ai); |
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generic_handle_irq(airq_iv_get_data(aibv, ai)); |
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airq_iv_unlock(aibv, ai); |
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} |
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} |
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} |
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int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) |
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{ |
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struct zpci_dev *zdev = to_zpci(pdev); |
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unsigned int hwirq, msi_vecs, cpu; |
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unsigned long bit; |
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struct msi_desc *msi; |
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struct msi_msg msg; |
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int cpu_addr; |
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int rc, irq; |
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zdev->aisb = -1UL; |
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zdev->msi_first_bit = -1U; |
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if (type == PCI_CAP_ID_MSI && nvec > 1) |
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return 1; |
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msi_vecs = min_t(unsigned int, nvec, zdev->max_msi); |
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if (irq_delivery == DIRECTED) { |
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/* Allocate cpu vector bits */ |
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bit = airq_iv_alloc(zpci_ibv[0], msi_vecs); |
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if (bit == -1UL) |
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return -EIO; |
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} else { |
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/* Allocate adapter summary indicator bit */ |
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bit = airq_iv_alloc_bit(zpci_sbv); |
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if (bit == -1UL) |
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return -EIO; |
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zdev->aisb = bit; |
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/* Create adapter interrupt vector */ |
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zdev->aibv = airq_iv_create(msi_vecs, AIRQ_IV_DATA | AIRQ_IV_BITLOCK); |
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if (!zdev->aibv) |
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return -ENOMEM; |
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/* Wire up shortcut pointer */ |
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zpci_ibv[bit] = zdev->aibv; |
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/* Each function has its own interrupt vector */ |
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bit = 0; |
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} |
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/* Request MSI interrupts */ |
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hwirq = bit; |
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for_each_pci_msi_entry(msi, pdev) { |
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rc = -EIO; |
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if (hwirq - bit >= msi_vecs) |
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break; |
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irq = __irq_alloc_descs(-1, 0, 1, 0, THIS_MODULE, |
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(irq_delivery == DIRECTED) ? |
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msi->affinity : NULL); |
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if (irq < 0) |
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return -ENOMEM; |
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rc = irq_set_msi_desc(irq, msi); |
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if (rc) |
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return rc; |
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irq_set_chip_and_handler(irq, &zpci_irq_chip, |
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handle_percpu_irq); |
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msg.data = hwirq - bit; |
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if (irq_delivery == DIRECTED) { |
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if (msi->affinity) |
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cpu = cpumask_first(&msi->affinity->mask); |
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else |
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cpu = 0; |
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cpu_addr = smp_cpu_get_cpu_address(cpu); |
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msg.address_lo = zdev->msi_addr & 0xff0000ff; |
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msg.address_lo |= (cpu_addr << 8); |
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for_each_possible_cpu(cpu) { |
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airq_iv_set_data(zpci_ibv[cpu], hwirq, irq); |
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} |
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} else { |
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msg.address_lo = zdev->msi_addr & 0xffffffff; |
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airq_iv_set_data(zdev->aibv, hwirq, irq); |
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} |
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msg.address_hi = zdev->msi_addr >> 32; |
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pci_write_msi_msg(irq, &msg); |
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hwirq++; |
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} |
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zdev->msi_first_bit = bit; |
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zdev->msi_nr_irqs = msi_vecs; |
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rc = zpci_set_irq(zdev); |
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if (rc) |
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return rc; |
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return (msi_vecs == nvec) ? 0 : msi_vecs; |
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} |
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void arch_teardown_msi_irqs(struct pci_dev *pdev) |
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{ |
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struct zpci_dev *zdev = to_zpci(pdev); |
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struct msi_desc *msi; |
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int rc; |
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/* Disable interrupts */ |
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rc = zpci_clear_irq(zdev); |
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if (rc) |
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return; |
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/* Release MSI interrupts */ |
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for_each_pci_msi_entry(msi, pdev) { |
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if (!msi->irq) |
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continue; |
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if (msi->msi_attrib.is_msix) |
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__pci_msix_desc_mask_irq(msi, 1); |
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else |
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__pci_msi_desc_mask_irq(msi, 1, 1); |
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irq_set_msi_desc(msi->irq, NULL); |
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irq_free_desc(msi->irq); |
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msi->msg.address_lo = 0; |
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msi->msg.address_hi = 0; |
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msi->msg.data = 0; |
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msi->irq = 0; |
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} |
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if (zdev->aisb != -1UL) { |
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zpci_ibv[zdev->aisb] = NULL; |
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airq_iv_free_bit(zpci_sbv, zdev->aisb); |
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zdev->aisb = -1UL; |
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} |
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if (zdev->aibv) { |
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airq_iv_release(zdev->aibv); |
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zdev->aibv = NULL; |
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} |
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if ((irq_delivery == DIRECTED) && zdev->msi_first_bit != -1U) |
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airq_iv_free(zpci_ibv[0], zdev->msi_first_bit, zdev->msi_nr_irqs); |
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} |
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static struct airq_struct zpci_airq = { |
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.handler = zpci_floating_irq_handler, |
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.isc = PCI_ISC, |
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}; |
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static void __init cpu_enable_directed_irq(void *unused) |
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{ |
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union zpci_sic_iib iib = {{0}}; |
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iib.cdiib.dibv_addr = (u64) zpci_ibv[smp_processor_id()]->vector; |
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__zpci_set_irq_ctrl(SIC_IRQ_MODE_SET_CPU, 0, &iib); |
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zpci_set_irq_ctrl(SIC_IRQ_MODE_D_SINGLE, PCI_ISC); |
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} |
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static int __init zpci_directed_irq_init(void) |
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{ |
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union zpci_sic_iib iib = {{0}}; |
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unsigned int cpu; |
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zpci_sbv = airq_iv_create(num_possible_cpus(), 0); |
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if (!zpci_sbv) |
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return -ENOMEM; |
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iib.diib.isc = PCI_ISC; |
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iib.diib.nr_cpus = num_possible_cpus(); |
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iib.diib.disb_addr = (u64) zpci_sbv->vector; |
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__zpci_set_irq_ctrl(SIC_IRQ_MODE_DIRECT, 0, &iib); |
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zpci_ibv = kcalloc(num_possible_cpus(), sizeof(*zpci_ibv), |
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GFP_KERNEL); |
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if (!zpci_ibv) |
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return -ENOMEM; |
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for_each_possible_cpu(cpu) { |
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/* |
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* Per CPU IRQ vectors look the same but bit-allocation |
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* is only done on the first vector. |
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*/ |
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zpci_ibv[cpu] = airq_iv_create(cache_line_size() * BITS_PER_BYTE, |
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AIRQ_IV_DATA | |
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AIRQ_IV_CACHELINE | |
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(!cpu ? AIRQ_IV_ALLOC : 0)); |
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if (!zpci_ibv[cpu]) |
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return -ENOMEM; |
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} |
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on_each_cpu(cpu_enable_directed_irq, NULL, 1); |
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zpci_irq_chip.irq_set_affinity = zpci_set_irq_affinity; |
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return 0; |
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} |
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static int __init zpci_floating_irq_init(void) |
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{ |
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zpci_ibv = kcalloc(ZPCI_NR_DEVICES, sizeof(*zpci_ibv), GFP_KERNEL); |
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if (!zpci_ibv) |
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return -ENOMEM; |
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zpci_sbv = airq_iv_create(ZPCI_NR_DEVICES, AIRQ_IV_ALLOC); |
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if (!zpci_sbv) |
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goto out_free; |
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return 0; |
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out_free: |
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kfree(zpci_ibv); |
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return -ENOMEM; |
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} |
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int __init zpci_irq_init(void) |
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{ |
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int rc; |
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irq_delivery = sclp.has_dirq ? DIRECTED : FLOATING; |
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if (s390_pci_force_floating) |
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irq_delivery = FLOATING; |
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if (irq_delivery == DIRECTED) |
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zpci_airq.handler = zpci_directed_irq_handler; |
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rc = register_adapter_interrupt(&zpci_airq); |
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if (rc) |
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goto out; |
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/* Set summary to 1 to be called every time for the ISC. */ |
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*zpci_airq.lsi_ptr = 1; |
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switch (irq_delivery) { |
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case FLOATING: |
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rc = zpci_floating_irq_init(); |
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break; |
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case DIRECTED: |
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rc = zpci_directed_irq_init(); |
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break; |
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} |
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if (rc) |
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goto out_airq; |
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/* |
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* Enable floating IRQs (with suppression after one IRQ). When using |
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* directed IRQs this enables the fallback path. |
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*/ |
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zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC); |
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return 0; |
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out_airq: |
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unregister_adapter_interrupt(&zpci_airq); |
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out: |
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return rc; |
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} |
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void __init zpci_irq_exit(void) |
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{ |
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unsigned int cpu; |
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if (irq_delivery == DIRECTED) { |
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for_each_possible_cpu(cpu) { |
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airq_iv_release(zpci_ibv[cpu]); |
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} |
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} |
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kfree(zpci_ibv); |
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if (zpci_sbv) |
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airq_iv_release(zpci_sbv); |
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unregister_adapter_interrupt(&zpci_airq); |
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}
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