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91 lines
2.4 KiB
91 lines
2.4 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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#ifndef _ACI_H_ |
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#define _ACI_H_ |
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#define ACI_REG_COMMAND 0 /* write register offset */ |
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#define ACI_REG_STATUS 1 /* read register offset */ |
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#define ACI_REG_BUSY 2 /* busy register offset */ |
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#define ACI_REG_RDS 2 /* PCM20: RDS register offset */ |
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#define ACI_MINTIME 500 /* ACI time out limit */ |
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#define ACI_SET_MUTE 0x0d |
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#define ACI_SET_POWERAMP 0x0f |
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#define ACI_SET_TUNERMUTE 0xa3 |
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#define ACI_SET_TUNERMONO 0xa4 |
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#define ACI_SET_IDE 0xd0 |
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#define ACI_SET_WSS 0xd1 |
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#define ACI_SET_SOLOMODE 0xd2 |
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#define ACI_SET_PREAMP 0x03 |
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#define ACI_GET_PREAMP 0x21 |
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#define ACI_WRITE_TUNE 0xa7 |
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#define ACI_READ_TUNERSTEREO 0xa8 |
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#define ACI_READ_TUNERSTATION 0xa9 |
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#define ACI_READ_VERSION 0xf1 |
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#define ACI_READ_IDCODE 0xf2 |
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#define ACI_INIT 0xff |
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#define ACI_STATUS 0xf0 |
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#define ACI_S_GENERAL 0x00 |
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#define ACI_ERROR_OP 0xdf |
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/* ACI Mixer */ |
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/* These are the values for the right channel GET registers. |
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Add an offset of 0x01 for the left channel register. |
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(left=right+0x01) */ |
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#define ACI_GET_MASTER 0x03 |
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#define ACI_GET_MIC 0x05 |
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#define ACI_GET_LINE 0x07 |
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#define ACI_GET_CD 0x09 |
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#define ACI_GET_SYNTH 0x0b |
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#define ACI_GET_PCM 0x0d |
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#define ACI_GET_LINE1 0x10 /* Radio on PCM20 */ |
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#define ACI_GET_LINE2 0x12 |
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#define ACI_GET_EQ1 0x22 /* from Bass ... */ |
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#define ACI_GET_EQ2 0x24 |
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#define ACI_GET_EQ3 0x26 |
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#define ACI_GET_EQ4 0x28 |
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#define ACI_GET_EQ5 0x2a |
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#define ACI_GET_EQ6 0x2c |
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#define ACI_GET_EQ7 0x2e /* ... to Treble */ |
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/* And these are the values for the right channel SET registers. |
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For left channel access you have to add an offset of 0x08. |
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MASTER is an exception, which needs an offset of 0x01 */ |
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#define ACI_SET_MASTER 0x00 |
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#define ACI_SET_MIC 0x30 |
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#define ACI_SET_LINE 0x31 |
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#define ACI_SET_CD 0x34 |
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#define ACI_SET_SYNTH 0x33 |
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#define ACI_SET_PCM 0x32 |
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#define ACI_SET_LINE1 0x35 /* Radio on PCM20 */ |
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#define ACI_SET_LINE2 0x36 |
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#define ACI_SET_EQ1 0x40 /* from Bass ... */ |
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#define ACI_SET_EQ2 0x41 |
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#define ACI_SET_EQ3 0x42 |
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#define ACI_SET_EQ4 0x43 |
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#define ACI_SET_EQ5 0x44 |
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#define ACI_SET_EQ6 0x45 |
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#define ACI_SET_EQ7 0x46 /* ... to Treble */ |
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struct snd_miro_aci { |
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unsigned long aci_port; |
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int aci_vendor; |
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int aci_product; |
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int aci_version; |
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int aci_amp; |
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int aci_preamp; |
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int aci_solomode; |
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struct mutex aci_mutex; |
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}; |
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int snd_aci_cmd(struct snd_miro_aci *aci, int write1, int write2, int write3); |
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struct snd_miro_aci *snd_aci_get_aci(void); |
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#endif /* _ACI_H_ */ |
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