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124 lines
4.4 KiB
124 lines
4.4 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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/* Primary function overlay window definitions |
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* and service functions used by LPDDR chips |
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*/ |
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#ifndef __LINUX_MTD_PFOW_H |
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#define __LINUX_MTD_PFOW_H |
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#include <linux/mtd/qinfo.h> |
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/* PFOW registers addressing */ |
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/* Address of symbol "P" */ |
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#define PFOW_QUERY_STRING_P 0x0000 |
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/* Address of symbol "F" */ |
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#define PFOW_QUERY_STRING_F 0x0002 |
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/* Address of symbol "O" */ |
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#define PFOW_QUERY_STRING_O 0x0004 |
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/* Address of symbol "W" */ |
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#define PFOW_QUERY_STRING_W 0x0006 |
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/* Identification info for LPDDR chip */ |
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#define PFOW_MANUFACTURER_ID 0x0020 |
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#define PFOW_DEVICE_ID 0x0022 |
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/* Address in PFOW where prog buffer can be found */ |
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#define PFOW_PROGRAM_BUFFER_OFFSET 0x0040 |
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/* Size of program buffer in words */ |
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#define PFOW_PROGRAM_BUFFER_SIZE 0x0042 |
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/* Address command code register */ |
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#define PFOW_COMMAND_CODE 0x0080 |
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/* command data register */ |
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#define PFOW_COMMAND_DATA 0x0084 |
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/* command address register lower address bits */ |
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#define PFOW_COMMAND_ADDRESS_L 0x0088 |
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/* command address register upper address bits */ |
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#define PFOW_COMMAND_ADDRESS_H 0x008a |
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/* number of bytes to be proggrammed lower address bits */ |
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#define PFOW_DATA_COUNT_L 0x0090 |
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/* number of bytes to be proggrammed higher address bits */ |
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#define PFOW_DATA_COUNT_H 0x0092 |
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/* command execution register, the only possible value is 0x01 */ |
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#define PFOW_COMMAND_EXECUTE 0x00c0 |
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/* 0x01 should be written at this address to clear buffer */ |
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#define PFOW_CLEAR_PROGRAM_BUFFER 0x00c4 |
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/* device program/erase suspend register */ |
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#define PFOW_PROGRAM_ERASE_SUSPEND 0x00c8 |
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/* device status register */ |
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#define PFOW_DSR 0x00cc |
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/* LPDDR memory device command codes */ |
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/* They are possible values of PFOW command code register */ |
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#define LPDDR_WORD_PROGRAM 0x0041 |
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#define LPDDR_BUFF_PROGRAM 0x00E9 |
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#define LPDDR_BLOCK_ERASE 0x0020 |
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#define LPDDR_LOCK_BLOCK 0x0061 |
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#define LPDDR_UNLOCK_BLOCK 0x0062 |
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#define LPDDR_READ_BLOCK_LOCK_STATUS 0x0065 |
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#define LPDDR_INFO_QUERY 0x0098 |
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#define LPDDR_READ_OTP 0x0097 |
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#define LPDDR_PROG_OTP 0x00C0 |
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#define LPDDR_RESUME 0x00D0 |
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/* Defines possible value of PFOW command execution register */ |
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#define LPDDR_START_EXECUTION 0x0001 |
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/* Defines possible value of PFOW program/erase suspend register */ |
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#define LPDDR_SUSPEND 0x0001 |
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/* Possible values of PFOW device status register */ |
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/* access R - read; RC read & clearable */ |
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#define DSR_DPS (1<<1) /* RC; device protect status |
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* 0 - not protected 1 - locked */ |
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#define DSR_PSS (1<<2) /* R; program suspend status; |
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* 0-prog in progress/completed, |
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* 1- prog suspended */ |
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#define DSR_VPPS (1<<3) /* RC; 0-Vpp OK, * 1-Vpp low */ |
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#define DSR_PROGRAM_STATUS (1<<4) /* RC; 0-successful, 1-error */ |
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#define DSR_ERASE_STATUS (1<<5) /* RC; erase or blank check status; |
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* 0-success erase/blank check, |
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* 1 blank check error */ |
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#define DSR_ESS (1<<6) /* R; erase suspend status; |
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* 0-erase in progress/complete, |
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* 1 erase suspended */ |
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#define DSR_READY_STATUS (1<<7) /* R; Device status |
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* 0-busy, |
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* 1-ready */ |
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#define DSR_RPS (0x3<<8) /* RC; region program status |
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* 00 - Success, |
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* 01-re-program attempt in region with |
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* object mode data, |
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* 10-object mode program w attempt in |
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* region with control mode data |
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* 11-attempt to program invalid half |
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* with 0x41 command */ |
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#define DSR_AOS (1<<12) /* RC; 1- AO related failure */ |
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#define DSR_AVAILABLE (1<<15) /* R; Device availbility |
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* 1 - Device available |
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* 0 - not available */ |
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/* The superset of all possible error bits in DSR */ |
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#define DSR_ERR 0x133A |
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static inline void send_pfow_command(struct map_info *map, |
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unsigned long cmd_code, unsigned long adr, |
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unsigned long len, map_word *datum) |
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{ |
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int bits_per_chip = map_bankwidth(map) * 8; |
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map_write(map, CMD(cmd_code), map->pfow_base + PFOW_COMMAND_CODE); |
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map_write(map, CMD(adr & ((1<<bits_per_chip) - 1)), |
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map->pfow_base + PFOW_COMMAND_ADDRESS_L); |
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map_write(map, CMD(adr>>bits_per_chip), |
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map->pfow_base + PFOW_COMMAND_ADDRESS_H); |
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if (len) { |
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map_write(map, CMD(len & ((1<<bits_per_chip) - 1)), |
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map->pfow_base + PFOW_DATA_COUNT_L); |
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map_write(map, CMD(len>>bits_per_chip), |
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map->pfow_base + PFOW_DATA_COUNT_H); |
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} |
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if (datum) |
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map_write(map, *datum, map->pfow_base + PFOW_COMMAND_DATA); |
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/* Command execution start */ |
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map_write(map, CMD(LPDDR_START_EXECUTION), |
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map->pfow_base + PFOW_COMMAND_EXECUTE); |
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} |
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#endif /* __LINUX_MTD_PFOW_H */
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