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206 lines
5.4 KiB
206 lines
5.4 KiB
/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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/* |
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* Linux driver for Disk-On-Chip devices |
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* |
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* Copyright © 1999 Machine Vision Holdings, Inc. |
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* Copyright © 1999-2010 David Woodhouse <[email protected]> |
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* Copyright © 2002-2003 Greg Ungerer <[email protected]> |
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* Copyright © 2002-2003 SnapGear Inc |
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*/ |
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#ifndef __MTD_DOC2000_H__ |
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#define __MTD_DOC2000_H__ |
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#include <linux/mtd/mtd.h> |
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#include <linux/mutex.h> |
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#define DoC_Sig1 0 |
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#define DoC_Sig2 1 |
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#define DoC_ChipID 0x1000 |
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#define DoC_DOCStatus 0x1001 |
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#define DoC_DOCControl 0x1002 |
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#define DoC_FloorSelect 0x1003 |
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#define DoC_CDSNControl 0x1004 |
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#define DoC_CDSNDeviceSelect 0x1005 |
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#define DoC_ECCConf 0x1006 |
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#define DoC_2k_ECCStatus 0x1007 |
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#define DoC_CDSNSlowIO 0x100d |
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#define DoC_ECCSyndrome0 0x1010 |
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#define DoC_ECCSyndrome1 0x1011 |
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#define DoC_ECCSyndrome2 0x1012 |
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#define DoC_ECCSyndrome3 0x1013 |
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#define DoC_ECCSyndrome4 0x1014 |
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#define DoC_ECCSyndrome5 0x1015 |
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#define DoC_AliasResolution 0x101b |
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#define DoC_ConfigInput 0x101c |
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#define DoC_ReadPipeInit 0x101d |
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#define DoC_WritePipeTerm 0x101e |
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#define DoC_LastDataRead 0x101f |
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#define DoC_NOP 0x1020 |
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#define DoC_Mil_CDSN_IO 0x0800 |
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#define DoC_2k_CDSN_IO 0x1800 |
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#define DoC_Mplus_NOP 0x1002 |
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#define DoC_Mplus_AliasResolution 0x1004 |
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#define DoC_Mplus_DOCControl 0x1006 |
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#define DoC_Mplus_AccessStatus 0x1008 |
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#define DoC_Mplus_DeviceSelect 0x1008 |
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#define DoC_Mplus_Configuration 0x100a |
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#define DoC_Mplus_OutputControl 0x100c |
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#define DoC_Mplus_FlashControl 0x1020 |
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#define DoC_Mplus_FlashSelect 0x1022 |
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#define DoC_Mplus_FlashCmd 0x1024 |
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#define DoC_Mplus_FlashAddress 0x1026 |
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#define DoC_Mplus_FlashData0 0x1028 |
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#define DoC_Mplus_FlashData1 0x1029 |
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#define DoC_Mplus_ReadPipeInit 0x102a |
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#define DoC_Mplus_LastDataRead 0x102c |
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#define DoC_Mplus_LastDataRead1 0x102d |
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#define DoC_Mplus_WritePipeTerm 0x102e |
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#define DoC_Mplus_ECCSyndrome0 0x1040 |
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#define DoC_Mplus_ECCSyndrome1 0x1041 |
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#define DoC_Mplus_ECCSyndrome2 0x1042 |
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#define DoC_Mplus_ECCSyndrome3 0x1043 |
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#define DoC_Mplus_ECCSyndrome4 0x1044 |
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#define DoC_Mplus_ECCSyndrome5 0x1045 |
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#define DoC_Mplus_ECCConf 0x1046 |
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#define DoC_Mplus_Toggle 0x1046 |
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#define DoC_Mplus_DownloadStatus 0x1074 |
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#define DoC_Mplus_CtrlConfirm 0x1076 |
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#define DoC_Mplus_Power 0x1fff |
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/* How to access the device? |
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* On ARM, it'll be mmap'd directly with 32-bit wide accesses. |
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* On PPC, it's mmap'd and 16-bit wide. |
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* Others use readb/writeb |
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*/ |
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#if defined(__arm__) |
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static inline u8 ReadDOC_(u32 __iomem *addr, unsigned long reg) |
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{ |
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return __raw_readl(addr + reg); |
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} |
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static inline void WriteDOC_(u8 data, u32 __iomem *addr, unsigned long reg) |
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{ |
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__raw_writel(data, addr + reg); |
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wmb(); |
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} |
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#define DOC_IOREMAP_LEN 0x8000 |
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#elif defined(__ppc__) |
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static inline u8 ReadDOC_(u16 __iomem *addr, unsigned long reg) |
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{ |
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return __raw_readw(addr + reg); |
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} |
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static inline void WriteDOC_(u8 data, u16 __iomem *addr, unsigned long reg) |
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{ |
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__raw_writew(data, addr + reg); |
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wmb(); |
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} |
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#define DOC_IOREMAP_LEN 0x4000 |
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#else |
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#define ReadDOC_(adr, reg) readb((void __iomem *)(adr) + (reg)) |
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#define WriteDOC_(d, adr, reg) writeb(d, (void __iomem *)(adr) + (reg)) |
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#define DOC_IOREMAP_LEN 0x2000 |
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#endif |
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#if defined(__i386__) || defined(__x86_64__) |
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#define USE_MEMCPY |
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#endif |
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/* These are provided to directly use the DoC_xxx defines */ |
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#define ReadDOC(adr, reg) ReadDOC_(adr,DoC_##reg) |
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#define WriteDOC(d, adr, reg) WriteDOC_(d,adr,DoC_##reg) |
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#define DOC_MODE_RESET 0 |
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#define DOC_MODE_NORMAL 1 |
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#define DOC_MODE_RESERVED1 2 |
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#define DOC_MODE_RESERVED2 3 |
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#define DOC_MODE_CLR_ERR 0x80 |
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#define DOC_MODE_RST_LAT 0x10 |
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#define DOC_MODE_BDECT 0x08 |
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#define DOC_MODE_MDWREN 0x04 |
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#define DOC_ChipID_Doc2k 0x20 |
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#define DOC_ChipID_Doc2kTSOP 0x21 /* internal number for MTD */ |
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#define DOC_ChipID_DocMil 0x30 |
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#define DOC_ChipID_DocMilPlus32 0x40 |
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#define DOC_ChipID_DocMilPlus16 0x41 |
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#define CDSN_CTRL_FR_B 0x80 |
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#define CDSN_CTRL_FR_B0 0x40 |
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#define CDSN_CTRL_FR_B1 0x80 |
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#define CDSN_CTRL_ECC_IO 0x20 |
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#define CDSN_CTRL_FLASH_IO 0x10 |
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#define CDSN_CTRL_WP 0x08 |
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#define CDSN_CTRL_ALE 0x04 |
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#define CDSN_CTRL_CLE 0x02 |
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#define CDSN_CTRL_CE 0x01 |
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#define DOC_ECC_RESET 0 |
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#define DOC_ECC_ERROR 0x80 |
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#define DOC_ECC_RW 0x20 |
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#define DOC_ECC__EN 0x08 |
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#define DOC_TOGGLE_BIT 0x04 |
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#define DOC_ECC_RESV 0x02 |
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#define DOC_ECC_IGNORE 0x01 |
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#define DOC_FLASH_CE 0x80 |
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#define DOC_FLASH_WP 0x40 |
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#define DOC_FLASH_BANK 0x02 |
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/* We have to also set the reserved bit 1 for enable */ |
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#define DOC_ECC_EN (DOC_ECC__EN | DOC_ECC_RESV) |
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#define DOC_ECC_DIS (DOC_ECC_RESV) |
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struct Nand { |
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char floor, chip; |
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unsigned long curadr; |
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unsigned char curmode; |
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/* Also some erase/write/pipeline info when we get that far */ |
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}; |
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#define MAX_FLOORS 4 |
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#define MAX_CHIPS 4 |
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#define MAX_FLOORS_MIL 1 |
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#define MAX_CHIPS_MIL 1 |
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#define MAX_FLOORS_MPLUS 2 |
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#define MAX_CHIPS_MPLUS 1 |
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#define ADDR_COLUMN 1 |
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#define ADDR_PAGE 2 |
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#define ADDR_COLUMN_PAGE 3 |
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struct DiskOnChip { |
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unsigned long physadr; |
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void __iomem *virtadr; |
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unsigned long totlen; |
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unsigned char ChipID; /* Type of DiskOnChip */ |
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int ioreg; |
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unsigned long mfr; /* Flash IDs - only one type of flash per device */ |
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unsigned long id; |
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int chipshift; |
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char page256; |
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char pageadrlen; |
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char interleave; /* Internal interleaving - Millennium Plus style */ |
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unsigned long erasesize; |
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int curfloor; |
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int curchip; |
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int numchips; |
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struct Nand *chips; |
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struct mtd_info *nextdoc; |
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struct mutex lock; |
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}; |
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int doc_decode_ecc(unsigned char sector[512], unsigned char ecc1[6]); |
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#endif /* __MTD_DOC2000_H__ */
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