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155 lines
4.2 KiB
155 lines
4.2 KiB
/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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/* |
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* include/linux/fsl_devices.h |
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* |
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* Definitions for any platform device related flags or structures for |
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* Freescale processor devices |
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* |
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* Maintainer: Kumar Gala <[email protected]> |
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* |
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* Copyright 2004,2012 Freescale Semiconductor, Inc |
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*/ |
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#ifndef _FSL_DEVICE_H_ |
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#define _FSL_DEVICE_H_ |
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#define FSL_UTMI_PHY_DLY 10 /*As per P1010RM, delay for UTMI |
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PHY CLK to become stable - 10ms*/ |
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#define FSL_USB_PHY_CLK_TIMEOUT 10000 /* uSec */ |
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#include <linux/types.h> |
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/* |
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* Some conventions on how we handle peripherals on Freescale chips |
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* |
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* unique device: a platform_device entry in fsl_plat_devs[] plus |
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* associated device information in its platform_data structure. |
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* |
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* A chip is described by a set of unique devices. |
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* |
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* Each sub-arch has its own master list of unique devices and |
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* enumerates them by enum fsl_devices in a sub-arch specific header |
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* |
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* The platform data structure is broken into two parts. The |
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* first is device specific information that help identify any |
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* unique features of a peripheral. The second is any |
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* information that may be defined by the board or how the device |
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* is connected externally of the chip. |
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* |
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* naming conventions: |
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* - platform data structures: <driver>_platform_data |
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* - platform data device flags: FSL_<driver>_DEV_<FLAG> |
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* - platform data board flags: FSL_<driver>_BRD_<FLAG> |
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* |
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*/ |
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enum fsl_usb2_controller_ver { |
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FSL_USB_VER_NONE = -1, |
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FSL_USB_VER_OLD = 0, |
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FSL_USB_VER_1_6 = 1, |
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FSL_USB_VER_2_2 = 2, |
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FSL_USB_VER_2_4 = 3, |
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FSL_USB_VER_2_5 = 4, |
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}; |
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enum fsl_usb2_operating_modes { |
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FSL_USB2_MPH_HOST, |
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FSL_USB2_DR_HOST, |
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FSL_USB2_DR_DEVICE, |
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FSL_USB2_DR_OTG, |
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}; |
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enum fsl_usb2_phy_modes { |
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FSL_USB2_PHY_NONE, |
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FSL_USB2_PHY_ULPI, |
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FSL_USB2_PHY_UTMI, |
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FSL_USB2_PHY_UTMI_WIDE, |
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FSL_USB2_PHY_SERIAL, |
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FSL_USB2_PHY_UTMI_DUAL, |
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}; |
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struct clk; |
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struct platform_device; |
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struct fsl_usb2_platform_data { |
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/* board specific information */ |
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enum fsl_usb2_controller_ver controller_ver; |
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enum fsl_usb2_operating_modes operating_mode; |
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enum fsl_usb2_phy_modes phy_mode; |
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unsigned int port_enables; |
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unsigned int workaround; |
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int (*init)(struct platform_device *); |
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void (*exit)(struct platform_device *); |
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void __iomem *regs; /* ioremap'd register base */ |
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struct clk *clk; |
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unsigned power_budget; /* hcd->power_budget */ |
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unsigned big_endian_mmio:1; |
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unsigned big_endian_desc:1; |
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unsigned es:1; /* need USBMODE:ES */ |
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unsigned le_setup_buf:1; |
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unsigned have_sysif_regs:1; |
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unsigned invert_drvvbus:1; |
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unsigned invert_pwr_fault:1; |
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unsigned suspended:1; |
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unsigned already_suspended:1; |
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unsigned has_fsl_erratum_a007792:1; |
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unsigned has_fsl_erratum_14:1; |
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unsigned has_fsl_erratum_a005275:1; |
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unsigned has_fsl_erratum_a005697:1; |
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unsigned has_fsl_erratum_a006918:1; |
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unsigned check_phy_clk_valid:1; |
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/* register save area for suspend/resume */ |
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u32 pm_command; |
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u32 pm_status; |
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u32 pm_intr_enable; |
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u32 pm_frame_index; |
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u32 pm_segment; |
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u32 pm_frame_list; |
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u32 pm_async_next; |
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u32 pm_configured_flag; |
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u32 pm_portsc; |
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u32 pm_usbgenctrl; |
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}; |
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/* Flags in fsl_usb2_mph_platform_data */ |
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#define FSL_USB2_PORT0_ENABLED 0x00000001 |
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#define FSL_USB2_PORT1_ENABLED 0x00000002 |
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#define FLS_USB2_WORKAROUND_ENGCM09152 (1 << 0) |
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struct spi_device; |
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struct fsl_spi_platform_data { |
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u32 initial_spmode; /* initial SPMODE value */ |
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s16 bus_num; |
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unsigned int flags; |
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#define SPI_QE_CPU_MODE (1 << 0) /* QE CPU ("PIO") mode */ |
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#define SPI_CPM_MODE (1 << 1) /* CPM/QE ("DMA") mode */ |
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#define SPI_CPM1 (1 << 2) /* SPI unit is in CPM1 block */ |
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#define SPI_CPM2 (1 << 3) /* SPI unit is in CPM2 block */ |
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#define SPI_QE (1 << 4) /* SPI unit is in QE block */ |
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/* board specific information */ |
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u16 max_chipselect; |
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void (*cs_control)(struct spi_device *spi, bool on); |
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u32 sysclk; |
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}; |
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struct mpc8xx_pcmcia_ops { |
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void(*hw_ctrl)(int slot, int enable); |
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int(*voltage_set)(int slot, int vcc, int vpp); |
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}; |
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/* Returns non-zero if the current suspend operation would |
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* lead to a deep sleep (i.e. power removed from the core, |
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* instead of just the clock). |
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*/ |
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#if defined(CONFIG_PPC_83xx) && defined(CONFIG_SUSPEND) |
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int fsl_deep_sleep(void); |
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#else |
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static inline int fsl_deep_sleep(void) { return 0; } |
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#endif |
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#endif /* _FSL_DEVICE_H_ */
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