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181 lines
4.3 KiB
181 lines
4.3 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. |
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*/ |
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#ifndef __LINUX_CLK_TEGRA_H_ |
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#define __LINUX_CLK_TEGRA_H_ |
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#include <linux/types.h> |
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#include <linux/bug.h> |
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/* |
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* Tegra CPU clock and reset control ops |
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* |
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* wait_for_reset: |
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* keep waiting until the CPU in reset state |
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* put_in_reset: |
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* put the CPU in reset state |
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* out_of_reset: |
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* release the CPU from reset state |
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* enable_clock: |
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* CPU clock un-gate |
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* disable_clock: |
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* CPU clock gate |
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* rail_off_ready: |
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* CPU is ready for rail off |
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* suspend: |
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* save the clock settings when CPU go into low-power state |
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* resume: |
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* restore the clock settings when CPU exit low-power state |
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*/ |
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struct tegra_cpu_car_ops { |
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void (*wait_for_reset)(u32 cpu); |
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void (*put_in_reset)(u32 cpu); |
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void (*out_of_reset)(u32 cpu); |
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void (*enable_clock)(u32 cpu); |
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void (*disable_clock)(u32 cpu); |
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#ifdef CONFIG_PM_SLEEP |
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bool (*rail_off_ready)(void); |
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void (*suspend)(void); |
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void (*resume)(void); |
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#endif |
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}; |
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extern struct tegra_cpu_car_ops *tegra_cpu_car_ops; |
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static inline void tegra_wait_cpu_in_reset(u32 cpu) |
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{ |
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if (WARN_ON(!tegra_cpu_car_ops->wait_for_reset)) |
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return; |
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tegra_cpu_car_ops->wait_for_reset(cpu); |
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} |
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static inline void tegra_put_cpu_in_reset(u32 cpu) |
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{ |
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if (WARN_ON(!tegra_cpu_car_ops->put_in_reset)) |
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return; |
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tegra_cpu_car_ops->put_in_reset(cpu); |
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} |
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static inline void tegra_cpu_out_of_reset(u32 cpu) |
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{ |
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if (WARN_ON(!tegra_cpu_car_ops->out_of_reset)) |
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return; |
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tegra_cpu_car_ops->out_of_reset(cpu); |
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} |
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static inline void tegra_enable_cpu_clock(u32 cpu) |
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{ |
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if (WARN_ON(!tegra_cpu_car_ops->enable_clock)) |
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return; |
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tegra_cpu_car_ops->enable_clock(cpu); |
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} |
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static inline void tegra_disable_cpu_clock(u32 cpu) |
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{ |
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if (WARN_ON(!tegra_cpu_car_ops->disable_clock)) |
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return; |
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tegra_cpu_car_ops->disable_clock(cpu); |
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} |
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#ifdef CONFIG_PM_SLEEP |
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static inline bool tegra_cpu_rail_off_ready(void) |
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{ |
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if (WARN_ON(!tegra_cpu_car_ops->rail_off_ready)) |
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return false; |
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return tegra_cpu_car_ops->rail_off_ready(); |
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} |
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static inline void tegra_cpu_clock_suspend(void) |
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{ |
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if (WARN_ON(!tegra_cpu_car_ops->suspend)) |
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return; |
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tegra_cpu_car_ops->suspend(); |
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} |
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static inline void tegra_cpu_clock_resume(void) |
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{ |
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if (WARN_ON(!tegra_cpu_car_ops->resume)) |
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return; |
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tegra_cpu_car_ops->resume(); |
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} |
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#else |
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static inline bool tegra_cpu_rail_off_ready(void) |
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{ |
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return false; |
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} |
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static inline void tegra_cpu_clock_suspend(void) |
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{ |
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} |
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static inline void tegra_cpu_clock_resume(void) |
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{ |
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} |
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#endif |
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extern void tegra210_xusb_pll_hw_control_enable(void); |
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extern void tegra210_xusb_pll_hw_sequence_start(void); |
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extern void tegra210_sata_pll_hw_control_enable(void); |
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extern void tegra210_sata_pll_hw_sequence_start(void); |
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extern void tegra210_set_sata_pll_seq_sw(bool state); |
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extern void tegra210_put_utmipll_in_iddq(void); |
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extern void tegra210_put_utmipll_out_iddq(void); |
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extern int tegra210_clk_handle_mbist_war(unsigned int id); |
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extern void tegra210_clk_emc_dll_enable(bool flag); |
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extern void tegra210_clk_emc_dll_update_setting(u32 emc_dll_src_value); |
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extern void tegra210_clk_emc_update_setting(u32 emc_src_value); |
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struct clk; |
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struct tegra_emc; |
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typedef long (tegra20_clk_emc_round_cb)(unsigned long rate, |
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unsigned long min_rate, |
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unsigned long max_rate, |
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void *arg); |
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void tegra20_clk_set_emc_round_callback(tegra20_clk_emc_round_cb *round_cb, |
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void *cb_arg); |
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int tegra20_clk_prepare_emc_mc_same_freq(struct clk *emc_clk, bool same); |
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typedef int (tegra124_emc_prepare_timing_change_cb)(struct tegra_emc *emc, |
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unsigned long rate); |
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typedef void (tegra124_emc_complete_timing_change_cb)(struct tegra_emc *emc, |
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unsigned long rate); |
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void tegra124_clk_set_emc_callbacks(tegra124_emc_prepare_timing_change_cb *prep_cb, |
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tegra124_emc_complete_timing_change_cb *complete_cb); |
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struct tegra210_clk_emc_config { |
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unsigned long rate; |
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bool same_freq; |
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u32 value; |
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unsigned long parent_rate; |
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u8 parent; |
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}; |
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struct tegra210_clk_emc_provider { |
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struct module *owner; |
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struct device *dev; |
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struct tegra210_clk_emc_config *configs; |
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unsigned int num_configs; |
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int (*set_rate)(struct device *dev, |
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const struct tegra210_clk_emc_config *config); |
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}; |
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int tegra210_clk_emc_attach(struct clk *clk, |
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struct tegra210_clk_emc_provider *provider); |
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void tegra210_clk_emc_detach(struct clk *clk); |
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#endif /* __LINUX_CLK_TEGRA_H_ */
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