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89 lines
2.2 KiB
89 lines
2.2 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* Copyright 2014 Oleksij Rempel <[email protected]> |
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*/ |
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#ifndef _DT_BINDINGS_CLK_ASM9260_H |
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#define _DT_BINDINGS_CLK_ASM9260_H |
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/* ahb gate */ |
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#define CLKID_AHB_ROM 0 |
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#define CLKID_AHB_RAM 1 |
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#define CLKID_AHB_GPIO 2 |
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#define CLKID_AHB_MAC 3 |
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#define CLKID_AHB_EMI 4 |
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#define CLKID_AHB_USB0 5 |
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#define CLKID_AHB_USB1 6 |
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#define CLKID_AHB_DMA0 7 |
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#define CLKID_AHB_DMA1 8 |
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#define CLKID_AHB_UART0 9 |
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#define CLKID_AHB_UART1 10 |
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#define CLKID_AHB_UART2 11 |
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#define CLKID_AHB_UART3 12 |
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#define CLKID_AHB_UART4 13 |
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#define CLKID_AHB_UART5 14 |
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#define CLKID_AHB_UART6 15 |
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#define CLKID_AHB_UART7 16 |
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#define CLKID_AHB_UART8 17 |
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#define CLKID_AHB_UART9 18 |
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#define CLKID_AHB_I2S0 19 |
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#define CLKID_AHB_I2C0 20 |
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#define CLKID_AHB_I2C1 21 |
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#define CLKID_AHB_SSP0 22 |
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#define CLKID_AHB_IOCONFIG 23 |
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#define CLKID_AHB_WDT 24 |
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#define CLKID_AHB_CAN0 25 |
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#define CLKID_AHB_CAN1 26 |
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#define CLKID_AHB_MPWM 27 |
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#define CLKID_AHB_SPI0 28 |
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#define CLKID_AHB_SPI1 29 |
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#define CLKID_AHB_QEI 30 |
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#define CLKID_AHB_QUADSPI0 31 |
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#define CLKID_AHB_CAMIF 32 |
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#define CLKID_AHB_LCDIF 33 |
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#define CLKID_AHB_TIMER0 34 |
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#define CLKID_AHB_TIMER1 35 |
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#define CLKID_AHB_TIMER2 36 |
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#define CLKID_AHB_TIMER3 37 |
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#define CLKID_AHB_IRQ 38 |
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#define CLKID_AHB_RTC 39 |
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#define CLKID_AHB_NAND 40 |
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#define CLKID_AHB_ADC0 41 |
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#define CLKID_AHB_LED 42 |
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#define CLKID_AHB_DAC0 43 |
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#define CLKID_AHB_LCD 44 |
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#define CLKID_AHB_I2S1 45 |
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#define CLKID_AHB_MAC1 46 |
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/* devider */ |
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#define CLKID_SYS_CPU 47 |
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#define CLKID_SYS_AHB 48 |
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#define CLKID_SYS_I2S0M 49 |
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#define CLKID_SYS_I2S0S 50 |
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#define CLKID_SYS_I2S1M 51 |
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#define CLKID_SYS_I2S1S 52 |
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#define CLKID_SYS_UART0 53 |
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#define CLKID_SYS_UART1 54 |
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#define CLKID_SYS_UART2 55 |
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#define CLKID_SYS_UART3 56 |
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#define CLKID_SYS_UART4 56 |
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#define CLKID_SYS_UART5 57 |
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#define CLKID_SYS_UART6 58 |
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#define CLKID_SYS_UART7 59 |
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#define CLKID_SYS_UART8 60 |
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#define CLKID_SYS_UART9 61 |
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#define CLKID_SYS_SPI0 62 |
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#define CLKID_SYS_SPI1 63 |
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#define CLKID_SYS_QUADSPI 64 |
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#define CLKID_SYS_SSP0 65 |
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#define CLKID_SYS_NAND 66 |
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#define CLKID_SYS_TRACE 67 |
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#define CLKID_SYS_CAMM 68 |
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#define CLKID_SYS_WDT 69 |
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#define CLKID_SYS_CLKOUT 70 |
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#define CLKID_SYS_MAC 71 |
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#define CLKID_SYS_LCD 72 |
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#define CLKID_SYS_ADCANA 73 |
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#define MAX_CLKS 74 |
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#endif
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