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291 lines
6.8 KiB
291 lines
6.8 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* Marvell 88E6xxx Switch Global 2 Scratch & Misc Registers support |
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* |
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* Copyright (c) 2008 Marvell Semiconductor |
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* |
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* Copyright (c) 2017 National Instruments |
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* Brandon Streiff <[email protected]> |
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*/ |
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#include "chip.h" |
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#include "global2.h" |
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/* Offset 0x1A: Scratch and Misc. Register */ |
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static int mv88e6xxx_g2_scratch_read(struct mv88e6xxx_chip *chip, int reg, |
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u8 *data) |
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{ |
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u16 value; |
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int err; |
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err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SCRATCH_MISC_MISC, |
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reg << 8); |
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if (err) |
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return err; |
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err = mv88e6xxx_g2_read(chip, MV88E6XXX_G2_SCRATCH_MISC_MISC, &value); |
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if (err) |
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return err; |
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*data = (value & MV88E6XXX_G2_SCRATCH_MISC_DATA_MASK); |
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return 0; |
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} |
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static int mv88e6xxx_g2_scratch_write(struct mv88e6xxx_chip *chip, int reg, |
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u8 data) |
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{ |
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u16 value = (reg << 8) | data; |
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return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SCRATCH_MISC_MISC, |
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MV88E6XXX_G2_SCRATCH_MISC_UPDATE | value); |
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} |
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/** |
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* mv88e6xxx_g2_scratch_gpio_get_bit - get a bit |
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* @chip: chip private data |
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* @base_reg: base of scratch bits |
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* @offset: index of bit within the register |
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* @set: is bit set? |
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*/ |
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static int mv88e6xxx_g2_scratch_get_bit(struct mv88e6xxx_chip *chip, |
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int base_reg, unsigned int offset, |
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int *set) |
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{ |
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int reg = base_reg + (offset / 8); |
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u8 mask = (1 << (offset & 0x7)); |
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u8 val; |
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int err; |
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err = mv88e6xxx_g2_scratch_read(chip, reg, &val); |
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if (err) |
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return err; |
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*set = !!(mask & val); |
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return 0; |
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} |
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/** |
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* mv88e6xxx_g2_scratch_gpio_set_bit - set (or clear) a bit |
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* @chip: chip private data |
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* @base_reg: base of scratch bits |
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* @offset: index of bit within the register |
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* @set: should this bit be set? |
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* |
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* Helper function for dealing with the direction and data registers. |
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*/ |
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static int mv88e6xxx_g2_scratch_set_bit(struct mv88e6xxx_chip *chip, |
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int base_reg, unsigned int offset, |
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int set) |
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{ |
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int reg = base_reg + (offset / 8); |
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u8 mask = (1 << (offset & 0x7)); |
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u8 val; |
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int err; |
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err = mv88e6xxx_g2_scratch_read(chip, reg, &val); |
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if (err) |
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return err; |
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if (set) |
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val |= mask; |
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else |
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val &= ~mask; |
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return mv88e6xxx_g2_scratch_write(chip, reg, val); |
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} |
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/** |
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* mv88e6352_g2_scratch_gpio_get_data - get data on gpio pin |
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* @chip: chip private data |
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* @pin: gpio index |
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* |
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* Return: 0 for low, 1 for high, negative error |
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*/ |
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static int mv88e6352_g2_scratch_gpio_get_data(struct mv88e6xxx_chip *chip, |
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unsigned int pin) |
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{ |
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int val = 0; |
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int err; |
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err = mv88e6xxx_g2_scratch_get_bit(chip, |
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MV88E6352_G2_SCRATCH_GPIO_DATA0, |
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pin, &val); |
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if (err) |
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return err; |
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return val; |
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} |
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/** |
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* mv88e6352_g2_scratch_gpio_set_data - set data on gpio pin |
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* @chip: chip private data |
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* @pin: gpio index |
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* @value: value to set |
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*/ |
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static int mv88e6352_g2_scratch_gpio_set_data(struct mv88e6xxx_chip *chip, |
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unsigned int pin, int value) |
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{ |
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u8 mask = (1 << (pin & 0x7)); |
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int offset = (pin / 8); |
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int reg; |
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reg = MV88E6352_G2_SCRATCH_GPIO_DATA0 + offset; |
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if (value) |
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chip->gpio_data[offset] |= mask; |
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else |
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chip->gpio_data[offset] &= ~mask; |
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return mv88e6xxx_g2_scratch_write(chip, reg, chip->gpio_data[offset]); |
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} |
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/** |
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* mv88e6352_g2_scratch_gpio_get_dir - get direction of gpio pin |
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* @chip: chip private data |
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* @pin: gpio index |
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* |
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* Return: 0 for output, 1 for input (same as GPIOF_DIR_XXX). |
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*/ |
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static int mv88e6352_g2_scratch_gpio_get_dir(struct mv88e6xxx_chip *chip, |
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unsigned int pin) |
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{ |
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int val = 0; |
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int err; |
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err = mv88e6xxx_g2_scratch_get_bit(chip, |
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MV88E6352_G2_SCRATCH_GPIO_DIR0, |
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pin, &val); |
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if (err) |
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return err; |
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return val; |
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} |
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/** |
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* mv88e6352_g2_scratch_gpio_set_dir - set direction of gpio pin |
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* @chip: chip private data |
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* @pin: gpio index |
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* @input: should the gpio be an input, or an output? |
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*/ |
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static int mv88e6352_g2_scratch_gpio_set_dir(struct mv88e6xxx_chip *chip, |
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unsigned int pin, bool input) |
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{ |
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int value = (input ? MV88E6352_G2_SCRATCH_GPIO_DIR_IN : |
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MV88E6352_G2_SCRATCH_GPIO_DIR_OUT); |
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return mv88e6xxx_g2_scratch_set_bit(chip, |
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MV88E6352_G2_SCRATCH_GPIO_DIR0, |
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pin, value); |
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} |
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/** |
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* mv88e6352_g2_scratch_gpio_get_pctl - get pin control setting |
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* @chip: chip private data |
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* @pin: gpio index |
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* @func: function number |
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* |
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* Note that the function numbers themselves may vary by chipset. |
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*/ |
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static int mv88e6352_g2_scratch_gpio_get_pctl(struct mv88e6xxx_chip *chip, |
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unsigned int pin, int *func) |
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{ |
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int reg = MV88E6352_G2_SCRATCH_GPIO_PCTL0 + (pin / 2); |
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int offset = (pin & 0x1) ? 4 : 0; |
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u8 mask = (0x7 << offset); |
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int err; |
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u8 val; |
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err = mv88e6xxx_g2_scratch_read(chip, reg, &val); |
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if (err) |
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return err; |
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*func = (val & mask) >> offset; |
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return 0; |
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} |
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/** |
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* mv88e6352_g2_scratch_gpio_set_pctl - set pin control setting |
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* @chip: chip private data |
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* @pin: gpio index |
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* @func: function number |
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*/ |
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static int mv88e6352_g2_scratch_gpio_set_pctl(struct mv88e6xxx_chip *chip, |
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unsigned int pin, int func) |
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{ |
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int reg = MV88E6352_G2_SCRATCH_GPIO_PCTL0 + (pin / 2); |
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int offset = (pin & 0x1) ? 4 : 0; |
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u8 mask = (0x7 << offset); |
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int err; |
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u8 val; |
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err = mv88e6xxx_g2_scratch_read(chip, reg, &val); |
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if (err) |
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return err; |
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val = (val & ~mask) | ((func & mask) << offset); |
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return mv88e6xxx_g2_scratch_write(chip, reg, val); |
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} |
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const struct mv88e6xxx_gpio_ops mv88e6352_gpio_ops = { |
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.get_data = mv88e6352_g2_scratch_gpio_get_data, |
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.set_data = mv88e6352_g2_scratch_gpio_set_data, |
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.get_dir = mv88e6352_g2_scratch_gpio_get_dir, |
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.set_dir = mv88e6352_g2_scratch_gpio_set_dir, |
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.get_pctl = mv88e6352_g2_scratch_gpio_get_pctl, |
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.set_pctl = mv88e6352_g2_scratch_gpio_set_pctl, |
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}; |
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/** |
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* mv88e6xxx_g2_gpio_set_smi - set gpio muxing for external smi |
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* @chip: chip private data |
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* @external: set mux for external smi, or free for gpio usage |
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* |
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* Some mv88e6xxx models have GPIO pins that may be configured as |
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* an external SMI interface, or they may be made free for other |
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* GPIO uses. |
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*/ |
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int mv88e6xxx_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip, |
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bool external) |
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{ |
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int misc_cfg = MV88E6352_G2_SCRATCH_MISC_CFG; |
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int config_data1 = MV88E6352_G2_SCRATCH_CONFIG_DATA1; |
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int config_data2 = MV88E6352_G2_SCRATCH_CONFIG_DATA2; |
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bool no_cpu; |
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u8 p0_mode; |
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int err; |
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u8 val; |
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err = mv88e6xxx_g2_scratch_read(chip, config_data2, &val); |
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if (err) |
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return err; |
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p0_mode = val & MV88E6352_G2_SCRATCH_CONFIG_DATA2_P0_MODE_MASK; |
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if (p0_mode == 0x01 || p0_mode == 0x02) |
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return -EBUSY; |
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err = mv88e6xxx_g2_scratch_read(chip, config_data1, &val); |
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if (err) |
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return err; |
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no_cpu = !!(val & MV88E6352_G2_SCRATCH_CONFIG_DATA1_NO_CPU); |
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err = mv88e6xxx_g2_scratch_read(chip, misc_cfg, &val); |
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if (err) |
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return err; |
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/* NO_CPU being 0 inverts the meaning of the bit */ |
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if (!no_cpu) |
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external = !external; |
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if (external) |
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val |= MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI; |
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else |
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val &= ~MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI; |
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return mv88e6xxx_g2_scratch_write(chip, misc_cfg, val); |
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}
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