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413 lines
9.6 KiB
413 lines
9.6 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* Sparc SS1000/SC2000 SMP support. |
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* |
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* Copyright (C) 1998 Jakub Jelinek ([email protected]) |
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* |
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* Based on sun4m's smp.c, which is: |
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* Copyright (C) 1996 David S. Miller ([email protected]) |
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*/ |
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#include <linux/clockchips.h> |
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#include <linux/interrupt.h> |
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#include <linux/profile.h> |
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#include <linux/delay.h> |
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#include <linux/sched/mm.h> |
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#include <linux/cpu.h> |
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#include <asm/cacheflush.h> |
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#include <asm/switch_to.h> |
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#include <asm/tlbflush.h> |
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#include <asm/timer.h> |
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#include <asm/oplib.h> |
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#include <asm/sbi.h> |
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#include <asm/mmu.h> |
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#include "kernel.h" |
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#include "irq.h" |
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#define IRQ_CROSS_CALL 15 |
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static volatile int smp_processors_ready; |
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static int smp_highest_cpu; |
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static inline unsigned long sun4d_swap(volatile unsigned long *ptr, unsigned long val) |
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{ |
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__asm__ __volatile__("swap [%1], %0\n\t" : |
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"=&r" (val), "=&r" (ptr) : |
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"0" (val), "1" (ptr)); |
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return val; |
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} |
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static void smp4d_ipi_init(void); |
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static unsigned char cpu_leds[32]; |
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static inline void show_leds(int cpuid) |
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{ |
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cpuid &= 0x1e; |
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__asm__ __volatile__ ("stba %0, [%1] %2" : : |
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"r" ((cpu_leds[cpuid] << 4) | cpu_leds[cpuid+1]), |
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"r" (ECSR_BASE(cpuid) | BB_LEDS), |
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"i" (ASI_M_CTL)); |
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} |
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void sun4d_cpu_pre_starting(void *arg) |
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{ |
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int cpuid = hard_smp_processor_id(); |
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/* Show we are alive */ |
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cpu_leds[cpuid] = 0x6; |
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show_leds(cpuid); |
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/* Enable level15 interrupt, disable level14 interrupt for now */ |
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cc_set_imsk((cc_get_imsk() & ~0x8000) | 0x4000); |
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} |
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void sun4d_cpu_pre_online(void *arg) |
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{ |
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unsigned long flags; |
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int cpuid; |
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cpuid = hard_smp_processor_id(); |
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/* Unblock the master CPU _only_ when the scheduler state |
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* of all secondary CPUs will be up-to-date, so after |
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* the SMP initialization the master will be just allowed |
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* to call the scheduler code. |
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*/ |
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sun4d_swap((unsigned long *)&cpu_callin_map[cpuid], 1); |
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local_ops->cache_all(); |
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local_ops->tlb_all(); |
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while ((unsigned long)current_set[cpuid] < PAGE_OFFSET) |
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barrier(); |
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while (current_set[cpuid]->cpu != cpuid) |
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barrier(); |
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/* Fix idle thread fields. */ |
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__asm__ __volatile__("ld [%0], %%g6\n\t" |
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: : "r" (¤t_set[cpuid]) |
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: "memory" /* paranoid */); |
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cpu_leds[cpuid] = 0x9; |
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show_leds(cpuid); |
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/* Attach to the address space of init_task. */ |
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mmgrab(&init_mm); |
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current->active_mm = &init_mm; |
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local_ops->cache_all(); |
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local_ops->tlb_all(); |
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while (!cpumask_test_cpu(cpuid, &smp_commenced_mask)) |
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barrier(); |
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spin_lock_irqsave(&sun4d_imsk_lock, flags); |
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cc_set_imsk(cc_get_imsk() & ~0x4000); /* Allow PIL 14 as well */ |
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spin_unlock_irqrestore(&sun4d_imsk_lock, flags); |
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} |
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/* |
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* Cycle through the processors asking the PROM to start each one. |
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*/ |
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void __init smp4d_boot_cpus(void) |
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{ |
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smp4d_ipi_init(); |
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if (boot_cpu_id) |
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current_set[0] = NULL; |
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local_ops->cache_all(); |
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} |
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int smp4d_boot_one_cpu(int i, struct task_struct *idle) |
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{ |
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unsigned long *entry = &sun4d_cpu_startup; |
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int timeout; |
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int cpu_node; |
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cpu_find_by_instance(i, &cpu_node, NULL); |
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current_set[i] = task_thread_info(idle); |
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/* |
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* Initialize the contexts table |
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* Since the call to prom_startcpu() trashes the structure, |
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* we need to re-initialize it for each cpu |
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*/ |
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smp_penguin_ctable.which_io = 0; |
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smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys; |
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smp_penguin_ctable.reg_size = 0; |
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/* whirrr, whirrr, whirrrrrrrrr... */ |
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printk(KERN_INFO "Starting CPU %d at %p\n", i, entry); |
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local_ops->cache_all(); |
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prom_startcpu(cpu_node, |
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&smp_penguin_ctable, 0, (char *)entry); |
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printk(KERN_INFO "prom_startcpu returned :)\n"); |
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/* wheee... it's going... */ |
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for (timeout = 0; timeout < 10000; timeout++) { |
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if (cpu_callin_map[i]) |
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break; |
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udelay(200); |
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} |
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if (!(cpu_callin_map[i])) { |
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printk(KERN_ERR "Processor %d is stuck.\n", i); |
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return -ENODEV; |
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} |
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local_ops->cache_all(); |
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return 0; |
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} |
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void __init smp4d_smp_done(void) |
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{ |
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int i, first; |
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int *prev; |
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/* setup cpu list for irq rotation */ |
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first = 0; |
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prev = &first; |
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for_each_online_cpu(i) { |
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*prev = i; |
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prev = &cpu_data(i).next; |
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} |
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*prev = first; |
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local_ops->cache_all(); |
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/* Ok, they are spinning and ready to go. */ |
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smp_processors_ready = 1; |
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sun4d_distribute_irqs(); |
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} |
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/* Memory structure giving interrupt handler information about IPI generated */ |
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struct sun4d_ipi_work { |
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int single; |
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int msk; |
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int resched; |
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}; |
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static DEFINE_PER_CPU_SHARED_ALIGNED(struct sun4d_ipi_work, sun4d_ipi_work); |
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/* Initialize IPIs on the SUN4D SMP machine */ |
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static void __init smp4d_ipi_init(void) |
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{ |
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int cpu; |
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struct sun4d_ipi_work *work; |
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printk(KERN_INFO "smp4d: setup IPI at IRQ %d\n", SUN4D_IPI_IRQ); |
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for_each_possible_cpu(cpu) { |
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work = &per_cpu(sun4d_ipi_work, cpu); |
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work->single = work->msk = work->resched = 0; |
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} |
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} |
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void sun4d_ipi_interrupt(void) |
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{ |
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struct sun4d_ipi_work *work = this_cpu_ptr(&sun4d_ipi_work); |
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if (work->single) { |
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work->single = 0; |
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smp_call_function_single_interrupt(); |
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} |
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if (work->msk) { |
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work->msk = 0; |
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smp_call_function_interrupt(); |
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} |
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if (work->resched) { |
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work->resched = 0; |
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smp_resched_interrupt(); |
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} |
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} |
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/* +-------+-------------+-----------+------------------------------------+ |
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* | bcast | devid | sid | levels mask | |
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* +-------+-------------+-----------+------------------------------------+ |
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* 31 30 23 22 15 14 0 |
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*/ |
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#define IGEN_MESSAGE(bcast, devid, sid, levels) \ |
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(((bcast) << 31) | ((devid) << 23) | ((sid) << 15) | (levels)) |
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static void sun4d_send_ipi(int cpu, int level) |
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{ |
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cc_set_igen(IGEN_MESSAGE(0, cpu << 3, 6 + ((level >> 1) & 7), 1 << (level - 1))); |
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} |
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static void sun4d_ipi_single(int cpu) |
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{ |
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struct sun4d_ipi_work *work = &per_cpu(sun4d_ipi_work, cpu); |
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/* Mark work */ |
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work->single = 1; |
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/* Generate IRQ on the CPU */ |
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sun4d_send_ipi(cpu, SUN4D_IPI_IRQ); |
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} |
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static void sun4d_ipi_mask_one(int cpu) |
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{ |
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struct sun4d_ipi_work *work = &per_cpu(sun4d_ipi_work, cpu); |
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/* Mark work */ |
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work->msk = 1; |
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/* Generate IRQ on the CPU */ |
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sun4d_send_ipi(cpu, SUN4D_IPI_IRQ); |
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} |
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static void sun4d_ipi_resched(int cpu) |
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{ |
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struct sun4d_ipi_work *work = &per_cpu(sun4d_ipi_work, cpu); |
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/* Mark work */ |
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work->resched = 1; |
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/* Generate IRQ on the CPU (any IRQ will cause resched) */ |
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sun4d_send_ipi(cpu, SUN4D_IPI_IRQ); |
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} |
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static struct smp_funcall { |
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smpfunc_t func; |
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unsigned long arg1; |
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unsigned long arg2; |
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unsigned long arg3; |
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unsigned long arg4; |
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unsigned long arg5; |
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unsigned char processors_in[NR_CPUS]; /* Set when ipi entered. */ |
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unsigned char processors_out[NR_CPUS]; /* Set when ipi exited. */ |
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} ccall_info __attribute__((aligned(8))); |
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static DEFINE_SPINLOCK(cross_call_lock); |
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/* Cross calls must be serialized, at least currently. */ |
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static void sun4d_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1, |
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unsigned long arg2, unsigned long arg3, |
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unsigned long arg4) |
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{ |
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if (smp_processors_ready) { |
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register int high = smp_highest_cpu; |
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unsigned long flags; |
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spin_lock_irqsave(&cross_call_lock, flags); |
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{ |
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/* |
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* If you make changes here, make sure |
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* gcc generates proper code... |
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*/ |
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register smpfunc_t f asm("i0") = func; |
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register unsigned long a1 asm("i1") = arg1; |
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register unsigned long a2 asm("i2") = arg2; |
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register unsigned long a3 asm("i3") = arg3; |
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register unsigned long a4 asm("i4") = arg4; |
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register unsigned long a5 asm("i5") = 0; |
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__asm__ __volatile__( |
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"std %0, [%6]\n\t" |
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"std %2, [%6 + 8]\n\t" |
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"std %4, [%6 + 16]\n\t" : : |
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"r"(f), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a5), |
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"r" (&ccall_info.func)); |
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} |
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/* Init receive/complete mapping, plus fire the IPI's off. */ |
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{ |
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register int i; |
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cpumask_clear_cpu(smp_processor_id(), &mask); |
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cpumask_and(&mask, cpu_online_mask, &mask); |
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for (i = 0; i <= high; i++) { |
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if (cpumask_test_cpu(i, &mask)) { |
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ccall_info.processors_in[i] = 0; |
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ccall_info.processors_out[i] = 0; |
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sun4d_send_ipi(i, IRQ_CROSS_CALL); |
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} |
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} |
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} |
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{ |
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register int i; |
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i = 0; |
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do { |
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if (!cpumask_test_cpu(i, &mask)) |
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continue; |
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while (!ccall_info.processors_in[i]) |
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barrier(); |
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} while (++i <= high); |
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i = 0; |
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do { |
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if (!cpumask_test_cpu(i, &mask)) |
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continue; |
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while (!ccall_info.processors_out[i]) |
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barrier(); |
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} while (++i <= high); |
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} |
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spin_unlock_irqrestore(&cross_call_lock, flags); |
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} |
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} |
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/* Running cross calls. */ |
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void smp4d_cross_call_irq(void) |
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{ |
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int i = hard_smp_processor_id(); |
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ccall_info.processors_in[i] = 1; |
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ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3, |
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ccall_info.arg4, ccall_info.arg5); |
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ccall_info.processors_out[i] = 1; |
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} |
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void smp4d_percpu_timer_interrupt(struct pt_regs *regs) |
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{ |
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struct pt_regs *old_regs; |
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int cpu = hard_smp_processor_id(); |
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struct clock_event_device *ce; |
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static int cpu_tick[NR_CPUS]; |
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static char led_mask[] = { 0xe, 0xd, 0xb, 0x7, 0xb, 0xd }; |
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old_regs = set_irq_regs(regs); |
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bw_get_prof_limit(cpu); |
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bw_clear_intr_mask(0, 1); /* INTR_TABLE[0] & 1 is Profile IRQ */ |
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cpu_tick[cpu]++; |
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if (!(cpu_tick[cpu] & 15)) { |
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if (cpu_tick[cpu] == 0x60) |
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cpu_tick[cpu] = 0; |
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cpu_leds[cpu] = led_mask[cpu_tick[cpu] >> 4]; |
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show_leds(cpu); |
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} |
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ce = &per_cpu(sparc32_clockevent, cpu); |
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irq_enter(); |
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ce->event_handler(ce); |
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irq_exit(); |
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set_irq_regs(old_regs); |
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} |
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static const struct sparc32_ipi_ops sun4d_ipi_ops = { |
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.cross_call = sun4d_cross_call, |
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.resched = sun4d_ipi_resched, |
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.single = sun4d_ipi_single, |
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.mask_one = sun4d_ipi_mask_one, |
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}; |
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void __init sun4d_init_smp(void) |
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{ |
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int i; |
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/* Patch ipi15 trap table */ |
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t_nmi[1] = t_nmi[1] + (linux_trap_ipi15_sun4d - linux_trap_ipi15_sun4m); |
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sparc32_ipi_ops = &sun4d_ipi_ops; |
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for (i = 0; i < NR_CPUS; i++) { |
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ccall_info.processors_in[i] = 1; |
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ccall_info.processors_out[i] = 1; |
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} |
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}
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