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284 lines
7.1 KiB
284 lines
7.1 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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/* |
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* etrap.S: Preparing for entry into the kernel on Sparc V9. |
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* |
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* Copyright (C) 1996, 1997 David S. Miller (davem@caip.rutgers.edu) |
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* Copyright (C) 1997, 1998, 1999 Jakub Jelinek (jj@ultra.linux.cz) |
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*/ |
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#include <asm/asi.h> |
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#include <asm/pstate.h> |
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#include <asm/ptrace.h> |
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#include <asm/page.h> |
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#include <asm/spitfire.h> |
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#include <asm/head.h> |
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#include <asm/processor.h> |
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#include <asm/mmu.h> |
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#define TASK_REGOFF (THREAD_SIZE-TRACEREG_SZ-STACKFRAME_SZ) |
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#define ETRAP_PSTATE1 (PSTATE_TSO | PSTATE_PRIV) |
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#define ETRAP_PSTATE2 \ |
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(PSTATE_TSO | PSTATE_PEF | PSTATE_PRIV | PSTATE_IE) |
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/* |
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* On entry, %g7 is return address - 0x4. |
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* %g4 and %g5 will be preserved %l4 and %l5 respectively. |
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*/ |
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.text |
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.align 64 |
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.globl etrap_syscall, etrap, etrap_irq, etraptl1 |
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etrap: rdpr %pil, %g2 |
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etrap_irq: clr %g3 |
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etrap_syscall: TRAP_LOAD_THREAD_REG(%g6, %g1) |
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rdpr %tstate, %g1 |
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or %g1, %g3, %g1 |
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sllx %g2, 20, %g3 |
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andcc %g1, TSTATE_PRIV, %g0 |
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or %g1, %g3, %g1 |
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bne,pn %xcc, 1f |
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sub %sp, STACKFRAME_SZ+TRACEREG_SZ-STACK_BIAS, %g2 |
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661: wrpr %g0, 7, %cleanwin |
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.section .fast_win_ctrl_1insn_patch, "ax" |
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.word 661b |
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.word 0x85880000 ! allclean |
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.previous |
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sethi %hi(TASK_REGOFF), %g2 |
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sethi %hi(TSTATE_PEF), %g3 |
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or %g2, %lo(TASK_REGOFF), %g2 |
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and %g1, %g3, %g3 |
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brnz,pn %g3, 1f |
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add %g6, %g2, %g2 |
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wr %g0, 0, %fprs |
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1: rdpr %tpc, %g3 |
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stx %g1, [%g2 + STACKFRAME_SZ + PT_V9_TSTATE] |
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rdpr %tnpc, %g1 |
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stx %g3, [%g2 + STACKFRAME_SZ + PT_V9_TPC] |
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rd %y, %g3 |
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stx %g1, [%g2 + STACKFRAME_SZ + PT_V9_TNPC] |
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rdpr %tt, %g1 |
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st %g3, [%g2 + STACKFRAME_SZ + PT_V9_Y] |
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sethi %hi(PT_REGS_MAGIC), %g3 |
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or %g3, %g1, %g1 |
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st %g1, [%g2 + STACKFRAME_SZ + PT_V9_MAGIC] |
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rdpr %cansave, %g1 |
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brnz,pt %g1, etrap_save |
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nop |
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rdpr %cwp, %g1 |
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add %g1, 2, %g1 |
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wrpr %g1, %cwp |
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be,pt %xcc, etrap_user_spill |
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mov ASI_AIUP, %g3 |
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rdpr %otherwin, %g3 |
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brz %g3, etrap_kernel_spill |
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mov ASI_AIUS, %g3 |
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etrap_user_spill: |
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wr %g3, 0x0, %asi |
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ldx [%g6 + TI_FLAGS], %g3 |
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and %g3, _TIF_32BIT, %g3 |
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brnz,pt %g3, etrap_user_spill_32bit |
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nop |
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ba,a,pt %xcc, etrap_user_spill_64bit |
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etrap_save: save %g2, -STACK_BIAS, %sp |
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mov %g6, %l6 |
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bne,pn %xcc, 3f |
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mov PRIMARY_CONTEXT, %l4 |
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661: rdpr %canrestore, %g3 |
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.section .fast_win_ctrl_1insn_patch, "ax" |
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.word 661b |
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nop |
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.previous |
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rdpr %wstate, %g2 |
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661: wrpr %g0, 0, %canrestore |
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.section .fast_win_ctrl_1insn_patch, "ax" |
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.word 661b |
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nop |
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.previous |
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sll %g2, 3, %g2 |
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/* Set TI_SYS_FPDEPTH to 1 and clear TI_SYS_NOERROR. */ |
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mov 1, %l5 |
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sth %l5, [%l6 + TI_SYS_NOERROR] |
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661: wrpr %g3, 0, %otherwin |
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.section .fast_win_ctrl_1insn_patch, "ax" |
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.word 661b |
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.word 0x87880000 ! otherw |
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.previous |
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wrpr %g2, 0, %wstate |
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sethi %hi(sparc64_kern_pri_context), %g2 |
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ldx [%g2 + %lo(sparc64_kern_pri_context)], %g3 |
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661: stxa %g3, [%l4] ASI_DMMU |
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.section .sun4v_1insn_patch, "ax" |
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.word 661b |
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stxa %g3, [%l4] ASI_MMU |
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.previous |
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sethi %hi(KERNBASE), %l4 |
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flush %l4 |
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mov ASI_AIUS, %l7 |
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2: mov %g4, %l4 |
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mov %g5, %l5 |
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add %g7, 4, %l2 |
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/* Go to trap time globals so we can save them. */ |
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661: wrpr %g0, ETRAP_PSTATE1, %pstate |
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.section .sun4v_1insn_patch, "ax" |
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.word 661b |
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SET_GL(0) |
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.previous |
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stx %g1, [%sp + PTREGS_OFF + PT_V9_G1] |
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stx %g2, [%sp + PTREGS_OFF + PT_V9_G2] |
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sllx %l7, 24, %l7 |
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stx %g3, [%sp + PTREGS_OFF + PT_V9_G3] |
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rdpr %cwp, %l0 |
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stx %g4, [%sp + PTREGS_OFF + PT_V9_G4] |
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stx %g5, [%sp + PTREGS_OFF + PT_V9_G5] |
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stx %g6, [%sp + PTREGS_OFF + PT_V9_G6] |
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stx %g7, [%sp + PTREGS_OFF + PT_V9_G7] |
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or %l7, %l0, %l7 |
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661: sethi %hi(TSTATE_TSO | TSTATE_PEF), %l0 |
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/* If userspace is using ADI, it could potentially pass |
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* a pointer with version tag embedded in it. To maintain |
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* the ADI security, we must enable PSTATE.mcde. Userspace |
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* would have already set TTE.mcd in an earlier call to |
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* kernel and set the version tag for the address being |
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* dereferenced. Setting PSTATE.mcde would ensure any |
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* access to userspace data through a system call honors |
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* ADI and does not allow a rogue app to bypass ADI by |
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* using system calls. Setting PSTATE.mcde only affects |
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* accesses to virtual addresses that have TTE.mcd set. |
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* Set PMCDPER to ensure any exceptions caused by ADI |
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* version tag mismatch are exposed before system call |
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* returns to userspace. Setting PMCDPER affects only |
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* writes to virtual addresses that have TTE.mcd set and |
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* have a version tag set as well. |
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*/ |
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.section .sun_m7_1insn_patch, "ax" |
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.word 661b |
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sethi %hi(TSTATE_TSO | TSTATE_PEF | TSTATE_MCDE), %l0 |
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.previous |
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661: nop |
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.section .sun_m7_1insn_patch, "ax" |
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.word 661b |
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.word 0xaf902001 /* wrpr %g0, 1, %pmcdper */ |
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.previous |
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or %l7, %l0, %l7 |
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wrpr %l2, %tnpc |
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wrpr %l7, (TSTATE_PRIV | TSTATE_IE), %tstate |
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stx %i0, [%sp + PTREGS_OFF + PT_V9_I0] |
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stx %i1, [%sp + PTREGS_OFF + PT_V9_I1] |
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stx %i2, [%sp + PTREGS_OFF + PT_V9_I2] |
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stx %i3, [%sp + PTREGS_OFF + PT_V9_I3] |
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stx %i4, [%sp + PTREGS_OFF + PT_V9_I4] |
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stx %i5, [%sp + PTREGS_OFF + PT_V9_I5] |
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stx %i6, [%sp + PTREGS_OFF + PT_V9_I6] |
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mov %l6, %g6 |
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stx %i7, [%sp + PTREGS_OFF + PT_V9_I7] |
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LOAD_PER_CPU_BASE(%g5, %g6, %g4, %g3, %l1) |
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ldx [%g6 + TI_TASK], %g4 |
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done |
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3: mov ASI_P, %l7 |
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ldub [%l6 + TI_FPDEPTH], %l5 |
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add %l6, TI_FPSAVED + 1, %l4 |
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srl %l5, 1, %l3 |
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add %l5, 2, %l5 |
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/* Set TI_SYS_FPDEPTH to %l5 and clear TI_SYS_NOERROR. */ |
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sth %l5, [%l6 + TI_SYS_NOERROR] |
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ba,pt %xcc, 2b |
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stb %g0, [%l4 + %l3] |
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nop |
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etraptl1: /* Save tstate/tpc/tnpc of TL 1-->4 and the tl register itself. |
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* We place this right after pt_regs on the trap stack. |
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* The layout is: |
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* 0x00 TL1's TSTATE |
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* 0x08 TL1's TPC |
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* 0x10 TL1's TNPC |
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* 0x18 TL1's TT |
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* ... |
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* 0x58 TL4's TT |
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* 0x60 TL |
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*/ |
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TRAP_LOAD_THREAD_REG(%g6, %g1) |
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sub %sp, ((4 * 8) * 4) + 8, %g2 |
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rdpr %tl, %g1 |
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wrpr %g0, 1, %tl |
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rdpr %tstate, %g3 |
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stx %g3, [%g2 + STACK_BIAS + 0x00] |
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rdpr %tpc, %g3 |
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stx %g3, [%g2 + STACK_BIAS + 0x08] |
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rdpr %tnpc, %g3 |
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stx %g3, [%g2 + STACK_BIAS + 0x10] |
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rdpr %tt, %g3 |
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stx %g3, [%g2 + STACK_BIAS + 0x18] |
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wrpr %g0, 2, %tl |
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rdpr %tstate, %g3 |
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stx %g3, [%g2 + STACK_BIAS + 0x20] |
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rdpr %tpc, %g3 |
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stx %g3, [%g2 + STACK_BIAS + 0x28] |
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rdpr %tnpc, %g3 |
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stx %g3, [%g2 + STACK_BIAS + 0x30] |
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rdpr %tt, %g3 |
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stx %g3, [%g2 + STACK_BIAS + 0x38] |
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sethi %hi(is_sun4v), %g3 |
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lduw [%g3 + %lo(is_sun4v)], %g3 |
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brnz,pn %g3, finish_tl1_capture |
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nop |
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wrpr %g0, 3, %tl |
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rdpr %tstate, %g3 |
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stx %g3, [%g2 + STACK_BIAS + 0x40] |
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rdpr %tpc, %g3 |
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stx %g3, [%g2 + STACK_BIAS + 0x48] |
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rdpr %tnpc, %g3 |
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stx %g3, [%g2 + STACK_BIAS + 0x50] |
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rdpr %tt, %g3 |
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stx %g3, [%g2 + STACK_BIAS + 0x58] |
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wrpr %g0, 4, %tl |
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rdpr %tstate, %g3 |
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stx %g3, [%g2 + STACK_BIAS + 0x60] |
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rdpr %tpc, %g3 |
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stx %g3, [%g2 + STACK_BIAS + 0x68] |
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rdpr %tnpc, %g3 |
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stx %g3, [%g2 + STACK_BIAS + 0x70] |
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rdpr %tt, %g3 |
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stx %g3, [%g2 + STACK_BIAS + 0x78] |
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stx %g1, [%g2 + STACK_BIAS + 0x80] |
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finish_tl1_capture: |
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wrpr %g0, 1, %tl |
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661: nop |
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.section .sun4v_1insn_patch, "ax" |
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.word 661b |
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SET_GL(1) |
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.previous |
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rdpr %tstate, %g1 |
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sub %g2, STACKFRAME_SZ + TRACEREG_SZ - STACK_BIAS, %g2 |
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ba,pt %xcc, 1b |
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andcc %g1, TSTATE_PRIV, %g0 |
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#undef TASK_REGOFF |
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#undef ETRAP_PSTATE1
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