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986 lines
24 KiB
986 lines
24 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* linux/arch/sh/boards/se/7724/setup.c |
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* |
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* Copyright (C) 2009 Renesas Solutions Corp. |
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* |
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* Kuninori Morimoto <[email protected]> |
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*/ |
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#include <asm/clock.h> |
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#include <asm/heartbeat.h> |
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#include <asm/io.h> |
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#include <asm/suspend.h> |
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#include <cpu/sh7724.h> |
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#include <linux/delay.h> |
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#include <linux/device.h> |
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#include <linux/gpio.h> |
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#include <linux/init.h> |
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#include <linux/input.h> |
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#include <linux/input/sh_keysc.h> |
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#include <linux/interrupt.h> |
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#include <linux/memblock.h> |
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#include <linux/mfd/tmio.h> |
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#include <linux/mmc/host.h> |
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#include <linux/mtd/physmap.h> |
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#include <linux/platform_device.h> |
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#include <linux/regulator/fixed.h> |
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#include <linux/regulator/machine.h> |
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#include <linux/sh_eth.h> |
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#include <linux/sh_intc.h> |
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#include <linux/smc91x.h> |
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#include <linux/usb/r8a66597.h> |
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#include <linux/videodev2.h> |
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#include <linux/dma-map-ops.h> |
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#include <mach-se/mach/se7724.h> |
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#include <media/drv-intf/renesas-ceu.h> |
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#include <sound/sh_fsi.h> |
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#include <sound/simple_card.h> |
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#include <video/sh_mobile_lcdc.h> |
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#define CEU_BUFFER_MEMORY_SIZE (4 << 20) |
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static phys_addr_t ceu0_dma_membase; |
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static phys_addr_t ceu1_dma_membase; |
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|
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/* |
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* SWx 1234 5678 |
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* ------------------------------------ |
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* SW31 : 1001 1100 : default |
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* SW32 : 0111 1111 : use on board flash |
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* |
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* SW41 : abxx xxxx -> a = 0 : Analog monitor |
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* 1 : Digital monitor |
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* b = 0 : VGA |
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* 1 : 720p |
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*/ |
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/* |
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* about 720p |
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* |
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* When you use 1280 x 720 lcdc output, |
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* you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz, |
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* and change SW41 to use 720p |
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*/ |
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|
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/* |
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* about sound |
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* |
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* This setup.c supports FSI slave mode. |
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* Please change J20, J21, J22 pin to 1-2 connection. |
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*/ |
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/* Heartbeat */ |
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static struct resource heartbeat_resource = { |
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.start = PA_LED, |
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.end = PA_LED, |
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.flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT, |
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}; |
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static struct platform_device heartbeat_device = { |
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.name = "heartbeat", |
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.id = -1, |
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.num_resources = 1, |
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.resource = &heartbeat_resource, |
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}; |
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/* LAN91C111 */ |
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static struct smc91x_platdata smc91x_info = { |
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.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, |
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}; |
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static struct resource smc91x_eth_resources[] = { |
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[0] = { |
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.name = "SMC91C111" , |
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.start = 0x1a300300, |
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.end = 0x1a30030f, |
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.flags = IORESOURCE_MEM, |
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}, |
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[1] = { |
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.start = IRQ0_SMC, |
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
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}, |
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}; |
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static struct platform_device smc91x_eth_device = { |
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.name = "smc91x", |
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.num_resources = ARRAY_SIZE(smc91x_eth_resources), |
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.resource = smc91x_eth_resources, |
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.dev = { |
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.platform_data = &smc91x_info, |
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}, |
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}; |
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/* MTD */ |
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static struct mtd_partition nor_flash_partitions[] = { |
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{ |
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.name = "uboot", |
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.offset = 0, |
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.size = (1 * 1024 * 1024), |
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.mask_flags = MTD_WRITEABLE, /* Read-only */ |
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}, { |
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.name = "kernel", |
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.offset = MTDPART_OFS_APPEND, |
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.size = (2 * 1024 * 1024), |
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}, { |
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.name = "free-area", |
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.offset = MTDPART_OFS_APPEND, |
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.size = MTDPART_SIZ_FULL, |
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}, |
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}; |
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static struct physmap_flash_data nor_flash_data = { |
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.width = 2, |
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.parts = nor_flash_partitions, |
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.nr_parts = ARRAY_SIZE(nor_flash_partitions), |
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}; |
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static struct resource nor_flash_resources[] = { |
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[0] = { |
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.name = "NOR Flash", |
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.start = 0x00000000, |
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.end = 0x01ffffff, |
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.flags = IORESOURCE_MEM, |
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} |
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}; |
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static struct platform_device nor_flash_device = { |
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.name = "physmap-flash", |
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.resource = nor_flash_resources, |
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.num_resources = ARRAY_SIZE(nor_flash_resources), |
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.dev = { |
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.platform_data = &nor_flash_data, |
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}, |
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}; |
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/* LCDC */ |
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static const struct fb_videomode lcdc_720p_modes[] = { |
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{ |
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.name = "LB070WV1", |
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.sync = 0, /* hsync and vsync are active low */ |
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.xres = 1280, |
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.yres = 720, |
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.left_margin = 220, |
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.right_margin = 110, |
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.hsync_len = 40, |
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.upper_margin = 20, |
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.lower_margin = 5, |
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.vsync_len = 5, |
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}, |
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}; |
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static const struct fb_videomode lcdc_vga_modes[] = { |
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{ |
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.name = "LB070WV1", |
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.sync = 0, /* hsync and vsync are active low */ |
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.xres = 640, |
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.yres = 480, |
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.left_margin = 105, |
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.right_margin = 50, |
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.hsync_len = 96, |
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.upper_margin = 33, |
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.lower_margin = 10, |
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.vsync_len = 2, |
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}, |
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}; |
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static struct sh_mobile_lcdc_info lcdc_info = { |
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.clock_source = LCDC_CLK_EXTERNAL, |
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.ch[0] = { |
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.chan = LCDC_CHAN_MAINLCD, |
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.fourcc = V4L2_PIX_FMT_RGB565, |
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.clock_divider = 1, |
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.panel_cfg = { /* 7.0 inch */ |
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.width = 152, |
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.height = 91, |
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}, |
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} |
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}; |
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static struct resource lcdc_resources[] = { |
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[0] = { |
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.name = "LCDC", |
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.start = 0xfe940000, |
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.end = 0xfe942fff, |
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.flags = IORESOURCE_MEM, |
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}, |
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[1] = { |
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.start = evt2irq(0xf40), |
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.flags = IORESOURCE_IRQ, |
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}, |
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}; |
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static struct platform_device lcdc_device = { |
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.name = "sh_mobile_lcdc_fb", |
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.num_resources = ARRAY_SIZE(lcdc_resources), |
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.resource = lcdc_resources, |
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.dev = { |
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.platform_data = &lcdc_info, |
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}, |
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}; |
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/* CEU0 */ |
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static struct ceu_platform_data ceu0_pdata = { |
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.num_subdevs = 0, |
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}; |
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static struct resource ceu0_resources[] = { |
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[0] = { |
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.name = "CEU0", |
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.start = 0xfe910000, |
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.end = 0xfe91009f, |
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.flags = IORESOURCE_MEM, |
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}, |
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[1] = { |
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.start = evt2irq(0x880), |
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.flags = IORESOURCE_IRQ, |
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}, |
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}; |
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static struct platform_device ceu0_device = { |
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.name = "renesas-ceu", |
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.id = 0, /* "ceu.0" clock */ |
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.num_resources = ARRAY_SIZE(ceu0_resources), |
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.resource = ceu0_resources, |
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.dev = { |
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.platform_data = &ceu0_pdata, |
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}, |
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}; |
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/* CEU1 */ |
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static struct ceu_platform_data ceu1_pdata = { |
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.num_subdevs = 0, |
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}; |
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static struct resource ceu1_resources[] = { |
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[0] = { |
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.name = "CEU1", |
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.start = 0xfe914000, |
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.end = 0xfe91409f, |
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.flags = IORESOURCE_MEM, |
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}, |
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[1] = { |
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.start = evt2irq(0x9e0), |
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.flags = IORESOURCE_IRQ, |
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}, |
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}; |
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static struct platform_device ceu1_device = { |
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.name = "renesas-ceu", |
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.id = 1, /* "ceu.1" clock */ |
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.num_resources = ARRAY_SIZE(ceu1_resources), |
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.resource = ceu1_resources, |
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.dev = { |
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.platform_data = &ceu1_pdata, |
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}, |
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}; |
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/* FSI */ |
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/* change J20, J21, J22 pin to 1-2 connection to use slave mode */ |
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static struct resource fsi_resources[] = { |
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[0] = { |
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.name = "FSI", |
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.start = 0xFE3C0000, |
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.end = 0xFE3C021d, |
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.flags = IORESOURCE_MEM, |
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}, |
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[1] = { |
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.start = evt2irq(0xf80), |
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.flags = IORESOURCE_IRQ, |
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}, |
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}; |
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static struct platform_device fsi_device = { |
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.name = "sh_fsi", |
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.id = 0, |
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.num_resources = ARRAY_SIZE(fsi_resources), |
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.resource = fsi_resources, |
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}; |
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static struct asoc_simple_card_info fsi_ak4642_info = { |
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.name = "AK4642", |
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.card = "FSIA-AK4642", |
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.codec = "ak4642-codec.0-0012", |
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.platform = "sh_fsi.0", |
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.daifmt = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBM_CFM, |
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.cpu_dai = { |
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.name = "fsia-dai", |
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}, |
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.codec_dai = { |
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.name = "ak4642-hifi", |
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.sysclk = 11289600, |
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}, |
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}; |
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static struct platform_device fsi_ak4642_device = { |
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.name = "asoc-simple-card", |
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.dev = { |
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.platform_data = &fsi_ak4642_info, |
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}, |
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}; |
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/* KEYSC in SoC (Needs SW33-2 set to ON) */ |
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static struct sh_keysc_info keysc_info = { |
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.mode = SH_KEYSC_MODE_1, |
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.scan_timing = 3, |
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.delay = 50, |
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.keycodes = { |
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KEY_1, KEY_2, KEY_3, KEY_4, KEY_5, |
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KEY_6, KEY_7, KEY_8, KEY_9, KEY_A, |
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KEY_B, KEY_C, KEY_D, KEY_E, KEY_F, |
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KEY_G, KEY_H, KEY_I, KEY_K, KEY_L, |
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KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q, |
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KEY_R, KEY_S, KEY_T, KEY_U, KEY_V, |
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}, |
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}; |
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static struct resource keysc_resources[] = { |
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[0] = { |
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.name = "KEYSC", |
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.start = 0x044b0000, |
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.end = 0x044b000f, |
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.flags = IORESOURCE_MEM, |
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}, |
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[1] = { |
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.start = evt2irq(0xbe0), |
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.flags = IORESOURCE_IRQ, |
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}, |
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}; |
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static struct platform_device keysc_device = { |
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.name = "sh_keysc", |
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.id = 0, /* "keysc0" clock */ |
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.num_resources = ARRAY_SIZE(keysc_resources), |
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.resource = keysc_resources, |
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.dev = { |
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.platform_data = &keysc_info, |
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}, |
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}; |
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/* SH Eth */ |
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static struct resource sh_eth_resources[] = { |
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[0] = { |
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.start = SH_ETH_ADDR, |
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.end = SH_ETH_ADDR + 0x1FC - 1, |
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.flags = IORESOURCE_MEM, |
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}, |
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[1] = { |
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.start = evt2irq(0xd60), |
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
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}, |
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}; |
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static struct sh_eth_plat_data sh_eth_plat = { |
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.phy = 0x1f, /* SMSC LAN8187 */ |
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.phy_interface = PHY_INTERFACE_MODE_MII, |
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}; |
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static struct platform_device sh_eth_device = { |
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.name = "sh7724-ether", |
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.id = 0, |
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.dev = { |
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.platform_data = &sh_eth_plat, |
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}, |
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.num_resources = ARRAY_SIZE(sh_eth_resources), |
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.resource = sh_eth_resources, |
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}; |
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static struct r8a66597_platdata sh7724_usb0_host_data = { |
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.on_chip = 1, |
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}; |
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static struct resource sh7724_usb0_host_resources[] = { |
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[0] = { |
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.start = 0xa4d80000, |
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.end = 0xa4d80124 - 1, |
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.flags = IORESOURCE_MEM, |
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}, |
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[1] = { |
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.start = evt2irq(0xa20), |
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.end = evt2irq(0xa20), |
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.flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, |
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}, |
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}; |
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static struct platform_device sh7724_usb0_host_device = { |
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.name = "r8a66597_hcd", |
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.id = 0, |
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.dev = { |
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.dma_mask = NULL, /* not use dma */ |
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.coherent_dma_mask = 0xffffffff, |
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.platform_data = &sh7724_usb0_host_data, |
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}, |
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.num_resources = ARRAY_SIZE(sh7724_usb0_host_resources), |
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.resource = sh7724_usb0_host_resources, |
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}; |
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static struct r8a66597_platdata sh7724_usb1_gadget_data = { |
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.on_chip = 1, |
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}; |
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static struct resource sh7724_usb1_gadget_resources[] = { |
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[0] = { |
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.start = 0xa4d90000, |
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.end = 0xa4d90123, |
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.flags = IORESOURCE_MEM, |
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}, |
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[1] = { |
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.start = evt2irq(0xa40), |
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.end = evt2irq(0xa40), |
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.flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, |
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}, |
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}; |
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static struct platform_device sh7724_usb1_gadget_device = { |
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.name = "r8a66597_udc", |
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.id = 1, /* USB1 */ |
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.dev = { |
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.dma_mask = NULL, /* not use dma */ |
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.coherent_dma_mask = 0xffffffff, |
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.platform_data = &sh7724_usb1_gadget_data, |
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}, |
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.num_resources = ARRAY_SIZE(sh7724_usb1_gadget_resources), |
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.resource = sh7724_usb1_gadget_resources, |
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}; |
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/* Fixed 3.3V regulator to be used by SDHI0, SDHI1 */ |
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static struct regulator_consumer_supply fixed3v3_power_consumers[] = |
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{ |
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REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"), |
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REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"), |
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REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"), |
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REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"), |
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}; |
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static struct resource sdhi0_cn7_resources[] = { |
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[0] = { |
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.name = "SDHI0", |
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.start = 0x04ce0000, |
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.end = 0x04ce00ff, |
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.flags = IORESOURCE_MEM, |
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}, |
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[1] = { |
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.start = evt2irq(0xe80), |
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.flags = IORESOURCE_IRQ, |
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}, |
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}; |
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static struct tmio_mmc_data sh7724_sdhi0_data = { |
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.chan_priv_tx = (void *)SHDMA_SLAVE_SDHI0_TX, |
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.chan_priv_rx = (void *)SHDMA_SLAVE_SDHI0_RX, |
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.capabilities = MMC_CAP_SDIO_IRQ, |
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}; |
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static struct platform_device sdhi0_cn7_device = { |
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.name = "sh_mobile_sdhi", |
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.id = 0, |
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.num_resources = ARRAY_SIZE(sdhi0_cn7_resources), |
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.resource = sdhi0_cn7_resources, |
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.dev = { |
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.platform_data = &sh7724_sdhi0_data, |
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}, |
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}; |
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static struct resource sdhi1_cn8_resources[] = { |
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[0] = { |
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.name = "SDHI1", |
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.start = 0x04cf0000, |
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.end = 0x04cf00ff, |
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.flags = IORESOURCE_MEM, |
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}, |
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[1] = { |
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.start = evt2irq(0x4e0), |
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.flags = IORESOURCE_IRQ, |
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}, |
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}; |
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static struct tmio_mmc_data sh7724_sdhi1_data = { |
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.chan_priv_tx = (void *)SHDMA_SLAVE_SDHI1_TX, |
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.chan_priv_rx = (void *)SHDMA_SLAVE_SDHI1_RX, |
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.capabilities = MMC_CAP_SDIO_IRQ, |
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}; |
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static struct platform_device sdhi1_cn8_device = { |
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.name = "sh_mobile_sdhi", |
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.id = 1, |
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.num_resources = ARRAY_SIZE(sdhi1_cn8_resources), |
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.resource = sdhi1_cn8_resources, |
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.dev = { |
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.platform_data = &sh7724_sdhi1_data, |
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}, |
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}; |
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|
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/* IrDA */ |
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static struct resource irda_resources[] = { |
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[0] = { |
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.name = "IrDA", |
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.start = 0xA45D0000, |
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.end = 0xA45D0049, |
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.flags = IORESOURCE_MEM, |
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}, |
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[1] = { |
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.start = evt2irq(0x480), |
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.flags = IORESOURCE_IRQ, |
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}, |
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}; |
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|
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static struct platform_device irda_device = { |
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.name = "sh_sir", |
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.num_resources = ARRAY_SIZE(irda_resources), |
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.resource = irda_resources, |
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}; |
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|
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#include <media/i2c/ak881x.h> |
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#include <media/drv-intf/sh_vou.h> |
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|
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static struct ak881x_pdata ak881x_pdata = { |
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.flags = AK881X_IF_MODE_SLAVE, |
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}; |
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|
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static struct i2c_board_info ak8813 = { |
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/* With open J18 jumper address is 0x21 */ |
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I2C_BOARD_INFO("ak8813", 0x20), |
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.platform_data = &ak881x_pdata, |
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}; |
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|
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static struct sh_vou_pdata sh_vou_pdata = { |
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.bus_fmt = SH_VOU_BUS_8BIT, |
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.flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW, |
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.board_info = &ak8813, |
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.i2c_adap = 0, |
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}; |
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|
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static struct resource sh_vou_resources[] = { |
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[0] = { |
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.start = 0xfe960000, |
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.end = 0xfe962043, |
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.flags = IORESOURCE_MEM, |
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}, |
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[1] = { |
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.start = evt2irq(0x8e0), |
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.flags = IORESOURCE_IRQ, |
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}, |
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}; |
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|
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static struct platform_device vou_device = { |
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.name = "sh-vou", |
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.id = -1, |
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.num_resources = ARRAY_SIZE(sh_vou_resources), |
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.resource = sh_vou_resources, |
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.dev = { |
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.platform_data = &sh_vou_pdata, |
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}, |
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}; |
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|
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static struct platform_device *ms7724se_ceu_devices[] __initdata = { |
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&ceu0_device, |
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&ceu1_device, |
|
}; |
|
|
|
static struct platform_device *ms7724se_devices[] __initdata = { |
|
&heartbeat_device, |
|
&smc91x_eth_device, |
|
&lcdc_device, |
|
&nor_flash_device, |
|
&keysc_device, |
|
&sh_eth_device, |
|
&sh7724_usb0_host_device, |
|
&sh7724_usb1_gadget_device, |
|
&fsi_device, |
|
&fsi_ak4642_device, |
|
&sdhi0_cn7_device, |
|
&sdhi1_cn8_device, |
|
&irda_device, |
|
&vou_device, |
|
}; |
|
|
|
/* I2C device */ |
|
static struct i2c_board_info i2c0_devices[] = { |
|
{ |
|
I2C_BOARD_INFO("ak4642", 0x12), |
|
}, |
|
}; |
|
|
|
#define EEPROM_OP 0xBA206000 |
|
#define EEPROM_ADR 0xBA206004 |
|
#define EEPROM_DATA 0xBA20600C |
|
#define EEPROM_STAT 0xBA206010 |
|
#define EEPROM_STRT 0xBA206014 |
|
|
|
static int __init sh_eth_is_eeprom_ready(void) |
|
{ |
|
int t = 10000; |
|
|
|
while (t--) { |
|
if (!__raw_readw(EEPROM_STAT)) |
|
return 1; |
|
udelay(1); |
|
} |
|
|
|
printk(KERN_ERR "ms7724se can not access to eeprom\n"); |
|
return 0; |
|
} |
|
|
|
static void __init sh_eth_init(void) |
|
{ |
|
int i; |
|
u16 mac; |
|
|
|
/* check EEPROM status */ |
|
if (!sh_eth_is_eeprom_ready()) |
|
return; |
|
|
|
/* read MAC addr from EEPROM */ |
|
for (i = 0 ; i < 3 ; i++) { |
|
__raw_writew(0x0, EEPROM_OP); /* read */ |
|
__raw_writew(i*2, EEPROM_ADR); |
|
__raw_writew(0x1, EEPROM_STRT); |
|
if (!sh_eth_is_eeprom_ready()) |
|
return; |
|
|
|
mac = __raw_readw(EEPROM_DATA); |
|
sh_eth_plat.mac_addr[i << 1] = mac & 0xff; |
|
sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8; |
|
} |
|
} |
|
|
|
#define SW4140 0xBA201000 |
|
#define FPGA_OUT 0xBA200400 |
|
#define PORT_HIZA 0xA4050158 |
|
#define PORT_MSELCRB 0xA4050182 |
|
|
|
#define SW41_A 0x0100 |
|
#define SW41_B 0x0200 |
|
#define SW41_C 0x0400 |
|
#define SW41_D 0x0800 |
|
#define SW41_E 0x1000 |
|
#define SW41_F 0x2000 |
|
#define SW41_G 0x4000 |
|
#define SW41_H 0x8000 |
|
|
|
extern char ms7724se_sdram_enter_start; |
|
extern char ms7724se_sdram_enter_end; |
|
extern char ms7724se_sdram_leave_start; |
|
extern char ms7724se_sdram_leave_end; |
|
|
|
static int __init arch_setup(void) |
|
{ |
|
/* enable I2C device */ |
|
i2c_register_board_info(0, i2c0_devices, |
|
ARRAY_SIZE(i2c0_devices)); |
|
return 0; |
|
} |
|
arch_initcall(arch_setup); |
|
|
|
static int __init devices_setup(void) |
|
{ |
|
u16 sw = __raw_readw(SW4140); /* select camera, monitor */ |
|
struct clk *clk; |
|
u16 fpga_out; |
|
|
|
/* register board specific self-refresh code */ |
|
sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF | |
|
SUSP_SH_RSTANDBY, |
|
&ms7724se_sdram_enter_start, |
|
&ms7724se_sdram_enter_end, |
|
&ms7724se_sdram_leave_start, |
|
&ms7724se_sdram_leave_end); |
|
|
|
regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers, |
|
ARRAY_SIZE(fixed3v3_power_consumers), 3300000); |
|
|
|
/* Reset Release */ |
|
fpga_out = __raw_readw(FPGA_OUT); |
|
/* bit4: NTSC_PDN, bit5: NTSC_RESET */ |
|
fpga_out &= ~((1 << 1) | /* LAN */ |
|
(1 << 4) | /* AK8813 PDN */ |
|
(1 << 5) | /* AK8813 RESET */ |
|
(1 << 6) | /* VIDEO DAC */ |
|
(1 << 7) | /* AK4643 */ |
|
(1 << 8) | /* IrDA */ |
|
(1 << 12) | /* USB0 */ |
|
(1 << 14)); /* RMII */ |
|
__raw_writew(fpga_out | (1 << 4), FPGA_OUT); |
|
|
|
udelay(10); |
|
|
|
/* AK8813 RESET */ |
|
__raw_writew(fpga_out | (1 << 5), FPGA_OUT); |
|
|
|
udelay(10); |
|
|
|
__raw_writew(fpga_out, FPGA_OUT); |
|
|
|
/* turn on USB clocks, use external clock */ |
|
__raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); |
|
|
|
/* Let LED9 show STATUS2 */ |
|
gpio_request(GPIO_FN_STATUS2, NULL); |
|
|
|
/* Lit LED10 show STATUS0 */ |
|
gpio_request(GPIO_FN_STATUS0, NULL); |
|
|
|
/* Lit LED11 show PDSTATUS */ |
|
gpio_request(GPIO_FN_PDSTATUS, NULL); |
|
|
|
/* enable USB0 port */ |
|
__raw_writew(0x0600, 0xa40501d4); |
|
|
|
/* enable USB1 port */ |
|
__raw_writew(0x0600, 0xa4050192); |
|
|
|
/* enable IRQ 0,1,2 */ |
|
gpio_request(GPIO_FN_INTC_IRQ0, NULL); |
|
gpio_request(GPIO_FN_INTC_IRQ1, NULL); |
|
gpio_request(GPIO_FN_INTC_IRQ2, NULL); |
|
|
|
/* enable SCIFA3 */ |
|
gpio_request(GPIO_FN_SCIF3_I_SCK, NULL); |
|
gpio_request(GPIO_FN_SCIF3_I_RXD, NULL); |
|
gpio_request(GPIO_FN_SCIF3_I_TXD, NULL); |
|
gpio_request(GPIO_FN_SCIF3_I_CTS, NULL); |
|
gpio_request(GPIO_FN_SCIF3_I_RTS, NULL); |
|
|
|
/* enable LCDC */ |
|
gpio_request(GPIO_FN_LCDD23, NULL); |
|
gpio_request(GPIO_FN_LCDD22, NULL); |
|
gpio_request(GPIO_FN_LCDD21, NULL); |
|
gpio_request(GPIO_FN_LCDD20, NULL); |
|
gpio_request(GPIO_FN_LCDD19, NULL); |
|
gpio_request(GPIO_FN_LCDD18, NULL); |
|
gpio_request(GPIO_FN_LCDD17, NULL); |
|
gpio_request(GPIO_FN_LCDD16, NULL); |
|
gpio_request(GPIO_FN_LCDD15, NULL); |
|
gpio_request(GPIO_FN_LCDD14, NULL); |
|
gpio_request(GPIO_FN_LCDD13, NULL); |
|
gpio_request(GPIO_FN_LCDD12, NULL); |
|
gpio_request(GPIO_FN_LCDD11, NULL); |
|
gpio_request(GPIO_FN_LCDD10, NULL); |
|
gpio_request(GPIO_FN_LCDD9, NULL); |
|
gpio_request(GPIO_FN_LCDD8, NULL); |
|
gpio_request(GPIO_FN_LCDD7, NULL); |
|
gpio_request(GPIO_FN_LCDD6, NULL); |
|
gpio_request(GPIO_FN_LCDD5, NULL); |
|
gpio_request(GPIO_FN_LCDD4, NULL); |
|
gpio_request(GPIO_FN_LCDD3, NULL); |
|
gpio_request(GPIO_FN_LCDD2, NULL); |
|
gpio_request(GPIO_FN_LCDD1, NULL); |
|
gpio_request(GPIO_FN_LCDD0, NULL); |
|
gpio_request(GPIO_FN_LCDDISP, NULL); |
|
gpio_request(GPIO_FN_LCDHSYN, NULL); |
|
gpio_request(GPIO_FN_LCDDCK, NULL); |
|
gpio_request(GPIO_FN_LCDVSYN, NULL); |
|
gpio_request(GPIO_FN_LCDDON, NULL); |
|
gpio_request(GPIO_FN_LCDVEPWC, NULL); |
|
gpio_request(GPIO_FN_LCDVCPWC, NULL); |
|
gpio_request(GPIO_FN_LCDRD, NULL); |
|
gpio_request(GPIO_FN_LCDLCLK, NULL); |
|
__raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA); |
|
|
|
/* enable CEU0 */ |
|
gpio_request(GPIO_FN_VIO0_D15, NULL); |
|
gpio_request(GPIO_FN_VIO0_D14, NULL); |
|
gpio_request(GPIO_FN_VIO0_D13, NULL); |
|
gpio_request(GPIO_FN_VIO0_D12, NULL); |
|
gpio_request(GPIO_FN_VIO0_D11, NULL); |
|
gpio_request(GPIO_FN_VIO0_D10, NULL); |
|
gpio_request(GPIO_FN_VIO0_D9, NULL); |
|
gpio_request(GPIO_FN_VIO0_D8, NULL); |
|
gpio_request(GPIO_FN_VIO0_D7, NULL); |
|
gpio_request(GPIO_FN_VIO0_D6, NULL); |
|
gpio_request(GPIO_FN_VIO0_D5, NULL); |
|
gpio_request(GPIO_FN_VIO0_D4, NULL); |
|
gpio_request(GPIO_FN_VIO0_D3, NULL); |
|
gpio_request(GPIO_FN_VIO0_D2, NULL); |
|
gpio_request(GPIO_FN_VIO0_D1, NULL); |
|
gpio_request(GPIO_FN_VIO0_D0, NULL); |
|
gpio_request(GPIO_FN_VIO0_VD, NULL); |
|
gpio_request(GPIO_FN_VIO0_CLK, NULL); |
|
gpio_request(GPIO_FN_VIO0_FLD, NULL); |
|
gpio_request(GPIO_FN_VIO0_HD, NULL); |
|
|
|
/* enable CEU1 */ |
|
gpio_request(GPIO_FN_VIO1_D7, NULL); |
|
gpio_request(GPIO_FN_VIO1_D6, NULL); |
|
gpio_request(GPIO_FN_VIO1_D5, NULL); |
|
gpio_request(GPIO_FN_VIO1_D4, NULL); |
|
gpio_request(GPIO_FN_VIO1_D3, NULL); |
|
gpio_request(GPIO_FN_VIO1_D2, NULL); |
|
gpio_request(GPIO_FN_VIO1_D1, NULL); |
|
gpio_request(GPIO_FN_VIO1_D0, NULL); |
|
gpio_request(GPIO_FN_VIO1_FLD, NULL); |
|
gpio_request(GPIO_FN_VIO1_HD, NULL); |
|
gpio_request(GPIO_FN_VIO1_VD, NULL); |
|
gpio_request(GPIO_FN_VIO1_CLK, NULL); |
|
|
|
/* KEYSC */ |
|
gpio_request(GPIO_FN_KEYOUT5_IN5, NULL); |
|
gpio_request(GPIO_FN_KEYOUT4_IN6, NULL); |
|
gpio_request(GPIO_FN_KEYIN4, NULL); |
|
gpio_request(GPIO_FN_KEYIN3, NULL); |
|
gpio_request(GPIO_FN_KEYIN2, NULL); |
|
gpio_request(GPIO_FN_KEYIN1, NULL); |
|
gpio_request(GPIO_FN_KEYIN0, NULL); |
|
gpio_request(GPIO_FN_KEYOUT3, NULL); |
|
gpio_request(GPIO_FN_KEYOUT2, NULL); |
|
gpio_request(GPIO_FN_KEYOUT1, NULL); |
|
gpio_request(GPIO_FN_KEYOUT0, NULL); |
|
|
|
/* enable FSI */ |
|
gpio_request(GPIO_FN_FSIMCKA, NULL); |
|
gpio_request(GPIO_FN_FSIIASD, NULL); |
|
gpio_request(GPIO_FN_FSIOASD, NULL); |
|
gpio_request(GPIO_FN_FSIIABCK, NULL); |
|
gpio_request(GPIO_FN_FSIIALRCK, NULL); |
|
gpio_request(GPIO_FN_FSIOABCK, NULL); |
|
gpio_request(GPIO_FN_FSIOALRCK, NULL); |
|
gpio_request(GPIO_FN_CLKAUDIOAO, NULL); |
|
|
|
/* set SPU2 clock to 83.4 MHz */ |
|
clk = clk_get(NULL, "spu_clk"); |
|
if (!IS_ERR(clk)) { |
|
clk_set_rate(clk, clk_round_rate(clk, 83333333)); |
|
clk_put(clk); |
|
} |
|
|
|
/* change parent of FSI A */ |
|
clk = clk_get(NULL, "fsia_clk"); |
|
if (!IS_ERR(clk)) { |
|
/* 48kHz dummy clock was used to make sure 1/1 divide */ |
|
clk_set_rate(&sh7724_fsimcka_clk, 48000); |
|
clk_set_parent(clk, &sh7724_fsimcka_clk); |
|
clk_set_rate(clk, 48000); |
|
clk_put(clk); |
|
} |
|
|
|
/* SDHI0 connected to cn7 */ |
|
gpio_request(GPIO_FN_SDHI0CD, NULL); |
|
gpio_request(GPIO_FN_SDHI0WP, NULL); |
|
gpio_request(GPIO_FN_SDHI0D3, NULL); |
|
gpio_request(GPIO_FN_SDHI0D2, NULL); |
|
gpio_request(GPIO_FN_SDHI0D1, NULL); |
|
gpio_request(GPIO_FN_SDHI0D0, NULL); |
|
gpio_request(GPIO_FN_SDHI0CMD, NULL); |
|
gpio_request(GPIO_FN_SDHI0CLK, NULL); |
|
|
|
/* SDHI1 connected to cn8 */ |
|
gpio_request(GPIO_FN_SDHI1CD, NULL); |
|
gpio_request(GPIO_FN_SDHI1WP, NULL); |
|
gpio_request(GPIO_FN_SDHI1D3, NULL); |
|
gpio_request(GPIO_FN_SDHI1D2, NULL); |
|
gpio_request(GPIO_FN_SDHI1D1, NULL); |
|
gpio_request(GPIO_FN_SDHI1D0, NULL); |
|
gpio_request(GPIO_FN_SDHI1CMD, NULL); |
|
gpio_request(GPIO_FN_SDHI1CLK, NULL); |
|
|
|
/* enable IrDA */ |
|
gpio_request(GPIO_FN_IRDA_OUT, NULL); |
|
gpio_request(GPIO_FN_IRDA_IN, NULL); |
|
|
|
/* |
|
* enable SH-Eth |
|
* |
|
* please remove J33 pin from your board !! |
|
* |
|
* ms7724 board should not use GPIO_FN_LNKSTA pin |
|
* So, This time PTX5 is set to input pin |
|
*/ |
|
gpio_request(GPIO_FN_RMII_RXD0, NULL); |
|
gpio_request(GPIO_FN_RMII_RXD1, NULL); |
|
gpio_request(GPIO_FN_RMII_TXD0, NULL); |
|
gpio_request(GPIO_FN_RMII_TXD1, NULL); |
|
gpio_request(GPIO_FN_RMII_REF_CLK, NULL); |
|
gpio_request(GPIO_FN_RMII_TX_EN, NULL); |
|
gpio_request(GPIO_FN_RMII_RX_ER, NULL); |
|
gpio_request(GPIO_FN_RMII_CRS_DV, NULL); |
|
gpio_request(GPIO_FN_MDIO, NULL); |
|
gpio_request(GPIO_FN_MDC, NULL); |
|
gpio_request(GPIO_PTX5, NULL); |
|
gpio_direction_input(GPIO_PTX5); |
|
sh_eth_init(); |
|
|
|
if (sw & SW41_B) { |
|
/* 720p */ |
|
lcdc_info.ch[0].lcd_modes = lcdc_720p_modes; |
|
lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_720p_modes); |
|
} else { |
|
/* VGA */ |
|
lcdc_info.ch[0].lcd_modes = lcdc_vga_modes; |
|
lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_vga_modes); |
|
} |
|
|
|
if (sw & SW41_A) { |
|
/* Digital monitor */ |
|
lcdc_info.ch[0].interface_type = RGB18; |
|
lcdc_info.ch[0].flags = 0; |
|
} else { |
|
/* Analog monitor */ |
|
lcdc_info.ch[0].interface_type = RGB24; |
|
lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL; |
|
} |
|
|
|
/* VOU */ |
|
gpio_request(GPIO_FN_DV_D15, NULL); |
|
gpio_request(GPIO_FN_DV_D14, NULL); |
|
gpio_request(GPIO_FN_DV_D13, NULL); |
|
gpio_request(GPIO_FN_DV_D12, NULL); |
|
gpio_request(GPIO_FN_DV_D11, NULL); |
|
gpio_request(GPIO_FN_DV_D10, NULL); |
|
gpio_request(GPIO_FN_DV_D9, NULL); |
|
gpio_request(GPIO_FN_DV_D8, NULL); |
|
gpio_request(GPIO_FN_DV_CLKI, NULL); |
|
gpio_request(GPIO_FN_DV_CLK, NULL); |
|
gpio_request(GPIO_FN_DV_VSYNC, NULL); |
|
gpio_request(GPIO_FN_DV_HSYNC, NULL); |
|
|
|
/* Initialize CEU platform devices separately to map memory first */ |
|
device_initialize(&ms7724se_ceu_devices[0]->dev); |
|
dma_declare_coherent_memory(&ms7724se_ceu_devices[0]->dev, |
|
ceu0_dma_membase, ceu0_dma_membase, |
|
ceu0_dma_membase + |
|
CEU_BUFFER_MEMORY_SIZE - 1); |
|
platform_device_add(ms7724se_ceu_devices[0]); |
|
|
|
device_initialize(&ms7724se_ceu_devices[1]->dev); |
|
dma_declare_coherent_memory(&ms7724se_ceu_devices[1]->dev, |
|
ceu1_dma_membase, ceu1_dma_membase, |
|
ceu1_dma_membase + |
|
CEU_BUFFER_MEMORY_SIZE - 1); |
|
platform_device_add(ms7724se_ceu_devices[1]); |
|
|
|
return platform_add_devices(ms7724se_devices, |
|
ARRAY_SIZE(ms7724se_devices)); |
|
} |
|
device_initcall(devices_setup); |
|
|
|
/* Reserve a portion of memory for CEU 0 and CEU 1 buffers */ |
|
static void __init ms7724se_mv_mem_reserve(void) |
|
{ |
|
phys_addr_t phys; |
|
phys_addr_t size = CEU_BUFFER_MEMORY_SIZE; |
|
|
|
phys = memblock_phys_alloc(size, PAGE_SIZE); |
|
if (!phys) |
|
panic("Failed to allocate CEU0 memory\n"); |
|
|
|
memblock_free(phys, size); |
|
memblock_remove(phys, size); |
|
ceu0_dma_membase = phys; |
|
|
|
phys = memblock_phys_alloc(size, PAGE_SIZE); |
|
if (!phys) |
|
panic("Failed to allocate CEU1 memory\n"); |
|
|
|
memblock_free(phys, size); |
|
memblock_remove(phys, size); |
|
ceu1_dma_membase = phys; |
|
} |
|
|
|
static struct sh_machine_vector mv_ms7724se __initmv = { |
|
.mv_name = "ms7724se", |
|
.mv_init_irq = init_se7724_IRQ, |
|
.mv_mem_reserve = ms7724se_mv_mem_reserve, |
|
};
|
|
|