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100 lines
2.3 KiB
100 lines
2.3 KiB
# SPDX-License-Identifier: GPL-2.0 |
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menu "Processor features" |
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choice |
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prompt "Endianness selection" |
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default CPU_LITTLE_ENDIAN |
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help |
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Some SuperH machines can be configured for either little or big |
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endian byte order. These modes require different kernels. |
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config CPU_LITTLE_ENDIAN |
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bool "Little Endian" |
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config CPU_BIG_ENDIAN |
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bool "Big Endian" |
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endchoice |
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config SH_FPU |
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def_bool y |
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prompt "FPU support" |
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depends on CPU_HAS_FPU |
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help |
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Selecting this option will enable support for SH processors that |
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have FPU units (ie, SH77xx). |
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This option must be set in order to enable the FPU. |
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config SH_FPU_EMU |
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def_bool n |
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prompt "FPU emulation support" |
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depends on !SH_FPU |
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help |
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Selecting this option will enable support for software FPU emulation. |
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Most SH-3 users will want to say Y here, whereas most SH-4 users will |
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want to say N. |
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config SH_DSP |
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def_bool y |
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prompt "DSP support" |
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depends on CPU_HAS_DSP |
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help |
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Selecting this option will enable support for SH processors that |
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have DSP units (ie, SH2-DSP, SH3-DSP, and SH4AL-DSP). |
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This option must be set in order to enable the DSP. |
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config SH_ADC |
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def_bool y |
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prompt "ADC support" |
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depends on CPU_SH3 |
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help |
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Selecting this option will allow the Linux kernel to use SH3 on-chip |
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ADC module. |
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If unsure, say N. |
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config SH_STORE_QUEUES |
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bool "Support for Store Queues" |
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depends on CPU_SH4 |
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help |
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Selecting this option will enable an in-kernel API for manipulating |
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the store queues integrated in the SH-4 processors. |
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config SPECULATIVE_EXECUTION |
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bool "Speculative subroutine return" |
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depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 || CPU_SUBTYPE_SH7786 |
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help |
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This enables support for a speculative instruction fetch for |
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subroutine return. There are various pitfalls associated with |
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this, as outlined in the SH7780 hardware manual. |
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If unsure, say N. |
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config CPU_HAS_INTEVT |
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bool |
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config CPU_HAS_IPR_IRQ |
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bool |
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config CPU_HAS_SR_RB |
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bool |
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help |
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This will enable the use of SR.RB register bank usage. Processors |
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that are lacking this bit must have another method in place for |
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accomplishing what is taken care of by the banked registers. |
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See <file:Documentation/sh/register-banks.rst> for further |
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information on SR.RB and register banking in the kernel in general. |
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config CPU_HAS_PTEAEX |
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bool |
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config CPU_HAS_DSP |
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bool |
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config CPU_HAS_FPU |
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bool |
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endmenu
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