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671 lines
15 KiB
671 lines
15 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* |
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* Copyright SUSE Linux Products GmbH 2009 |
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* |
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* Authors: Alexander Graf <[email protected]> |
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*/ |
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|
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#include <linux/types.h> |
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#include <linux/string.h> |
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#include <linux/kvm.h> |
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#include <linux/kvm_host.h> |
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#include <linux/highmem.h> |
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#include <asm/kvm_ppc.h> |
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#include <asm/kvm_book3s.h> |
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#include <asm/book3s/64/mmu-hash.h> |
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|
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/* #define DEBUG_MMU */ |
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|
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#ifdef DEBUG_MMU |
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#define dprintk(X...) printk(KERN_INFO X) |
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#else |
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#define dprintk(X...) do { } while(0) |
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#endif |
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static struct kvmppc_slb *kvmppc_mmu_book3s_64_find_slbe( |
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struct kvm_vcpu *vcpu, |
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gva_t eaddr) |
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{ |
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int i; |
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u64 esid = GET_ESID(eaddr); |
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u64 esid_1t = GET_ESID_1T(eaddr); |
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for (i = 0; i < vcpu->arch.slb_nr; i++) { |
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u64 cmp_esid = esid; |
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if (!vcpu->arch.slb[i].valid) |
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continue; |
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if (vcpu->arch.slb[i].tb) |
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cmp_esid = esid_1t; |
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if (vcpu->arch.slb[i].esid == cmp_esid) |
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return &vcpu->arch.slb[i]; |
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} |
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dprintk("KVM: No SLB entry found for 0x%lx [%llx | %llx]\n", |
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eaddr, esid, esid_1t); |
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for (i = 0; i < vcpu->arch.slb_nr; i++) { |
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if (vcpu->arch.slb[i].vsid) |
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dprintk(" %d: %c%c%c %llx %llx\n", i, |
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vcpu->arch.slb[i].valid ? 'v' : ' ', |
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vcpu->arch.slb[i].large ? 'l' : ' ', |
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vcpu->arch.slb[i].tb ? 't' : ' ', |
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vcpu->arch.slb[i].esid, |
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vcpu->arch.slb[i].vsid); |
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} |
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return NULL; |
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} |
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static int kvmppc_slb_sid_shift(struct kvmppc_slb *slbe) |
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{ |
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return slbe->tb ? SID_SHIFT_1T : SID_SHIFT; |
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} |
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static u64 kvmppc_slb_offset_mask(struct kvmppc_slb *slbe) |
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{ |
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return (1ul << kvmppc_slb_sid_shift(slbe)) - 1; |
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} |
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static u64 kvmppc_slb_calc_vpn(struct kvmppc_slb *slb, gva_t eaddr) |
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{ |
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eaddr &= kvmppc_slb_offset_mask(slb); |
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return (eaddr >> VPN_SHIFT) | |
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((slb->vsid) << (kvmppc_slb_sid_shift(slb) - VPN_SHIFT)); |
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} |
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static u64 kvmppc_mmu_book3s_64_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr, |
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bool data) |
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{ |
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struct kvmppc_slb *slb; |
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slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr); |
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if (!slb) |
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return 0; |
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return kvmppc_slb_calc_vpn(slb, eaddr); |
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} |
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static int mmu_pagesize(int mmu_pg) |
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{ |
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switch (mmu_pg) { |
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case MMU_PAGE_64K: |
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return 16; |
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case MMU_PAGE_16M: |
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return 24; |
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} |
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return 12; |
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} |
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static int kvmppc_mmu_book3s_64_get_pagesize(struct kvmppc_slb *slbe) |
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{ |
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return mmu_pagesize(slbe->base_page_size); |
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} |
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static u32 kvmppc_mmu_book3s_64_get_page(struct kvmppc_slb *slbe, gva_t eaddr) |
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{ |
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int p = kvmppc_mmu_book3s_64_get_pagesize(slbe); |
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return ((eaddr & kvmppc_slb_offset_mask(slbe)) >> p); |
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} |
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static hva_t kvmppc_mmu_book3s_64_get_pteg(struct kvm_vcpu *vcpu, |
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struct kvmppc_slb *slbe, gva_t eaddr, |
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bool second) |
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{ |
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struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu); |
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u64 hash, pteg, htabsize; |
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u32 ssize; |
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hva_t r; |
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u64 vpn; |
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htabsize = ((1 << ((vcpu_book3s->sdr1 & 0x1f) + 11)) - 1); |
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vpn = kvmppc_slb_calc_vpn(slbe, eaddr); |
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ssize = slbe->tb ? MMU_SEGSIZE_1T : MMU_SEGSIZE_256M; |
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hash = hpt_hash(vpn, kvmppc_mmu_book3s_64_get_pagesize(slbe), ssize); |
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if (second) |
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hash = ~hash; |
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hash &= ((1ULL << 39ULL) - 1ULL); |
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hash &= htabsize; |
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hash <<= 7ULL; |
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pteg = vcpu_book3s->sdr1 & 0xfffffffffffc0000ULL; |
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pteg |= hash; |
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dprintk("MMU: page=0x%x sdr1=0x%llx pteg=0x%llx vsid=0x%llx\n", |
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page, vcpu_book3s->sdr1, pteg, slbe->vsid); |
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/* When running a PAPR guest, SDR1 contains a HVA address instead |
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of a GPA */ |
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if (vcpu->arch.papr_enabled) |
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r = pteg; |
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else |
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r = gfn_to_hva(vcpu->kvm, pteg >> PAGE_SHIFT); |
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if (kvm_is_error_hva(r)) |
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return r; |
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return r | (pteg & ~PAGE_MASK); |
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} |
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static u64 kvmppc_mmu_book3s_64_get_avpn(struct kvmppc_slb *slbe, gva_t eaddr) |
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{ |
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int p = kvmppc_mmu_book3s_64_get_pagesize(slbe); |
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u64 avpn; |
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avpn = kvmppc_mmu_book3s_64_get_page(slbe, eaddr); |
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avpn |= slbe->vsid << (kvmppc_slb_sid_shift(slbe) - p); |
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if (p < 16) |
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avpn >>= ((80 - p) - 56) - 8; /* 16 - p */ |
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else |
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avpn <<= p - 16; |
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return avpn; |
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} |
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/* |
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* Return page size encoded in the second word of a HPTE, or |
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* -1 for an invalid encoding for the base page size indicated by |
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* the SLB entry. This doesn't handle mixed pagesize segments yet. |
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*/ |
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static int decode_pagesize(struct kvmppc_slb *slbe, u64 r) |
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{ |
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switch (slbe->base_page_size) { |
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case MMU_PAGE_64K: |
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if ((r & 0xf000) == 0x1000) |
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return MMU_PAGE_64K; |
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break; |
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case MMU_PAGE_16M: |
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if ((r & 0xff000) == 0) |
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return MMU_PAGE_16M; |
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break; |
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} |
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return -1; |
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} |
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static int kvmppc_mmu_book3s_64_xlate(struct kvm_vcpu *vcpu, gva_t eaddr, |
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struct kvmppc_pte *gpte, bool data, |
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bool iswrite) |
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{ |
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struct kvmppc_slb *slbe; |
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hva_t ptegp; |
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u64 pteg[16]; |
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u64 avpn = 0; |
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u64 v, r; |
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u64 v_val, v_mask; |
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u64 eaddr_mask; |
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int i; |
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u8 pp, key = 0; |
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bool found = false; |
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bool second = false; |
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int pgsize; |
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ulong mp_ea = vcpu->arch.magic_page_ea; |
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/* Magic page override */ |
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if (unlikely(mp_ea) && |
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unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) && |
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!(kvmppc_get_msr(vcpu) & MSR_PR)) { |
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gpte->eaddr = eaddr; |
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gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data); |
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gpte->raddr = vcpu->arch.magic_page_pa | (gpte->raddr & 0xfff); |
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gpte->raddr &= KVM_PAM; |
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gpte->may_execute = true; |
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gpte->may_read = true; |
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gpte->may_write = true; |
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gpte->page_size = MMU_PAGE_4K; |
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gpte->wimg = HPTE_R_M; |
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return 0; |
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} |
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slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr); |
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if (!slbe) |
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goto no_seg_found; |
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avpn = kvmppc_mmu_book3s_64_get_avpn(slbe, eaddr); |
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v_val = avpn & HPTE_V_AVPN; |
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if (slbe->tb) |
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v_val |= SLB_VSID_B_1T; |
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if (slbe->large) |
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v_val |= HPTE_V_LARGE; |
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v_val |= HPTE_V_VALID; |
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v_mask = SLB_VSID_B | HPTE_V_AVPN | HPTE_V_LARGE | HPTE_V_VALID | |
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HPTE_V_SECONDARY; |
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pgsize = slbe->large ? MMU_PAGE_16M : MMU_PAGE_4K; |
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mutex_lock(&vcpu->kvm->arch.hpt_mutex); |
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do_second: |
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ptegp = kvmppc_mmu_book3s_64_get_pteg(vcpu, slbe, eaddr, second); |
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if (kvm_is_error_hva(ptegp)) |
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goto no_page_found; |
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if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) { |
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printk_ratelimited(KERN_ERR |
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"KVM: Can't copy data from 0x%lx!\n", ptegp); |
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goto no_page_found; |
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} |
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if ((kvmppc_get_msr(vcpu) & MSR_PR) && slbe->Kp) |
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key = 4; |
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else if (!(kvmppc_get_msr(vcpu) & MSR_PR) && slbe->Ks) |
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key = 4; |
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for (i=0; i<16; i+=2) { |
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u64 pte0 = be64_to_cpu(pteg[i]); |
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u64 pte1 = be64_to_cpu(pteg[i + 1]); |
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/* Check all relevant fields of 1st dword */ |
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if ((pte0 & v_mask) == v_val) { |
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/* If large page bit is set, check pgsize encoding */ |
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if (slbe->large && |
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(vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE)) { |
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pgsize = decode_pagesize(slbe, pte1); |
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if (pgsize < 0) |
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continue; |
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} |
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found = true; |
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break; |
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} |
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} |
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if (!found) { |
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if (second) |
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goto no_page_found; |
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v_val |= HPTE_V_SECONDARY; |
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second = true; |
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goto do_second; |
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} |
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v = be64_to_cpu(pteg[i]); |
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r = be64_to_cpu(pteg[i+1]); |
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pp = (r & HPTE_R_PP) | key; |
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if (r & HPTE_R_PP0) |
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pp |= 8; |
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gpte->eaddr = eaddr; |
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gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data); |
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eaddr_mask = (1ull << mmu_pagesize(pgsize)) - 1; |
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gpte->raddr = (r & HPTE_R_RPN & ~eaddr_mask) | (eaddr & eaddr_mask); |
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gpte->page_size = pgsize; |
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gpte->may_execute = ((r & HPTE_R_N) ? false : true); |
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if (unlikely(vcpu->arch.disable_kernel_nx) && |
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!(kvmppc_get_msr(vcpu) & MSR_PR)) |
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gpte->may_execute = true; |
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gpte->may_read = false; |
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gpte->may_write = false; |
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gpte->wimg = r & HPTE_R_WIMG; |
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switch (pp) { |
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case 0: |
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case 1: |
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case 2: |
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case 6: |
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gpte->may_write = true; |
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fallthrough; |
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case 3: |
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case 5: |
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case 7: |
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case 10: |
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gpte->may_read = true; |
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break; |
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} |
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dprintk("KVM MMU: Translated 0x%lx [0x%llx] -> 0x%llx " |
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"-> 0x%lx\n", |
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eaddr, avpn, gpte->vpage, gpte->raddr); |
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/* Update PTE R and C bits, so the guest's swapper knows we used the |
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* page */ |
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if (gpte->may_read && !(r & HPTE_R_R)) { |
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/* |
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* Set the accessed flag. |
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* We have to write this back with a single byte write |
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* because another vcpu may be accessing this on |
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* non-PAPR platforms such as mac99, and this is |
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* what real hardware does. |
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*/ |
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char __user *addr = (char __user *) (ptegp + (i + 1) * sizeof(u64)); |
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r |= HPTE_R_R; |
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put_user(r >> 8, addr + 6); |
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} |
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if (iswrite && gpte->may_write && !(r & HPTE_R_C)) { |
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/* Set the dirty flag */ |
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/* Use a single byte write */ |
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char __user *addr = (char __user *) (ptegp + (i + 1) * sizeof(u64)); |
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r |= HPTE_R_C; |
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put_user(r, addr + 7); |
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} |
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mutex_unlock(&vcpu->kvm->arch.hpt_mutex); |
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if (!gpte->may_read || (iswrite && !gpte->may_write)) |
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return -EPERM; |
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return 0; |
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no_page_found: |
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mutex_unlock(&vcpu->kvm->arch.hpt_mutex); |
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return -ENOENT; |
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no_seg_found: |
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dprintk("KVM MMU: Trigger segment fault\n"); |
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return -EINVAL; |
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} |
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static void kvmppc_mmu_book3s_64_slbmte(struct kvm_vcpu *vcpu, u64 rs, u64 rb) |
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{ |
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u64 esid, esid_1t; |
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int slb_nr; |
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struct kvmppc_slb *slbe; |
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dprintk("KVM MMU: slbmte(0x%llx, 0x%llx)\n", rs, rb); |
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esid = GET_ESID(rb); |
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esid_1t = GET_ESID_1T(rb); |
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slb_nr = rb & 0xfff; |
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if (slb_nr > vcpu->arch.slb_nr) |
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return; |
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slbe = &vcpu->arch.slb[slb_nr]; |
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slbe->large = (rs & SLB_VSID_L) ? 1 : 0; |
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slbe->tb = (rs & SLB_VSID_B_1T) ? 1 : 0; |
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slbe->esid = slbe->tb ? esid_1t : esid; |
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slbe->vsid = (rs & ~SLB_VSID_B) >> (kvmppc_slb_sid_shift(slbe) - 16); |
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slbe->valid = (rb & SLB_ESID_V) ? 1 : 0; |
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slbe->Ks = (rs & SLB_VSID_KS) ? 1 : 0; |
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slbe->Kp = (rs & SLB_VSID_KP) ? 1 : 0; |
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slbe->nx = (rs & SLB_VSID_N) ? 1 : 0; |
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slbe->class = (rs & SLB_VSID_C) ? 1 : 0; |
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slbe->base_page_size = MMU_PAGE_4K; |
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if (slbe->large) { |
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if (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE) { |
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switch (rs & SLB_VSID_LP) { |
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case SLB_VSID_LP_00: |
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slbe->base_page_size = MMU_PAGE_16M; |
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break; |
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case SLB_VSID_LP_01: |
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slbe->base_page_size = MMU_PAGE_64K; |
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break; |
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} |
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} else |
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slbe->base_page_size = MMU_PAGE_16M; |
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} |
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slbe->orige = rb & (ESID_MASK | SLB_ESID_V); |
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slbe->origv = rs; |
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/* Map the new segment */ |
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kvmppc_mmu_map_segment(vcpu, esid << SID_SHIFT); |
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} |
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static int kvmppc_mmu_book3s_64_slbfee(struct kvm_vcpu *vcpu, gva_t eaddr, |
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ulong *ret_slb) |
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{ |
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struct kvmppc_slb *slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr); |
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if (slbe) { |
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*ret_slb = slbe->origv; |
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return 0; |
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} |
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*ret_slb = 0; |
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return -ENOENT; |
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} |
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static u64 kvmppc_mmu_book3s_64_slbmfee(struct kvm_vcpu *vcpu, u64 slb_nr) |
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{ |
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struct kvmppc_slb *slbe; |
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if (slb_nr > vcpu->arch.slb_nr) |
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return 0; |
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slbe = &vcpu->arch.slb[slb_nr]; |
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return slbe->orige; |
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} |
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static u64 kvmppc_mmu_book3s_64_slbmfev(struct kvm_vcpu *vcpu, u64 slb_nr) |
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{ |
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struct kvmppc_slb *slbe; |
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if (slb_nr > vcpu->arch.slb_nr) |
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return 0; |
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slbe = &vcpu->arch.slb[slb_nr]; |
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return slbe->origv; |
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} |
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static void kvmppc_mmu_book3s_64_slbie(struct kvm_vcpu *vcpu, u64 ea) |
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{ |
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struct kvmppc_slb *slbe; |
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u64 seg_size; |
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dprintk("KVM MMU: slbie(0x%llx)\n", ea); |
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slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea); |
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|
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if (!slbe) |
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return; |
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dprintk("KVM MMU: slbie(0x%llx, 0x%llx)\n", ea, slbe->esid); |
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slbe->valid = false; |
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slbe->orige = 0; |
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slbe->origv = 0; |
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seg_size = 1ull << kvmppc_slb_sid_shift(slbe); |
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kvmppc_mmu_flush_segment(vcpu, ea & ~(seg_size - 1), seg_size); |
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} |
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static void kvmppc_mmu_book3s_64_slbia(struct kvm_vcpu *vcpu) |
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{ |
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int i; |
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|
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dprintk("KVM MMU: slbia()\n"); |
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for (i = 1; i < vcpu->arch.slb_nr; i++) { |
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vcpu->arch.slb[i].valid = false; |
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vcpu->arch.slb[i].orige = 0; |
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vcpu->arch.slb[i].origv = 0; |
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} |
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if (kvmppc_get_msr(vcpu) & MSR_IR) { |
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kvmppc_mmu_flush_segments(vcpu); |
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kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)); |
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} |
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} |
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|
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static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum, |
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ulong value) |
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{ |
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u64 rb = 0, rs = 0; |
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|
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/* |
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* According to Book3 2.01 mtsrin is implemented as: |
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* |
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* The SLB entry specified by (RB)32:35 is loaded from register |
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* RS, as follows. |
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* |
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* SLBE Bit Source SLB Field |
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* |
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* 0:31 0x0000_0000 ESID-0:31 |
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* 32:35 (RB)32:35 ESID-32:35 |
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* 36 0b1 V |
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* 37:61 0x00_0000|| 0b0 VSID-0:24 |
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* 62:88 (RS)37:63 VSID-25:51 |
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* 89:91 (RS)33:35 Ks Kp N |
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* 92 (RS)36 L ((RS)36 must be 0b0) |
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* 93 0b0 C |
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*/ |
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|
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dprintk("KVM MMU: mtsrin(0x%x, 0x%lx)\n", srnum, value); |
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|
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/* ESID = srnum */ |
|
rb |= (srnum & 0xf) << 28; |
|
/* Set the valid bit */ |
|
rb |= 1 << 27; |
|
/* Index = ESID */ |
|
rb |= srnum; |
|
|
|
/* VSID = VSID */ |
|
rs |= (value & 0xfffffff) << 12; |
|
/* flags = flags */ |
|
rs |= ((value >> 28) & 0x7) << 9; |
|
|
|
kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb); |
|
} |
|
|
|
static void kvmppc_mmu_book3s_64_tlbie(struct kvm_vcpu *vcpu, ulong va, |
|
bool large) |
|
{ |
|
u64 mask = 0xFFFFFFFFFULL; |
|
long i; |
|
struct kvm_vcpu *v; |
|
|
|
dprintk("KVM MMU: tlbie(0x%lx)\n", va); |
|
|
|
/* |
|
* The tlbie instruction changed behaviour starting with |
|
* POWER6. POWER6 and later don't have the large page flag |
|
* in the instruction but in the RB value, along with bits |
|
* indicating page and segment sizes. |
|
*/ |
|
if (vcpu->arch.hflags & BOOK3S_HFLAG_NEW_TLBIE) { |
|
/* POWER6 or later */ |
|
if (va & 1) { /* L bit */ |
|
if ((va & 0xf000) == 0x1000) |
|
mask = 0xFFFFFFFF0ULL; /* 64k page */ |
|
else |
|
mask = 0xFFFFFF000ULL; /* 16M page */ |
|
} |
|
} else { |
|
/* older processors, e.g. PPC970 */ |
|
if (large) |
|
mask = 0xFFFFFF000ULL; |
|
} |
|
/* flush this VA on all vcpus */ |
|
kvm_for_each_vcpu(i, v, vcpu->kvm) |
|
kvmppc_mmu_pte_vflush(v, va >> 12, mask); |
|
} |
|
|
|
#ifdef CONFIG_PPC_64K_PAGES |
|
static int segment_contains_magic_page(struct kvm_vcpu *vcpu, ulong esid) |
|
{ |
|
ulong mp_ea = vcpu->arch.magic_page_ea; |
|
|
|
return mp_ea && !(kvmppc_get_msr(vcpu) & MSR_PR) && |
|
(mp_ea >> SID_SHIFT) == esid; |
|
} |
|
#endif |
|
|
|
static int kvmppc_mmu_book3s_64_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid, |
|
u64 *vsid) |
|
{ |
|
ulong ea = esid << SID_SHIFT; |
|
struct kvmppc_slb *slb; |
|
u64 gvsid = esid; |
|
ulong mp_ea = vcpu->arch.magic_page_ea; |
|
int pagesize = MMU_PAGE_64K; |
|
u64 msr = kvmppc_get_msr(vcpu); |
|
|
|
if (msr & (MSR_DR|MSR_IR)) { |
|
slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea); |
|
if (slb) { |
|
gvsid = slb->vsid; |
|
pagesize = slb->base_page_size; |
|
if (slb->tb) { |
|
gvsid <<= SID_SHIFT_1T - SID_SHIFT; |
|
gvsid |= esid & ((1ul << (SID_SHIFT_1T - SID_SHIFT)) - 1); |
|
gvsid |= VSID_1T; |
|
} |
|
} |
|
} |
|
|
|
switch (msr & (MSR_DR|MSR_IR)) { |
|
case 0: |
|
gvsid = VSID_REAL | esid; |
|
break; |
|
case MSR_IR: |
|
gvsid |= VSID_REAL_IR; |
|
break; |
|
case MSR_DR: |
|
gvsid |= VSID_REAL_DR; |
|
break; |
|
case MSR_DR|MSR_IR: |
|
if (!slb) |
|
goto no_slb; |
|
|
|
break; |
|
default: |
|
BUG(); |
|
break; |
|
} |
|
|
|
#ifdef CONFIG_PPC_64K_PAGES |
|
/* |
|
* Mark this as a 64k segment if the host is using |
|
* 64k pages, the host MMU supports 64k pages and |
|
* the guest segment page size is >= 64k, |
|
* but not if this segment contains the magic page. |
|
*/ |
|
if (pagesize >= MMU_PAGE_64K && |
|
mmu_psize_defs[MMU_PAGE_64K].shift && |
|
!segment_contains_magic_page(vcpu, esid)) |
|
gvsid |= VSID_64K; |
|
#endif |
|
|
|
if (kvmppc_get_msr(vcpu) & MSR_PR) |
|
gvsid |= VSID_PR; |
|
|
|
*vsid = gvsid; |
|
return 0; |
|
|
|
no_slb: |
|
/* Catch magic page case */ |
|
if (unlikely(mp_ea) && |
|
unlikely(esid == (mp_ea >> SID_SHIFT)) && |
|
!(kvmppc_get_msr(vcpu) & MSR_PR)) { |
|
*vsid = VSID_REAL | esid; |
|
return 0; |
|
} |
|
|
|
return -EINVAL; |
|
} |
|
|
|
static bool kvmppc_mmu_book3s_64_is_dcbz32(struct kvm_vcpu *vcpu) |
|
{ |
|
return (to_book3s(vcpu)->hid[5] & 0x80); |
|
} |
|
|
|
void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu) |
|
{ |
|
struct kvmppc_mmu *mmu = &vcpu->arch.mmu; |
|
|
|
mmu->mfsrin = NULL; |
|
mmu->mtsrin = kvmppc_mmu_book3s_64_mtsrin; |
|
mmu->slbmte = kvmppc_mmu_book3s_64_slbmte; |
|
mmu->slbmfee = kvmppc_mmu_book3s_64_slbmfee; |
|
mmu->slbmfev = kvmppc_mmu_book3s_64_slbmfev; |
|
mmu->slbfee = kvmppc_mmu_book3s_64_slbfee; |
|
mmu->slbie = kvmppc_mmu_book3s_64_slbie; |
|
mmu->slbia = kvmppc_mmu_book3s_64_slbia; |
|
mmu->xlate = kvmppc_mmu_book3s_64_xlate; |
|
mmu->tlbie = kvmppc_mmu_book3s_64_tlbie; |
|
mmu->esid_to_vsid = kvmppc_mmu_book3s_64_esid_to_vsid; |
|
mmu->ea_to_vp = kvmppc_mmu_book3s_64_ea_to_vp; |
|
mmu->is_dcbz32 = kvmppc_mmu_book3s_64_is_dcbz32; |
|
|
|
vcpu->arch.hflags |= BOOK3S_HFLAG_SLB; |
|
}
|
|
|