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210 lines
5.7 KiB
210 lines
5.7 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corporation |
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* |
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* Provide default implementations of the DMA mapping callbacks for |
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* busses using the iommu infrastructure |
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*/ |
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#include <linux/dma-direct.h> |
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#include <linux/pci.h> |
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#include <asm/iommu.h> |
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#ifdef CONFIG_ARCH_HAS_DMA_MAP_DIRECT |
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#define can_map_direct(dev, addr) \ |
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((dev)->bus_dma_limit >= phys_to_dma((dev), (addr))) |
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bool arch_dma_map_page_direct(struct device *dev, phys_addr_t addr) |
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{ |
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if (likely(!dev->bus_dma_limit)) |
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return false; |
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return can_map_direct(dev, addr); |
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} |
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#define is_direct_handle(dev, h) ((h) >= (dev)->archdata.dma_offset) |
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bool arch_dma_unmap_page_direct(struct device *dev, dma_addr_t dma_handle) |
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{ |
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if (likely(!dev->bus_dma_limit)) |
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return false; |
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return is_direct_handle(dev, dma_handle); |
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} |
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bool arch_dma_map_sg_direct(struct device *dev, struct scatterlist *sg, |
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int nents) |
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{ |
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struct scatterlist *s; |
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int i; |
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if (likely(!dev->bus_dma_limit)) |
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return false; |
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for_each_sg(sg, s, nents, i) { |
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if (!can_map_direct(dev, sg_phys(s) + s->offset + s->length)) |
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return false; |
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} |
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return true; |
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} |
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bool arch_dma_unmap_sg_direct(struct device *dev, struct scatterlist *sg, |
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int nents) |
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{ |
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struct scatterlist *s; |
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int i; |
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if (likely(!dev->bus_dma_limit)) |
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return false; |
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for_each_sg(sg, s, nents, i) { |
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if (!is_direct_handle(dev, s->dma_address + s->length)) |
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return false; |
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} |
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return true; |
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} |
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#endif /* CONFIG_ARCH_HAS_DMA_MAP_DIRECT */ |
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/* |
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* Generic iommu implementation |
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*/ |
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/* Allocates a contiguous real buffer and creates mappings over it. |
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* Returns the virtual address of the buffer and sets dma_handle |
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* to the dma address (mapping) of the first page. |
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*/ |
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static void *dma_iommu_alloc_coherent(struct device *dev, size_t size, |
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dma_addr_t *dma_handle, gfp_t flag, |
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unsigned long attrs) |
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{ |
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return iommu_alloc_coherent(dev, get_iommu_table_base(dev), size, |
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dma_handle, dev->coherent_dma_mask, flag, |
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dev_to_node(dev)); |
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} |
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static void dma_iommu_free_coherent(struct device *dev, size_t size, |
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void *vaddr, dma_addr_t dma_handle, |
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unsigned long attrs) |
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{ |
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iommu_free_coherent(get_iommu_table_base(dev), size, vaddr, dma_handle); |
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} |
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/* Creates TCEs for a user provided buffer. The user buffer must be |
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* contiguous real kernel storage (not vmalloc). The address passed here |
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* comprises a page address and offset into that page. The dma_addr_t |
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* returned will point to the same byte within the page as was passed in. |
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*/ |
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static dma_addr_t dma_iommu_map_page(struct device *dev, struct page *page, |
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unsigned long offset, size_t size, |
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enum dma_data_direction direction, |
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unsigned long attrs) |
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{ |
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return iommu_map_page(dev, get_iommu_table_base(dev), page, offset, |
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size, dma_get_mask(dev), direction, attrs); |
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} |
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static void dma_iommu_unmap_page(struct device *dev, dma_addr_t dma_handle, |
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size_t size, enum dma_data_direction direction, |
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unsigned long attrs) |
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{ |
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iommu_unmap_page(get_iommu_table_base(dev), dma_handle, size, direction, |
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attrs); |
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} |
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static int dma_iommu_map_sg(struct device *dev, struct scatterlist *sglist, |
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int nelems, enum dma_data_direction direction, |
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unsigned long attrs) |
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{ |
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return ppc_iommu_map_sg(dev, get_iommu_table_base(dev), sglist, nelems, |
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dma_get_mask(dev), direction, attrs); |
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} |
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static void dma_iommu_unmap_sg(struct device *dev, struct scatterlist *sglist, |
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int nelems, enum dma_data_direction direction, |
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unsigned long attrs) |
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{ |
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ppc_iommu_unmap_sg(get_iommu_table_base(dev), sglist, nelems, |
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direction, attrs); |
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} |
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static bool dma_iommu_bypass_supported(struct device *dev, u64 mask) |
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{ |
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struct pci_dev *pdev = to_pci_dev(dev); |
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struct pci_controller *phb = pci_bus_to_host(pdev->bus); |
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if (iommu_fixed_is_weak || !phb->controller_ops.iommu_bypass_supported) |
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return false; |
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return phb->controller_ops.iommu_bypass_supported(pdev, mask); |
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} |
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/* We support DMA to/from any memory page via the iommu */ |
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int dma_iommu_dma_supported(struct device *dev, u64 mask) |
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{ |
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struct iommu_table *tbl = get_iommu_table_base(dev); |
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if (dev_is_pci(dev) && dma_iommu_bypass_supported(dev, mask)) { |
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/* |
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* dma_iommu_bypass_supported() sets dma_max when there is |
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* 1:1 mapping but it is somehow limited. |
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* ibm,pmemory is one example. |
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*/ |
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dev->dma_ops_bypass = dev->bus_dma_limit == 0; |
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if (!dev->dma_ops_bypass) |
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dev_warn(dev, |
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"iommu: 64-bit OK but direct DMA is limited by %llx\n", |
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dev->bus_dma_limit); |
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else |
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dev_dbg(dev, "iommu: 64-bit OK, using fixed ops\n"); |
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return 1; |
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} |
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if (!tbl) { |
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dev_err(dev, "Warning: IOMMU dma not supported: mask 0x%08llx, table unavailable\n", mask); |
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return 0; |
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} |
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if (tbl->it_offset > (mask >> tbl->it_page_shift)) { |
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dev_info(dev, "Warning: IOMMU offset too big for device mask\n"); |
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dev_info(dev, "mask: 0x%08llx, table offset: 0x%08lx\n", |
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mask, tbl->it_offset << tbl->it_page_shift); |
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return 0; |
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} |
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dev_dbg(dev, "iommu: not 64-bit, using default ops\n"); |
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dev->dma_ops_bypass = false; |
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return 1; |
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} |
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u64 dma_iommu_get_required_mask(struct device *dev) |
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{ |
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struct iommu_table *tbl = get_iommu_table_base(dev); |
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u64 mask; |
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if (!tbl) |
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return 0; |
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mask = 1ULL << (fls_long(tbl->it_offset + tbl->it_size) + |
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tbl->it_page_shift - 1); |
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mask += mask - 1; |
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return mask; |
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} |
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const struct dma_map_ops dma_iommu_ops = { |
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.alloc = dma_iommu_alloc_coherent, |
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.free = dma_iommu_free_coherent, |
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.map_sg = dma_iommu_map_sg, |
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.unmap_sg = dma_iommu_unmap_sg, |
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.dma_supported = dma_iommu_dma_supported, |
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.map_page = dma_iommu_map_page, |
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.unmap_page = dma_iommu_unmap_page, |
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.get_required_mask = dma_iommu_get_required_mask, |
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.mmap = dma_common_mmap, |
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.get_sgtable = dma_common_get_sgtable, |
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.alloc_pages = dma_common_alloc_pages, |
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.free_pages = dma_common_free_pages, |
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};
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