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48 lines
1.5 KiB
48 lines
1.5 KiB
/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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/* |
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* Performance event support - hardware-specific disambiguation |
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* |
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* For now this is a compile-time decision, but eventually it should be |
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* runtime. This would allow multiplatform perf event support for e300 (fsl |
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* embedded perf counters) plus server/classic, and would accommodate |
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* devices other than the core which provide their own performance counters. |
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* |
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* Copyright 2010 Freescale Semiconductor, Inc. |
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*/ |
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#ifdef CONFIG_PPC_PERF_CTRS |
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#include <asm/perf_event_server.h> |
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#else |
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static inline bool is_sier_available(void) { return false; } |
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static inline unsigned long get_pmcs_ext_regs(int idx) { return 0; } |
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#endif |
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#ifdef CONFIG_FSL_EMB_PERF_EVENT |
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#include <asm/perf_event_fsl_emb.h> |
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#endif |
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#ifdef CONFIG_PERF_EVENTS |
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#include <asm/ptrace.h> |
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#include <asm/reg.h> |
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#define perf_arch_bpf_user_pt_regs(regs) ®s->user_regs |
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/* |
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* Overload regs->result to specify whether we should use the MSR (result |
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* is zero) or the SIAR (result is non zero). |
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*/ |
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#define perf_arch_fetch_caller_regs(regs, __ip) \ |
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do { \ |
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(regs)->result = 0; \ |
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(regs)->nip = __ip; \ |
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(regs)->gpr[1] = current_stack_frame(); \ |
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asm volatile("mfmsr %0" : "=r" ((regs)->msr)); \ |
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} while (0) |
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/* To support perf_regs sier update */ |
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extern bool is_sier_available(void); |
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extern unsigned long get_pmcs_ext_regs(int idx); |
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/* To define perf extended regs mask value */ |
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extern u64 PERF_REG_EXTENDED_MASK; |
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#define PERF_REG_EXTENDED_MASK PERF_REG_EXTENDED_MASK |
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#endif
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