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129 lines
3.4 KiB
129 lines
3.4 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* Copyright 2011-2012, Meador Inge, Mentor Graphics Corporation. |
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*/ |
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#ifndef _ASM_MPIC_MSGR_H |
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#define _ASM_MPIC_MSGR_H |
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#include <linux/types.h> |
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#include <linux/spinlock.h> |
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#include <asm/smp.h> |
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#include <asm/io.h> |
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struct mpic_msgr { |
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u32 __iomem *base; |
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u32 __iomem *mer; |
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int irq; |
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unsigned char in_use; |
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raw_spinlock_t lock; |
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int num; |
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}; |
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/* Get a message register |
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* |
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* @reg_num: the MPIC message register to get |
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* |
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* A pointer to the message register is returned. If |
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* the message register asked for is already in use, then |
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* EBUSY is returned. If the number given is not associated |
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* with an actual message register, then ENODEV is returned. |
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* Successfully getting the register marks it as in use. |
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*/ |
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extern struct mpic_msgr *mpic_msgr_get(unsigned int reg_num); |
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/* Relinquish a message register |
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* |
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* @msgr: the message register to return |
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* |
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* Disables the given message register and marks it as free. |
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* After this call has completed successully the message |
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* register is available to be acquired by a call to |
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* mpic_msgr_get. |
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*/ |
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extern void mpic_msgr_put(struct mpic_msgr *msgr); |
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/* Enable a message register |
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* |
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* @msgr: the message register to enable |
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* |
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* The given message register is enabled for sending |
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* messages. |
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*/ |
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extern void mpic_msgr_enable(struct mpic_msgr *msgr); |
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/* Disable a message register |
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* |
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* @msgr: the message register to disable |
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* |
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* The given message register is disabled for sending |
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* messages. |
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*/ |
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extern void mpic_msgr_disable(struct mpic_msgr *msgr); |
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/* Write a message to a message register |
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* |
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* @msgr: the message register to write to |
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* @message: the message to write |
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* |
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* The given 32-bit message is written to the given message |
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* register. Writing to an enabled message registers fires |
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* an interrupt. |
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*/ |
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static inline void mpic_msgr_write(struct mpic_msgr *msgr, u32 message) |
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{ |
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out_be32(msgr->base, message); |
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} |
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/* Read a message from a message register |
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* |
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* @msgr: the message register to read from |
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* |
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* Returns the 32-bit value currently in the given message register. |
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* Upon reading the register any interrupts for that register are |
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* cleared. |
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*/ |
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static inline u32 mpic_msgr_read(struct mpic_msgr *msgr) |
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{ |
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return in_be32(msgr->base); |
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} |
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/* Clear a message register |
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* |
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* @msgr: the message register to clear |
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* |
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* Clears any interrupts associated with the given message register. |
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*/ |
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static inline void mpic_msgr_clear(struct mpic_msgr *msgr) |
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{ |
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(void) mpic_msgr_read(msgr); |
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} |
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/* Set the destination CPU for the message register |
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* |
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* @msgr: the message register whose destination is to be set |
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* @cpu_num: the Linux CPU number to bind the message register to |
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* |
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* Note that the CPU number given is the CPU number used by the kernel |
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* and *not* the actual hardware CPU number. |
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*/ |
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static inline void mpic_msgr_set_destination(struct mpic_msgr *msgr, |
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u32 cpu_num) |
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{ |
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out_be32(msgr->base, 1 << get_hard_smp_processor_id(cpu_num)); |
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} |
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/* Get the IRQ number for the message register |
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* @msgr: the message register whose IRQ is to be returned |
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* |
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* Returns the IRQ number associated with the given message register. |
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* 0 is returned if this message register is not capable of receiving |
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* interrupts. What message register can and cannot receive interrupts is |
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* specified in the device tree for the system. |
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*/ |
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static inline int mpic_msgr_get_irq(struct mpic_msgr *msgr) |
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{ |
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return msgr->irq; |
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} |
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#endif
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