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35 lines
812 B
35 lines
812 B
/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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/* |
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* Copyright 2009 Freescale Semiconductor, Inc. |
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* |
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* Cache SRAM handling for QorIQ platform |
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* |
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* Author: Vivek Mahajan <[email protected]> |
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* This file is derived from the original work done |
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* by Sylvain Munaut for the Bestcomm SRAM allocator. |
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*/ |
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#ifndef __ASM_POWERPC_FSL_85XX_CACHE_SRAM_H__ |
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#define __ASM_POWERPC_FSL_85XX_CACHE_SRAM_H__ |
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#include <asm/rheap.h> |
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#include <linux/spinlock.h> |
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/* |
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* Cache-SRAM |
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*/ |
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struct mpc85xx_cache_sram { |
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phys_addr_t base_phys; |
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void *base_virt; |
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unsigned int size; |
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rh_info_t *rh; |
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spinlock_t lock; |
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}; |
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extern void mpc85xx_cache_sram_free(void *ptr); |
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extern void *mpc85xx_cache_sram_alloc(unsigned int size, |
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phys_addr_t *phys, unsigned int align); |
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#endif /* __AMS_POWERPC_FSL_85XX_CACHE_SRAM_H__ */
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