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340 lines
6.9 KiB
340 lines
6.9 KiB
/* |
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* Copyright (C) 2014 Stefan Kristiansson <[email protected]> |
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* Copyright (C) 2017 Stafford Horne <[email protected]> |
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* |
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* Based on arm64 and arc implementations |
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* Copyright (C) 2013 ARM Ltd. |
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) |
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* |
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* This file is licensed under the terms of the GNU General Public License |
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* version 2. This program is licensed "as is" without any warranty of any |
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* kind, whether express or implied. |
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*/ |
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#include <linux/smp.h> |
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#include <linux/cpu.h> |
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#include <linux/sched.h> |
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#include <linux/sched/mm.h> |
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#include <linux/irq.h> |
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#include <linux/of.h> |
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#include <asm/cpuinfo.h> |
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#include <asm/mmu_context.h> |
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#include <asm/tlbflush.h> |
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#include <asm/cacheflush.h> |
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#include <asm/time.h> |
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static void (*smp_cross_call)(const struct cpumask *, unsigned int); |
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unsigned long secondary_release = -1; |
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struct thread_info *secondary_thread_info; |
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enum ipi_msg_type { |
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IPI_WAKEUP, |
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IPI_RESCHEDULE, |
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IPI_CALL_FUNC, |
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IPI_CALL_FUNC_SINGLE, |
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}; |
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static DEFINE_SPINLOCK(boot_lock); |
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static void boot_secondary(unsigned int cpu, struct task_struct *idle) |
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{ |
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/* |
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* set synchronisation state between this boot processor |
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* and the secondary one |
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*/ |
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spin_lock(&boot_lock); |
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secondary_release = cpu; |
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smp_cross_call(cpumask_of(cpu), IPI_WAKEUP); |
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/* |
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* now the secondary core is starting up let it run its |
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* calibrations, then wait for it to finish |
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*/ |
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spin_unlock(&boot_lock); |
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} |
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void __init smp_prepare_boot_cpu(void) |
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{ |
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} |
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void __init smp_init_cpus(void) |
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{ |
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struct device_node *cpu; |
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u32 cpu_id; |
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for_each_of_cpu_node(cpu) { |
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if (of_property_read_u32(cpu, "reg", &cpu_id)) { |
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pr_warn("%s missing reg property", cpu->full_name); |
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continue; |
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} |
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if (cpu_id < NR_CPUS) |
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set_cpu_possible(cpu_id, true); |
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} |
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} |
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void __init smp_prepare_cpus(unsigned int max_cpus) |
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{ |
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unsigned int cpu; |
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/* |
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* Initialise the present map, which describes the set of CPUs |
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* actually populated at the present time. |
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*/ |
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for_each_possible_cpu(cpu) { |
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if (cpu < max_cpus) |
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set_cpu_present(cpu, true); |
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} |
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} |
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void __init smp_cpus_done(unsigned int max_cpus) |
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{ |
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} |
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static DECLARE_COMPLETION(cpu_running); |
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int __cpu_up(unsigned int cpu, struct task_struct *idle) |
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{ |
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if (smp_cross_call == NULL) { |
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pr_warn("CPU%u: failed to start, IPI controller missing", |
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cpu); |
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return -EIO; |
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} |
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secondary_thread_info = task_thread_info(idle); |
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current_pgd[cpu] = init_mm.pgd; |
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boot_secondary(cpu, idle); |
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if (!wait_for_completion_timeout(&cpu_running, |
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msecs_to_jiffies(1000))) { |
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pr_crit("CPU%u: failed to start\n", cpu); |
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return -EIO; |
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} |
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synchronise_count_master(cpu); |
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return 0; |
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} |
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asmlinkage __init void secondary_start_kernel(void) |
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{ |
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struct mm_struct *mm = &init_mm; |
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unsigned int cpu = smp_processor_id(); |
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/* |
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* All kernel threads share the same mm context; grab a |
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* reference and switch to it. |
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*/ |
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mmgrab(mm); |
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current->active_mm = mm; |
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cpumask_set_cpu(cpu, mm_cpumask(mm)); |
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pr_info("CPU%u: Booted secondary processor\n", cpu); |
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setup_cpuinfo(); |
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openrisc_clockevent_init(); |
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notify_cpu_starting(cpu); |
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/* |
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* OK, now it's safe to let the boot CPU continue |
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*/ |
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complete(&cpu_running); |
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synchronise_count_slave(cpu); |
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set_cpu_online(cpu, true); |
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local_irq_enable(); |
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preempt_disable(); |
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/* |
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* OK, it's off to the idle thread for us |
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*/ |
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cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); |
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} |
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void handle_IPI(unsigned int ipi_msg) |
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{ |
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unsigned int cpu = smp_processor_id(); |
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switch (ipi_msg) { |
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case IPI_WAKEUP: |
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break; |
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case IPI_RESCHEDULE: |
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scheduler_ipi(); |
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break; |
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case IPI_CALL_FUNC: |
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generic_smp_call_function_interrupt(); |
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break; |
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case IPI_CALL_FUNC_SINGLE: |
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generic_smp_call_function_single_interrupt(); |
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break; |
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default: |
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WARN(1, "CPU%u: Unknown IPI message 0x%x\n", cpu, ipi_msg); |
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break; |
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} |
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} |
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void smp_send_reschedule(int cpu) |
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{ |
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smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE); |
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} |
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static void stop_this_cpu(void *dummy) |
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{ |
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/* Remove this CPU */ |
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set_cpu_online(smp_processor_id(), false); |
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local_irq_disable(); |
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/* CPU Doze */ |
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if (mfspr(SPR_UPR) & SPR_UPR_PMP) |
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mtspr(SPR_PMR, mfspr(SPR_PMR) | SPR_PMR_DME); |
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/* If that didn't work, infinite loop */ |
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while (1) |
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; |
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} |
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void smp_send_stop(void) |
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{ |
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smp_call_function(stop_this_cpu, NULL, 0); |
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} |
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/* not supported, yet */ |
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int setup_profiling_timer(unsigned int multiplier) |
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{ |
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return -EINVAL; |
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} |
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void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int)) |
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{ |
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smp_cross_call = fn; |
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} |
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void arch_send_call_function_single_ipi(int cpu) |
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{ |
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smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE); |
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} |
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void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
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{ |
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smp_cross_call(mask, IPI_CALL_FUNC); |
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} |
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/* TLB flush operations - Performed on each CPU*/ |
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static inline void ipi_flush_tlb_all(void *ignored) |
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{ |
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local_flush_tlb_all(); |
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} |
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static inline void ipi_flush_tlb_mm(void *info) |
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{ |
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struct mm_struct *mm = (struct mm_struct *)info; |
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local_flush_tlb_mm(mm); |
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} |
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static void smp_flush_tlb_mm(struct cpumask *cmask, struct mm_struct *mm) |
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{ |
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unsigned int cpuid; |
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if (cpumask_empty(cmask)) |
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return; |
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cpuid = get_cpu(); |
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if (cpumask_any_but(cmask, cpuid) >= nr_cpu_ids) { |
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/* local cpu is the only cpu present in cpumask */ |
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local_flush_tlb_mm(mm); |
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} else { |
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on_each_cpu_mask(cmask, ipi_flush_tlb_mm, mm, 1); |
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} |
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put_cpu(); |
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} |
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struct flush_tlb_data { |
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unsigned long addr1; |
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unsigned long addr2; |
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}; |
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static inline void ipi_flush_tlb_page(void *info) |
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{ |
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struct flush_tlb_data *fd = (struct flush_tlb_data *)info; |
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local_flush_tlb_page(NULL, fd->addr1); |
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} |
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static inline void ipi_flush_tlb_range(void *info) |
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{ |
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struct flush_tlb_data *fd = (struct flush_tlb_data *)info; |
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local_flush_tlb_range(NULL, fd->addr1, fd->addr2); |
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} |
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static void smp_flush_tlb_range(struct cpumask *cmask, unsigned long start, |
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unsigned long end) |
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{ |
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unsigned int cpuid; |
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if (cpumask_empty(cmask)) |
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return; |
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cpuid = get_cpu(); |
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if (cpumask_any_but(cmask, cpuid) >= nr_cpu_ids) { |
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/* local cpu is the only cpu present in cpumask */ |
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if ((end - start) <= PAGE_SIZE) |
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local_flush_tlb_page(NULL, start); |
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else |
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local_flush_tlb_range(NULL, start, end); |
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} else { |
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struct flush_tlb_data fd; |
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fd.addr1 = start; |
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fd.addr2 = end; |
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if ((end - start) <= PAGE_SIZE) |
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on_each_cpu_mask(cmask, ipi_flush_tlb_page, &fd, 1); |
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else |
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on_each_cpu_mask(cmask, ipi_flush_tlb_range, &fd, 1); |
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} |
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put_cpu(); |
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} |
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void flush_tlb_all(void) |
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{ |
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on_each_cpu(ipi_flush_tlb_all, NULL, 1); |
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} |
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void flush_tlb_mm(struct mm_struct *mm) |
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{ |
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smp_flush_tlb_mm(mm_cpumask(mm), mm); |
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} |
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void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr) |
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{ |
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smp_flush_tlb_range(mm_cpumask(vma->vm_mm), uaddr, uaddr + PAGE_SIZE); |
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} |
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void flush_tlb_range(struct vm_area_struct *vma, |
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unsigned long start, unsigned long end) |
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{ |
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smp_flush_tlb_range(mm_cpumask(vma->vm_mm), start, end); |
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} |
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/* Instruction cache invalidate - performed on each cpu */ |
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static void ipi_icache_page_inv(void *arg) |
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{ |
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struct page *page = arg; |
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local_icache_page_inv(page); |
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} |
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void smp_icache_page_inv(struct page *page) |
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{ |
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on_each_cpu(ipi_icache_page_inv, page, 1); |
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} |
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EXPORT_SYMBOL(smp_icache_page_inv);
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