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57 lines
1.0 KiB
57 lines
1.0 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/dts-v1/; |
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/ { |
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compatible = "opencores,or1ksim"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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interrupt-parent = <&pic>; |
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aliases { |
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uart0 = &serial0; |
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}; |
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chosen { |
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bootargs = "earlycon"; |
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stdout-path = "uart0:115200"; |
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}; |
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memory@0 { |
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device_type = "memory"; |
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reg = <0x00000000 0x02000000>; |
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}; |
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cpus { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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cpu@0 { |
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compatible = "opencores,or1200-rtlsvn481"; |
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reg = <0>; |
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clock-frequency = <20000000>; |
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}; |
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}; |
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/* |
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* OR1K PIC is built into CPU and accessed via special purpose |
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* registers. It is not addressable and, hence, has no 'reg' |
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* property. |
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*/ |
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pic: pic { |
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compatible = "opencores,or1k-pic"; |
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#interrupt-cells = <1>; |
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interrupt-controller; |
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}; |
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serial0: serial@90000000 { |
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compatible = "opencores,uart16550-rtlsvn105", "ns16550a"; |
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reg = <0x90000000 0x100>; |
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interrupts = <2>; |
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clock-frequency = <20000000>; |
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}; |
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enet0: ethoc@92000000 { |
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compatible = "opencores,ethoc"; |
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reg = <0x92000000 0x800>; |
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interrupts = <4>; |
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big-endian; |
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}; |
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};
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