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709 lines
18 KiB
709 lines
18 KiB
/* |
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* This file is subject to the terms and conditions of the GNU General Public |
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* License. See the file "COPYING" in the main directory of this archive |
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* for more details. |
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* |
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* Unified implementation of memcpy, memmove and the __copy_user backend. |
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* |
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* Copyright (C) 1998, 99, 2000, 01, 2002 Ralf Baechle (ralf@gnu.org) |
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* Copyright (C) 1999, 2000, 01, 2002 Silicon Graphics, Inc. |
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* Copyright (C) 2002 Broadcom, Inc. |
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* memcpy/copy_user author: Mark Vandevoorde |
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* Copyright (C) 2007 Maciej W. Rozycki |
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* Copyright (C) 2014 Imagination Technologies Ltd. |
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* |
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* Mnemonic names for arguments to memcpy/__copy_user |
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*/ |
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|
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/* |
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* Hack to resolve longstanding prefetch issue |
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* |
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* Prefetching may be fatal on some systems if we're prefetching beyond the |
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* end of memory on some systems. It's also a seriously bad idea on non |
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* dma-coherent systems. |
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*/ |
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#ifdef CONFIG_DMA_NONCOHERENT |
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#undef CONFIG_CPU_HAS_PREFETCH |
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#endif |
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#ifdef CONFIG_MIPS_MALTA |
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#undef CONFIG_CPU_HAS_PREFETCH |
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#endif |
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#ifdef CONFIG_CPU_MIPSR6 |
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#undef CONFIG_CPU_HAS_PREFETCH |
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#endif |
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#include <asm/asm.h> |
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#include <asm/asm-offsets.h> |
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#include <asm/export.h> |
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#include <asm/regdef.h> |
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#define dst a0 |
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#define src a1 |
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#define len a2 |
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/* |
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* Spec |
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* |
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* memcpy copies len bytes from src to dst and sets v0 to dst. |
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* It assumes that |
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* - src and dst don't overlap |
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* - src is readable |
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* - dst is writable |
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* memcpy uses the standard calling convention |
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* |
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* __copy_user copies up to len bytes from src to dst and sets a2 (len) to |
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* the number of uncopied bytes due to an exception caused by a read or write. |
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* __copy_user assumes that src and dst don't overlap, and that the call is |
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* implementing one of the following: |
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* copy_to_user |
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* - src is readable (no exceptions when reading src) |
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* copy_from_user |
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* - dst is writable (no exceptions when writing dst) |
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* __copy_user uses a non-standard calling convention; see |
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* include/asm-mips/uaccess.h |
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* |
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* When an exception happens on a load, the handler must |
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# ensure that all of the destination buffer is overwritten to prevent |
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* leaking information to user mode programs. |
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*/ |
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|
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/* |
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* Implementation |
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*/ |
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|
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/* |
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* The exception handler for loads requires that: |
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* 1- AT contain the address of the byte just past the end of the source |
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* of the copy, |
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* 2- src_entry <= src < AT, and |
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* 3- (dst - src) == (dst_entry - src_entry), |
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* The _entry suffix denotes values when __copy_user was called. |
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* |
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* (1) is set up up by uaccess.h and maintained by not writing AT in copy_user |
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* (2) is met by incrementing src by the number of bytes copied |
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* (3) is met by not doing loads between a pair of increments of dst and src |
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* |
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* The exception handlers for stores adjust len (if necessary) and return. |
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* These handlers do not need to overwrite any data. |
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* |
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* For __rmemcpy and memmove an exception is always a kernel bug, therefore |
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* they're not protected. |
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*/ |
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|
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/* Instruction type */ |
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#define LD_INSN 1 |
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#define ST_INSN 2 |
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/* Pretech type */ |
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#define SRC_PREFETCH 1 |
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#define DST_PREFETCH 2 |
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#define LEGACY_MODE 1 |
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#define EVA_MODE 2 |
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#define USEROP 1 |
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#define KERNELOP 2 |
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/* |
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* Wrapper to add an entry in the exception table |
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* in case the insn causes a memory exception. |
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* Arguments: |
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* insn : Load/store instruction |
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* type : Instruction type |
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* reg : Register |
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* addr : Address |
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* handler : Exception handler |
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*/ |
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#define EXC(insn, type, reg, addr, handler) \ |
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.if \mode == LEGACY_MODE; \ |
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9: insn reg, addr; \ |
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.section __ex_table,"a"; \ |
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PTR 9b, handler; \ |
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.previous; \ |
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/* This is assembled in EVA mode */ \ |
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.else; \ |
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/* If loading from user or storing to user */ \ |
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.if ((\from == USEROP) && (type == LD_INSN)) || \ |
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((\to == USEROP) && (type == ST_INSN)); \ |
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9: __BUILD_EVA_INSN(insn##e, reg, addr); \ |
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.section __ex_table,"a"; \ |
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PTR 9b, handler; \ |
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.previous; \ |
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.else; \ |
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/* \ |
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* Still in EVA, but no need for \ |
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* exception handler or EVA insn \ |
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*/ \ |
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insn reg, addr; \ |
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.endif; \ |
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.endif |
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/* |
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* Only on the 64-bit kernel we can made use of 64-bit registers. |
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*/ |
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#ifdef CONFIG_64BIT |
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#define USE_DOUBLE |
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#endif |
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#ifdef USE_DOUBLE |
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#define LOADK ld /* No exception */ |
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#define LOAD(reg, addr, handler) EXC(ld, LD_INSN, reg, addr, handler) |
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#define LOADL(reg, addr, handler) EXC(ldl, LD_INSN, reg, addr, handler) |
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#define LOADR(reg, addr, handler) EXC(ldr, LD_INSN, reg, addr, handler) |
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#define STOREL(reg, addr, handler) EXC(sdl, ST_INSN, reg, addr, handler) |
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#define STORER(reg, addr, handler) EXC(sdr, ST_INSN, reg, addr, handler) |
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#define STORE(reg, addr, handler) EXC(sd, ST_INSN, reg, addr, handler) |
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#define ADD daddu |
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#define SUB dsubu |
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#define SRL dsrl |
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#define SRA dsra |
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#define SLL dsll |
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#define SLLV dsllv |
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#define SRLV dsrlv |
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#define NBYTES 8 |
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#define LOG_NBYTES 3 |
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/* |
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* As we are sharing code base with the mips32 tree (which use the o32 ABI |
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* register definitions). We need to redefine the register definitions from |
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* the n64 ABI register naming to the o32 ABI register naming. |
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*/ |
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#undef t0 |
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#undef t1 |
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#undef t2 |
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#undef t3 |
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#define t0 $8 |
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#define t1 $9 |
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#define t2 $10 |
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#define t3 $11 |
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#define t4 $12 |
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#define t5 $13 |
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#define t6 $14 |
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#define t7 $15 |
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#else |
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#define LOADK lw /* No exception */ |
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#define LOAD(reg, addr, handler) EXC(lw, LD_INSN, reg, addr, handler) |
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#define LOADL(reg, addr, handler) EXC(lwl, LD_INSN, reg, addr, handler) |
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#define LOADR(reg, addr, handler) EXC(lwr, LD_INSN, reg, addr, handler) |
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#define STOREL(reg, addr, handler) EXC(swl, ST_INSN, reg, addr, handler) |
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#define STORER(reg, addr, handler) EXC(swr, ST_INSN, reg, addr, handler) |
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#define STORE(reg, addr, handler) EXC(sw, ST_INSN, reg, addr, handler) |
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#define ADD addu |
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#define SUB subu |
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#define SRL srl |
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#define SLL sll |
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#define SRA sra |
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#define SLLV sllv |
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#define SRLV srlv |
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#define NBYTES 4 |
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#define LOG_NBYTES 2 |
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#endif /* USE_DOUBLE */ |
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#define LOADB(reg, addr, handler) EXC(lb, LD_INSN, reg, addr, handler) |
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#define STOREB(reg, addr, handler) EXC(sb, ST_INSN, reg, addr, handler) |
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#ifdef CONFIG_CPU_HAS_PREFETCH |
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# define _PREF(hint, addr, type) \ |
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.if \mode == LEGACY_MODE; \ |
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kernel_pref(hint, addr); \ |
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.else; \ |
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.if ((\from == USEROP) && (type == SRC_PREFETCH)) || \ |
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((\to == USEROP) && (type == DST_PREFETCH)); \ |
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/* \ |
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* PREFE has only 9 bits for the offset \ |
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* compared to PREF which has 16, so it may \ |
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* need to use the $at register but this \ |
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* register should remain intact because it's \ |
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* used later on. Therefore use $v1. \ |
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*/ \ |
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.set at=v1; \ |
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user_pref(hint, addr); \ |
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.set noat; \ |
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.else; \ |
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kernel_pref(hint, addr); \ |
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.endif; \ |
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.endif |
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#else |
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# define _PREF(hint, addr, type) |
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#endif |
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#define PREFS(hint, addr) _PREF(hint, addr, SRC_PREFETCH) |
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#define PREFD(hint, addr) _PREF(hint, addr, DST_PREFETCH) |
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#ifdef CONFIG_CPU_LITTLE_ENDIAN |
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#define LDFIRST LOADR |
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#define LDREST LOADL |
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#define STFIRST STORER |
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#define STREST STOREL |
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#define SHIFT_DISCARD SLLV |
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#else |
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#define LDFIRST LOADL |
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#define LDREST LOADR |
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#define STFIRST STOREL |
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#define STREST STORER |
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#define SHIFT_DISCARD SRLV |
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#endif |
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#define FIRST(unit) ((unit)*NBYTES) |
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#define REST(unit) (FIRST(unit)+NBYTES-1) |
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#define UNIT(unit) FIRST(unit) |
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#define ADDRMASK (NBYTES-1) |
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.text |
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.set noreorder |
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#ifndef CONFIG_CPU_DADDI_WORKAROUNDS |
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.set noat |
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#else |
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.set at=v1 |
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#endif |
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.align 5 |
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/* |
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* Macro to build the __copy_user common code |
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* Arguments: |
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* mode : LEGACY_MODE or EVA_MODE |
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* from : Source operand. USEROP or KERNELOP |
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* to : Destination operand. USEROP or KERNELOP |
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*/ |
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.macro __BUILD_COPY_USER mode, from, to |
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/* initialize __memcpy if this the first time we execute this macro */ |
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.ifnotdef __memcpy |
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.set __memcpy, 1 |
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.hidden __memcpy /* make sure it does not leak */ |
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.endif |
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/* |
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* Note: dst & src may be unaligned, len may be 0 |
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* Temps |
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*/ |
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#define rem t8 |
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R10KCBARRIER(0(ra)) |
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/* |
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* The "issue break"s below are very approximate. |
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* Issue delays for dcache fills will perturb the schedule, as will |
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* load queue full replay traps, etc. |
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* |
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* If len < NBYTES use byte operations. |
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*/ |
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PREFS( 0, 0(src) ) |
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PREFD( 1, 0(dst) ) |
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sltu t2, len, NBYTES |
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and t1, dst, ADDRMASK |
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PREFS( 0, 1*32(src) ) |
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PREFD( 1, 1*32(dst) ) |
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bnez t2, .Lcopy_bytes_checklen\@ |
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and t0, src, ADDRMASK |
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PREFS( 0, 2*32(src) ) |
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PREFD( 1, 2*32(dst) ) |
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#ifndef CONFIG_CPU_NO_LOAD_STORE_LR |
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bnez t1, .Ldst_unaligned\@ |
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nop |
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bnez t0, .Lsrc_unaligned_dst_aligned\@ |
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#else /* CONFIG_CPU_NO_LOAD_STORE_LR */ |
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or t0, t0, t1 |
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bnez t0, .Lcopy_unaligned_bytes\@ |
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#endif /* CONFIG_CPU_NO_LOAD_STORE_LR */ |
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/* |
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* use delay slot for fall-through |
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* src and dst are aligned; need to compute rem |
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*/ |
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.Lboth_aligned\@: |
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SRL t0, len, LOG_NBYTES+3 # +3 for 8 units/iter |
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beqz t0, .Lcleanup_both_aligned\@ # len < 8*NBYTES |
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and rem, len, (8*NBYTES-1) # rem = len % (8*NBYTES) |
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PREFS( 0, 3*32(src) ) |
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PREFD( 1, 3*32(dst) ) |
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.align 4 |
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1: |
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R10KCBARRIER(0(ra)) |
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LOAD(t0, UNIT(0)(src), .Ll_exc\@) |
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LOAD(t1, UNIT(1)(src), .Ll_exc_copy\@) |
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LOAD(t2, UNIT(2)(src), .Ll_exc_copy\@) |
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LOAD(t3, UNIT(3)(src), .Ll_exc_copy\@) |
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SUB len, len, 8*NBYTES |
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LOAD(t4, UNIT(4)(src), .Ll_exc_copy\@) |
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LOAD(t7, UNIT(5)(src), .Ll_exc_copy\@) |
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STORE(t0, UNIT(0)(dst), .Ls_exc_p8u\@) |
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STORE(t1, UNIT(1)(dst), .Ls_exc_p7u\@) |
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LOAD(t0, UNIT(6)(src), .Ll_exc_copy\@) |
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LOAD(t1, UNIT(7)(src), .Ll_exc_copy\@) |
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ADD src, src, 8*NBYTES |
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ADD dst, dst, 8*NBYTES |
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STORE(t2, UNIT(-6)(dst), .Ls_exc_p6u\@) |
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STORE(t3, UNIT(-5)(dst), .Ls_exc_p5u\@) |
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STORE(t4, UNIT(-4)(dst), .Ls_exc_p4u\@) |
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STORE(t7, UNIT(-3)(dst), .Ls_exc_p3u\@) |
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STORE(t0, UNIT(-2)(dst), .Ls_exc_p2u\@) |
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STORE(t1, UNIT(-1)(dst), .Ls_exc_p1u\@) |
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PREFS( 0, 8*32(src) ) |
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PREFD( 1, 8*32(dst) ) |
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bne len, rem, 1b |
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nop |
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/* |
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* len == rem == the number of bytes left to copy < 8*NBYTES |
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*/ |
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.Lcleanup_both_aligned\@: |
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beqz len, .Ldone\@ |
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sltu t0, len, 4*NBYTES |
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bnez t0, .Lless_than_4units\@ |
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and rem, len, (NBYTES-1) # rem = len % NBYTES |
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/* |
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* len >= 4*NBYTES |
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*/ |
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LOAD( t0, UNIT(0)(src), .Ll_exc\@) |
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LOAD( t1, UNIT(1)(src), .Ll_exc_copy\@) |
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LOAD( t2, UNIT(2)(src), .Ll_exc_copy\@) |
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LOAD( t3, UNIT(3)(src), .Ll_exc_copy\@) |
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SUB len, len, 4*NBYTES |
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ADD src, src, 4*NBYTES |
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R10KCBARRIER(0(ra)) |
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STORE(t0, UNIT(0)(dst), .Ls_exc_p4u\@) |
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STORE(t1, UNIT(1)(dst), .Ls_exc_p3u\@) |
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STORE(t2, UNIT(2)(dst), .Ls_exc_p2u\@) |
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STORE(t3, UNIT(3)(dst), .Ls_exc_p1u\@) |
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.set reorder /* DADDI_WAR */ |
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ADD dst, dst, 4*NBYTES |
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beqz len, .Ldone\@ |
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.set noreorder |
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.Lless_than_4units\@: |
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/* |
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* rem = len % NBYTES |
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*/ |
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beq rem, len, .Lcopy_bytes\@ |
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nop |
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1: |
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R10KCBARRIER(0(ra)) |
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LOAD(t0, 0(src), .Ll_exc\@) |
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ADD src, src, NBYTES |
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SUB len, len, NBYTES |
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STORE(t0, 0(dst), .Ls_exc_p1u\@) |
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.set reorder /* DADDI_WAR */ |
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ADD dst, dst, NBYTES |
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bne rem, len, 1b |
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.set noreorder |
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#ifndef CONFIG_CPU_NO_LOAD_STORE_LR |
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/* |
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* src and dst are aligned, need to copy rem bytes (rem < NBYTES) |
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* A loop would do only a byte at a time with possible branch |
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* mispredicts. Can't do an explicit LOAD dst,mask,or,STORE |
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* because can't assume read-access to dst. Instead, use |
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* STREST dst, which doesn't require read access to dst. |
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* |
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* This code should perform better than a simple loop on modern, |
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* wide-issue mips processors because the code has fewer branches and |
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* more instruction-level parallelism. |
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*/ |
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#define bits t2 |
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beqz len, .Ldone\@ |
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ADD t1, dst, len # t1 is just past last byte of dst |
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li bits, 8*NBYTES |
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SLL rem, len, 3 # rem = number of bits to keep |
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LOAD(t0, 0(src), .Ll_exc\@) |
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SUB bits, bits, rem # bits = number of bits to discard |
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SHIFT_DISCARD t0, t0, bits |
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STREST(t0, -1(t1), .Ls_exc\@) |
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jr ra |
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move len, zero |
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.Ldst_unaligned\@: |
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/* |
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* dst is unaligned |
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* t0 = src & ADDRMASK |
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* t1 = dst & ADDRMASK; T1 > 0 |
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* len >= NBYTES |
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* |
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* Copy enough bytes to align dst |
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* Set match = (src and dst have same alignment) |
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*/ |
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#define match rem |
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LDFIRST(t3, FIRST(0)(src), .Ll_exc\@) |
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ADD t2, zero, NBYTES |
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LDREST(t3, REST(0)(src), .Ll_exc_copy\@) |
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SUB t2, t2, t1 # t2 = number of bytes copied |
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xor match, t0, t1 |
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R10KCBARRIER(0(ra)) |
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STFIRST(t3, FIRST(0)(dst), .Ls_exc\@) |
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beq len, t2, .Ldone\@ |
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SUB len, len, t2 |
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ADD dst, dst, t2 |
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beqz match, .Lboth_aligned\@ |
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ADD src, src, t2 |
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|
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.Lsrc_unaligned_dst_aligned\@: |
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SRL t0, len, LOG_NBYTES+2 # +2 for 4 units/iter |
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PREFS( 0, 3*32(src) ) |
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beqz t0, .Lcleanup_src_unaligned\@ |
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and rem, len, (4*NBYTES-1) # rem = len % 4*NBYTES |
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PREFD( 1, 3*32(dst) ) |
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1: |
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/* |
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* Avoid consecutive LD*'s to the same register since some mips |
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* implementations can't issue them in the same cycle. |
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* It's OK to load FIRST(N+1) before REST(N) because the two addresses |
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* are to the same unit (unless src is aligned, but it's not). |
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*/ |
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R10KCBARRIER(0(ra)) |
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LDFIRST(t0, FIRST(0)(src), .Ll_exc\@) |
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LDFIRST(t1, FIRST(1)(src), .Ll_exc_copy\@) |
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SUB len, len, 4*NBYTES |
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LDREST(t0, REST(0)(src), .Ll_exc_copy\@) |
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LDREST(t1, REST(1)(src), .Ll_exc_copy\@) |
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LDFIRST(t2, FIRST(2)(src), .Ll_exc_copy\@) |
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LDFIRST(t3, FIRST(3)(src), .Ll_exc_copy\@) |
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LDREST(t2, REST(2)(src), .Ll_exc_copy\@) |
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LDREST(t3, REST(3)(src), .Ll_exc_copy\@) |
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PREFS( 0, 9*32(src) ) # 0 is PREF_LOAD (not streamed) |
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ADD src, src, 4*NBYTES |
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#ifdef CONFIG_CPU_SB1 |
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nop # improves slotting |
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#endif |
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STORE(t0, UNIT(0)(dst), .Ls_exc_p4u\@) |
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STORE(t1, UNIT(1)(dst), .Ls_exc_p3u\@) |
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STORE(t2, UNIT(2)(dst), .Ls_exc_p2u\@) |
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STORE(t3, UNIT(3)(dst), .Ls_exc_p1u\@) |
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PREFD( 1, 9*32(dst) ) # 1 is PREF_STORE (not streamed) |
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.set reorder /* DADDI_WAR */ |
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ADD dst, dst, 4*NBYTES |
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bne len, rem, 1b |
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.set noreorder |
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|
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.Lcleanup_src_unaligned\@: |
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beqz len, .Ldone\@ |
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and rem, len, NBYTES-1 # rem = len % NBYTES |
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beq rem, len, .Lcopy_bytes\@ |
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nop |
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1: |
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R10KCBARRIER(0(ra)) |
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LDFIRST(t0, FIRST(0)(src), .Ll_exc\@) |
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LDREST(t0, REST(0)(src), .Ll_exc_copy\@) |
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ADD src, src, NBYTES |
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SUB len, len, NBYTES |
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STORE(t0, 0(dst), .Ls_exc_p1u\@) |
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.set reorder /* DADDI_WAR */ |
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ADD dst, dst, NBYTES |
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bne len, rem, 1b |
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.set noreorder |
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|
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#endif /* !CONFIG_CPU_NO_LOAD_STORE_LR */ |
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.Lcopy_bytes_checklen\@: |
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beqz len, .Ldone\@ |
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nop |
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.Lcopy_bytes\@: |
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/* 0 < len < NBYTES */ |
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R10KCBARRIER(0(ra)) |
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#define COPY_BYTE(N) \ |
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LOADB(t0, N(src), .Ll_exc\@); \ |
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SUB len, len, 1; \ |
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beqz len, .Ldone\@; \ |
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STOREB(t0, N(dst), .Ls_exc_p1\@) |
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|
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COPY_BYTE(0) |
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COPY_BYTE(1) |
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#ifdef USE_DOUBLE |
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COPY_BYTE(2) |
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COPY_BYTE(3) |
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COPY_BYTE(4) |
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COPY_BYTE(5) |
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#endif |
|
LOADB(t0, NBYTES-2(src), .Ll_exc\@) |
|
SUB len, len, 1 |
|
jr ra |
|
STOREB(t0, NBYTES-2(dst), .Ls_exc_p1\@) |
|
.Ldone\@: |
|
jr ra |
|
nop |
|
|
|
#ifdef CONFIG_CPU_NO_LOAD_STORE_LR |
|
.Lcopy_unaligned_bytes\@: |
|
1: |
|
COPY_BYTE(0) |
|
COPY_BYTE(1) |
|
COPY_BYTE(2) |
|
COPY_BYTE(3) |
|
COPY_BYTE(4) |
|
COPY_BYTE(5) |
|
COPY_BYTE(6) |
|
COPY_BYTE(7) |
|
ADD src, src, 8 |
|
b 1b |
|
ADD dst, dst, 8 |
|
#endif /* CONFIG_CPU_NO_LOAD_STORE_LR */ |
|
.if __memcpy == 1 |
|
END(memcpy) |
|
.set __memcpy, 0 |
|
.hidden __memcpy |
|
.endif |
|
|
|
.Ll_exc_copy\@: |
|
/* |
|
* Copy bytes from src until faulting load address (or until a |
|
* lb faults) |
|
* |
|
* When reached by a faulting LDFIRST/LDREST, THREAD_BUADDR($28) |
|
* may be more than a byte beyond the last address. |
|
* Hence, the lb below may get an exception. |
|
* |
|
* Assumes src < THREAD_BUADDR($28) |
|
*/ |
|
LOADK t0, TI_TASK($28) |
|
nop |
|
LOADK t0, THREAD_BUADDR(t0) |
|
1: |
|
LOADB(t1, 0(src), .Ll_exc\@) |
|
ADD src, src, 1 |
|
sb t1, 0(dst) # can't fault -- we're copy_from_user |
|
.set reorder /* DADDI_WAR */ |
|
ADD dst, dst, 1 |
|
bne src, t0, 1b |
|
.set noreorder |
|
.Ll_exc\@: |
|
LOADK t0, TI_TASK($28) |
|
nop |
|
LOADK t0, THREAD_BUADDR(t0) # t0 is just past last good address |
|
nop |
|
SUB len, AT, t0 # len number of uncopied bytes |
|
jr ra |
|
nop |
|
|
|
#define SEXC(n) \ |
|
.set reorder; /* DADDI_WAR */ \ |
|
.Ls_exc_p ## n ## u\@: \ |
|
ADD len, len, n*NBYTES; \ |
|
jr ra; \ |
|
.set noreorder |
|
|
|
SEXC(8) |
|
SEXC(7) |
|
SEXC(6) |
|
SEXC(5) |
|
SEXC(4) |
|
SEXC(3) |
|
SEXC(2) |
|
SEXC(1) |
|
|
|
.Ls_exc_p1\@: |
|
.set reorder /* DADDI_WAR */ |
|
ADD len, len, 1 |
|
jr ra |
|
.set noreorder |
|
.Ls_exc\@: |
|
jr ra |
|
nop |
|
.endm |
|
|
|
#ifndef CONFIG_HAVE_PLAT_MEMCPY |
|
.align 5 |
|
LEAF(memmove) |
|
EXPORT_SYMBOL(memmove) |
|
ADD t0, a0, a2 |
|
ADD t1, a1, a2 |
|
sltu t0, a1, t0 # dst + len <= src -> memcpy |
|
sltu t1, a0, t1 # dst >= src + len -> memcpy |
|
and t0, t1 |
|
beqz t0, .L__memcpy |
|
move v0, a0 /* return value */ |
|
beqz a2, .Lr_out |
|
END(memmove) |
|
|
|
/* fall through to __rmemcpy */ |
|
LEAF(__rmemcpy) /* a0=dst a1=src a2=len */ |
|
sltu t0, a1, a0 |
|
beqz t0, .Lr_end_bytes_up # src >= dst |
|
nop |
|
ADD a0, a2 # dst = dst + len |
|
ADD a1, a2 # src = src + len |
|
|
|
.Lr_end_bytes: |
|
R10KCBARRIER(0(ra)) |
|
lb t0, -1(a1) |
|
SUB a2, a2, 0x1 |
|
sb t0, -1(a0) |
|
SUB a1, a1, 0x1 |
|
.set reorder /* DADDI_WAR */ |
|
SUB a0, a0, 0x1 |
|
bnez a2, .Lr_end_bytes |
|
.set noreorder |
|
|
|
.Lr_out: |
|
jr ra |
|
move a2, zero |
|
|
|
.Lr_end_bytes_up: |
|
R10KCBARRIER(0(ra)) |
|
lb t0, (a1) |
|
SUB a2, a2, 0x1 |
|
sb t0, (a0) |
|
ADD a1, a1, 0x1 |
|
.set reorder /* DADDI_WAR */ |
|
ADD a0, a0, 0x1 |
|
bnez a2, .Lr_end_bytes_up |
|
.set noreorder |
|
|
|
jr ra |
|
move a2, zero |
|
END(__rmemcpy) |
|
|
|
/* |
|
* A combined memcpy/__copy_user |
|
* __copy_user sets len to 0 for success; else to an upper bound of |
|
* the number of uncopied bytes. |
|
* memcpy sets v0 to dst. |
|
*/ |
|
.align 5 |
|
LEAF(memcpy) /* a0=dst a1=src a2=len */ |
|
EXPORT_SYMBOL(memcpy) |
|
move v0, dst /* return value */ |
|
.L__memcpy: |
|
FEXPORT(__copy_user) |
|
EXPORT_SYMBOL(__copy_user) |
|
/* Legacy Mode, user <-> user */ |
|
__BUILD_COPY_USER LEGACY_MODE USEROP USEROP |
|
|
|
#endif |
|
|
|
#ifdef CONFIG_EVA |
|
|
|
/* |
|
* For EVA we need distinct symbols for reading and writing to user space. |
|
* This is because we need to use specific EVA instructions to perform the |
|
* virtual <-> physical translation when a virtual address is actually in user |
|
* space |
|
*/ |
|
|
|
/* |
|
* __copy_from_user (EVA) |
|
*/ |
|
|
|
LEAF(__copy_from_user_eva) |
|
EXPORT_SYMBOL(__copy_from_user_eva) |
|
__BUILD_COPY_USER EVA_MODE USEROP KERNELOP |
|
END(__copy_from_user_eva) |
|
|
|
|
|
|
|
/* |
|
* __copy_to_user (EVA) |
|
*/ |
|
|
|
LEAF(__copy_to_user_eva) |
|
EXPORT_SYMBOL(__copy_to_user_eva) |
|
__BUILD_COPY_USER EVA_MODE KERNELOP USEROP |
|
END(__copy_to_user_eva) |
|
|
|
/* |
|
* __copy_in_user (EVA) |
|
*/ |
|
|
|
LEAF(__copy_in_user_eva) |
|
EXPORT_SYMBOL(__copy_in_user_eva) |
|
__BUILD_COPY_USER EVA_MODE USEROP USEROP |
|
END(__copy_in_user_eva) |
|
|
|
#endif
|
|
|