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118 lines
2.7 KiB
118 lines
2.7 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* GT641xx IRQ routines. |
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* |
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* Copyright (C) 2007 Yoichi Yuasa <[email protected]> |
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*/ |
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#include <linux/hardirq.h> |
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#include <linux/init.h> |
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#include <linux/irq.h> |
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#include <linux/spinlock.h> |
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#include <linux/types.h> |
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#include <asm/gt64120.h> |
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#define GT641XX_IRQ_TO_BIT(irq) (1U << (irq - GT641XX_IRQ_BASE)) |
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static DEFINE_RAW_SPINLOCK(gt641xx_irq_lock); |
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static void ack_gt641xx_irq(struct irq_data *d) |
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{ |
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unsigned long flags; |
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u32 cause; |
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raw_spin_lock_irqsave(>641xx_irq_lock, flags); |
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cause = GT_READ(GT_INTRCAUSE_OFS); |
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cause &= ~GT641XX_IRQ_TO_BIT(d->irq); |
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GT_WRITE(GT_INTRCAUSE_OFS, cause); |
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raw_spin_unlock_irqrestore(>641xx_irq_lock, flags); |
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} |
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static void mask_gt641xx_irq(struct irq_data *d) |
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{ |
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unsigned long flags; |
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u32 mask; |
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raw_spin_lock_irqsave(>641xx_irq_lock, flags); |
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mask = GT_READ(GT_INTRMASK_OFS); |
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mask &= ~GT641XX_IRQ_TO_BIT(d->irq); |
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GT_WRITE(GT_INTRMASK_OFS, mask); |
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raw_spin_unlock_irqrestore(>641xx_irq_lock, flags); |
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} |
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static void mask_ack_gt641xx_irq(struct irq_data *d) |
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{ |
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unsigned long flags; |
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u32 cause, mask; |
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raw_spin_lock_irqsave(>641xx_irq_lock, flags); |
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mask = GT_READ(GT_INTRMASK_OFS); |
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mask &= ~GT641XX_IRQ_TO_BIT(d->irq); |
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GT_WRITE(GT_INTRMASK_OFS, mask); |
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cause = GT_READ(GT_INTRCAUSE_OFS); |
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cause &= ~GT641XX_IRQ_TO_BIT(d->irq); |
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GT_WRITE(GT_INTRCAUSE_OFS, cause); |
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raw_spin_unlock_irqrestore(>641xx_irq_lock, flags); |
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} |
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static void unmask_gt641xx_irq(struct irq_data *d) |
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{ |
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unsigned long flags; |
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u32 mask; |
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raw_spin_lock_irqsave(>641xx_irq_lock, flags); |
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mask = GT_READ(GT_INTRMASK_OFS); |
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mask |= GT641XX_IRQ_TO_BIT(d->irq); |
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GT_WRITE(GT_INTRMASK_OFS, mask); |
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raw_spin_unlock_irqrestore(>641xx_irq_lock, flags); |
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} |
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static struct irq_chip gt641xx_irq_chip = { |
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.name = "GT641xx", |
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.irq_ack = ack_gt641xx_irq, |
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.irq_mask = mask_gt641xx_irq, |
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.irq_mask_ack = mask_ack_gt641xx_irq, |
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.irq_unmask = unmask_gt641xx_irq, |
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}; |
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void gt641xx_irq_dispatch(void) |
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{ |
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u32 cause, mask; |
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int i; |
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cause = GT_READ(GT_INTRCAUSE_OFS); |
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mask = GT_READ(GT_INTRMASK_OFS); |
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cause &= mask; |
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/* |
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* bit0 : logical or of all the interrupt bits. |
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* bit30: logical or of bits[29:26,20:1]. |
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* bit31: logical or of bits[25:1]. |
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*/ |
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for (i = 1; i < 30; i++) { |
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if (cause & (1U << i)) { |
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do_IRQ(GT641XX_IRQ_BASE + i); |
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return; |
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} |
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} |
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atomic_inc(&irq_err_count); |
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} |
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void __init gt641xx_irq_init(void) |
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{ |
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int i; |
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GT_WRITE(GT_INTRMASK_OFS, 0); |
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GT_WRITE(GT_INTRCAUSE_OFS, 0); |
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/* |
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* bit0 : logical or of all the interrupt bits. |
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* bit30: logical or of bits[29:26,20:1]. |
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* bit31: logical or of bits[25:1]. |
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*/ |
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for (i = 1; i < 30; i++) |
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irq_set_chip_and_handler(GT641XX_IRQ_BASE + i, |
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>641xx_irq_chip, handle_level_irq); |
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}
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