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246 lines
8.9 KiB
246 lines
8.9 KiB
/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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/* ********************************************************************* |
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* SB1250 Board Support Package |
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* |
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* Global constants and macros File: sb1250_defs.h |
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* |
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* This file contains macros and definitions used by the other |
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* include files. |
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* |
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* SB1250 specification level: User's manual 1/02/02 |
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* |
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********************************************************************* |
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* |
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* Copyright 2000,2001,2002,2003 |
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* Broadcom Corporation. All rights reserved. |
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* |
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********************************************************************* */ |
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#ifndef _SB1250_DEFS_H |
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#define _SB1250_DEFS_H |
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/* |
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* These headers require ANSI C89 string concatenation, and GCC or other |
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* 'long long' (64-bit integer) support. |
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*/ |
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#if !defined(__STDC__) && !defined(_MSC_VER) |
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#error SiByte headers require ANSI C89 support |
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#endif |
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/* ********************************************************************* |
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* Macros for feature tests, used to enable include file features |
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* for chip features only present in certain chip revisions. |
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* |
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* SIBYTE_HDR_FEATURES may be defined to be the mask value chip/revision |
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* which is to be exposed by the headers. If undefined, it defaults to |
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* "all features." |
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* |
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* Use like: |
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* |
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* #define SIBYTE_HDR_FEATURES SIBYTE_HDR_FMASK_112x_PASS1 |
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* |
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* Generate defines only for that revision of chip. |
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* |
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* #if SIBYTE_HDR_FEATURE(chip,pass) |
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* |
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* True if header features for that revision or later of |
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* that particular chip type are enabled in SIBYTE_HDR_FEATURES. |
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* (Use this to bracket #defines for features present in a given |
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* revision and later.) |
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* |
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* Note that there is no implied ordering between chip types. |
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* |
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* Note also that 'chip' and 'pass' must textually exactly |
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* match the defines below. So, for example, |
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* SIBYTE_HDR_FEATURE(112x, PASS1) is OK, but |
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* SIBYTE_HDR_FEATURE(1120, pass1) is not (for two reasons). |
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* |
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* #if SIBYTE_HDR_FEATURE_UP_TO(chip,pass) |
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* |
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* Same as SIBYTE_HDR_FEATURE, but true for the named revision |
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* and earlier revisions of the named chip type. |
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* |
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* #if SIBYTE_HDR_FEATURE_EXACT(chip,pass) |
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* |
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* Same as SIBYTE_HDR_FEATURE, but only true for the named |
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* revision of the named chip type. (Note that this CANNOT |
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* be used to verify that you're compiling only for that |
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* particular chip/revision. It will be true any time this |
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* chip/revision is included in SIBYTE_HDR_FEATURES.) |
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* |
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* #if SIBYTE_HDR_FEATURE_CHIP(chip) |
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* |
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* True if header features for (any revision of) that chip type |
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* are enabled in SIBYTE_HDR_FEATURES. (Use this to bracket |
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* #defines for features specific to a given chip type.) |
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* |
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* Mask values currently include room for additional revisions of each |
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* chip type, but can be renumbered at will. Note that they MUST fit |
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* into 31 bits and may not include C type constructs, for safe use in |
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* CPP conditionals. Bit positions within chip types DO indicate |
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* ordering, so be careful when adding support for new minor revs. |
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********************************************************************* */ |
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#define SIBYTE_HDR_FMASK_1250_ALL 0x000000ff |
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#define SIBYTE_HDR_FMASK_1250_PASS1 0x00000001 |
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#define SIBYTE_HDR_FMASK_1250_PASS2 0x00000002 |
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#define SIBYTE_HDR_FMASK_1250_PASS3 0x00000004 |
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#define SIBYTE_HDR_FMASK_112x_ALL 0x00000f00 |
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#define SIBYTE_HDR_FMASK_112x_PASS1 0x00000100 |
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#define SIBYTE_HDR_FMASK_1480_ALL 0x0000f000 |
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#define SIBYTE_HDR_FMASK_1480_PASS1 0x00001000 |
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#define SIBYTE_HDR_FMASK_1480_PASS2 0x00002000 |
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/* Bit mask for chip/revision. (use _ALL for all revisions of a chip). */ |
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#define SIBYTE_HDR_FMASK(chip, pass) \ |
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(SIBYTE_HDR_FMASK_ ## chip ## _ ## pass) |
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#define SIBYTE_HDR_FMASK_ALLREVS(chip) \ |
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(SIBYTE_HDR_FMASK_ ## chip ## _ALL) |
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/* Default constant value for all chips, all revisions */ |
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#define SIBYTE_HDR_FMASK_ALL \ |
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(SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL \ |
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| SIBYTE_HDR_FMASK_1480_ALL) |
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/* This one is used for the "original" BCM1250/BCM112x chips. We use this |
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to weed out constants and macros that do not exist on later chips like |
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the BCM1480 */ |
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#define SIBYTE_HDR_FMASK_1250_112x_ALL \ |
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(SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL) |
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#define SIBYTE_HDR_FMASK_1250_112x SIBYTE_HDR_FMASK_1250_112x_ALL |
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#ifndef SIBYTE_HDR_FEATURES |
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#define SIBYTE_HDR_FEATURES SIBYTE_HDR_FMASK_ALL |
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#endif |
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/* Bit mask for revisions of chip exclusively before the named revision. */ |
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#define SIBYTE_HDR_FMASK_BEFORE(chip, pass) \ |
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((SIBYTE_HDR_FMASK(chip, pass) - 1) & SIBYTE_HDR_FMASK_ALLREVS(chip)) |
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/* Bit mask for revisions of chip exclusively after the named revision. */ |
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#define SIBYTE_HDR_FMASK_AFTER(chip, pass) \ |
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(~(SIBYTE_HDR_FMASK(chip, pass) \ |
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| (SIBYTE_HDR_FMASK(chip, pass) - 1)) & SIBYTE_HDR_FMASK_ALLREVS(chip)) |
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/* True if header features enabled for (any revision of) that chip type. */ |
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#define SIBYTE_HDR_FEATURE_CHIP(chip) \ |
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(!! (SIBYTE_HDR_FMASK_ALLREVS(chip) & SIBYTE_HDR_FEATURES)) |
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/* True for all versions of the BCM1250 and BCM1125, but not true for |
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anything else */ |
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#define SIBYTE_HDR_FEATURE_1250_112x \ |
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(SIBYTE_HDR_FEATURE_CHIP(1250) || SIBYTE_HDR_FEATURE_CHIP(112x)) |
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/* (!! (SIBYTE_HDR_FEATURES & SIBYHTE_HDR_FMASK_1250_112x)) */ |
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/* True if header features enabled for that rev or later, inclusive. */ |
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#define SIBYTE_HDR_FEATURE(chip, pass) \ |
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(!! ((SIBYTE_HDR_FMASK(chip, pass) \ |
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| SIBYTE_HDR_FMASK_AFTER(chip, pass)) & SIBYTE_HDR_FEATURES)) |
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/* True if header features enabled for exactly that rev. */ |
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#define SIBYTE_HDR_FEATURE_EXACT(chip, pass) \ |
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(!! (SIBYTE_HDR_FMASK(chip, pass) & SIBYTE_HDR_FEATURES)) |
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/* True if header features enabled for that rev or before, inclusive. */ |
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#define SIBYTE_HDR_FEATURE_UP_TO(chip, pass) \ |
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(!! ((SIBYTE_HDR_FMASK(chip, pass) \ |
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| SIBYTE_HDR_FMASK_BEFORE(chip, pass)) & SIBYTE_HDR_FEATURES)) |
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/* ********************************************************************* |
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* Naming schemes for constants in these files: |
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* |
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* M_xxx MASK constant (identifies bits in a register). |
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* For multi-bit fields, all bits in the field will |
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* be set. |
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* |
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* K_xxx "Code" constant (value for data in a multi-bit |
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* field). The value is right justified. |
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* |
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* V_xxx "Value" constant. This is the same as the |
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* corresponding "K_xxx" constant, except it is |
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* shifted to the correct position in the register. |
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* |
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* S_xxx SHIFT constant. This is the number of bits that |
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* a field value (code) needs to be shifted |
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* (towards the left) to put the value in the right |
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* position for the register. |
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* |
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* A_xxx ADDRESS constant. This will be a physical |
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* address. Use the PHYS_TO_K1 macro to generate |
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* a K1SEG address. |
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* |
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* R_xxx RELATIVE offset constant. This is an offset from |
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* an A_xxx constant (usually the first register in |
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* a group). |
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* |
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* G_xxx(X) GET value. This macro obtains a multi-bit field |
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* from a register, masks it, and shifts it to |
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* the bottom of the register (retrieving a K_xxx |
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* value, for example). |
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* |
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* V_xxx(X) VALUE. This macro computes the value of a |
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* K_xxx constant shifted to the correct position |
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* in the register. |
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********************************************************************* */ |
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/* |
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* Cast to 64-bit number. Presumably the syntax is different in |
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* assembly language. |
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* |
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* Note: you'll need to define uint32_t and uint64_t in your headers. |
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*/ |
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#if !defined(__ASSEMBLY__) |
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#define _SB_MAKE64(x) ((uint64_t)(x)) |
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#define _SB_MAKE32(x) ((uint32_t)(x)) |
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#else |
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#define _SB_MAKE64(x) (x) |
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#define _SB_MAKE32(x) (x) |
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#endif |
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/* |
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* Make a mask for 1 bit at position 'n' |
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*/ |
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#define _SB_MAKEMASK1(n) (_SB_MAKE64(1) << _SB_MAKE64(n)) |
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#define _SB_MAKEMASK1_32(n) (_SB_MAKE32(1) << _SB_MAKE32(n)) |
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/* |
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* Make a mask for 'v' bits at position 'n' |
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*/ |
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#define _SB_MAKEMASK(v, n) (_SB_MAKE64((_SB_MAKE64(1)<<(v))-1) << _SB_MAKE64(n)) |
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#define _SB_MAKEMASK_32(v, n) (_SB_MAKE32((_SB_MAKE32(1)<<(v))-1) << _SB_MAKE32(n)) |
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/* |
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* Make a value at 'v' at bit position 'n' |
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*/ |
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#define _SB_MAKEVALUE(v, n) (_SB_MAKE64(v) << _SB_MAKE64(n)) |
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#define _SB_MAKEVALUE_32(v, n) (_SB_MAKE32(v) << _SB_MAKE32(n)) |
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#define _SB_GETVALUE(v, n, m) ((_SB_MAKE64(v) & _SB_MAKE64(m)) >> _SB_MAKE64(n)) |
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#define _SB_GETVALUE_32(v, n, m) ((_SB_MAKE32(v) & _SB_MAKE32(m)) >> _SB_MAKE32(n)) |
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/* |
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* Macros to read/write on-chip registers |
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* XXX should we do the PHYS_TO_K1 here? |
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*/ |
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#if defined(__mips64) && !defined(__ASSEMBLY__) |
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#define SBWRITECSR(csr, val) *((volatile uint64_t *) PHYS_TO_K1(csr)) = (val) |
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#define SBREADCSR(csr) (*((volatile uint64_t *) PHYS_TO_K1(csr))) |
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#endif /* __ASSEMBLY__ */ |
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#endif
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