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453 lines
11 KiB
453 lines
11 KiB
/* |
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* arch/m68k/mvme16x/config.c |
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* |
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* Copyright (C) 1995 Richard Hirst [[email protected]] |
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* |
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* Based on: |
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* |
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* linux/amiga/config.c |
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* |
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* Copyright (C) 1993 Hamish Macdonald |
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* |
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* This file is subject to the terms and conditions of the GNU General Public |
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* License. See the file README.legal in the main directory of this archive |
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* for more details. |
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*/ |
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#include <linux/types.h> |
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#include <linux/kernel.h> |
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#include <linux/mm.h> |
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#include <linux/seq_file.h> |
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#include <linux/tty.h> |
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#include <linux/clocksource.h> |
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#include <linux/console.h> |
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#include <linux/linkage.h> |
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#include <linux/init.h> |
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#include <linux/major.h> |
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#include <linux/genhd.h> |
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#include <linux/rtc.h> |
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#include <linux/interrupt.h> |
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#include <linux/module.h> |
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#include <asm/bootinfo.h> |
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#include <asm/bootinfo-vme.h> |
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#include <asm/byteorder.h> |
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#include <asm/setup.h> |
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#include <asm/irq.h> |
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#include <asm/traps.h> |
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#include <asm/machdep.h> |
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#include <asm/mvme16xhw.h> |
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extern t_bdid mvme_bdid; |
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static MK48T08ptr_t volatile rtc = (MK48T08ptr_t)MVME_RTC_BASE; |
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static void mvme16x_get_model(char *model); |
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extern void mvme16x_sched_init(void); |
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extern int mvme16x_hwclk (int, struct rtc_time *); |
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extern void mvme16x_reset (void); |
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int bcd2int (unsigned char b); |
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unsigned short mvme16x_config; |
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EXPORT_SYMBOL(mvme16x_config); |
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int __init mvme16x_parse_bootinfo(const struct bi_record *bi) |
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{ |
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uint16_t tag = be16_to_cpu(bi->tag); |
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if (tag == BI_VME_TYPE || tag == BI_VME_BRDINFO) |
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return 0; |
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else |
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return 1; |
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} |
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void mvme16x_reset(void) |
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{ |
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pr_info("\r\n\nCalled mvme16x_reset\r\n" |
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"\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r"); |
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/* The string of returns is to delay the reset until the whole |
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* message is output. Assert reset bit in GCSR */ |
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*(volatile char *)0xfff40107 = 0x80; |
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} |
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static void mvme16x_get_model(char *model) |
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{ |
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p_bdid p = &mvme_bdid; |
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char suf[4]; |
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suf[1] = p->brdsuffix[0]; |
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suf[2] = p->brdsuffix[1]; |
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suf[3] = '\0'; |
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suf[0] = suf[1] ? '-' : '\0'; |
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sprintf(model, "Motorola MVME%x%s", be16_to_cpu(p->brdno), suf); |
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} |
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static void mvme16x_get_hardware_list(struct seq_file *m) |
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{ |
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uint16_t brdno = be16_to_cpu(mvme_bdid.brdno); |
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if (brdno == 0x0162 || brdno == 0x0172) |
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{ |
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unsigned char rev = *(unsigned char *)MVME162_VERSION_REG; |
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seq_printf (m, "VMEchip2 %spresent\n", |
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rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : ""); |
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seq_printf (m, "SCSI interface %spresent\n", |
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rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : ""); |
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seq_printf (m, "Ethernet i/f %spresent\n", |
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rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : ""); |
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} |
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} |
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/* |
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* This function is called during kernel startup to initialize |
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* the mvme16x IRQ handling routines. Should probably ensure |
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* that the base vectors for the VMEChip2 and PCCChip2 are valid. |
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*/ |
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static void __init mvme16x_init_IRQ (void) |
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{ |
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m68k_setup_user_interrupt(VEC_USER, 192); |
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} |
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#define PCC2CHIP (0xfff42000) |
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#define PCCSCCMICR (PCC2CHIP + 0x1d) |
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#define PCCSCCTICR (PCC2CHIP + 0x1e) |
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#define PCCSCCRICR (PCC2CHIP + 0x1f) |
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#define PCCTPIACKR (PCC2CHIP + 0x25) |
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#ifdef CONFIG_EARLY_PRINTK |
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/**** cd2401 registers ****/ |
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#define CD2401_ADDR (0xfff45000) |
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#define CyGFRCR (0x81) |
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#define CyCCR (0x13) |
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#define CyCLR_CHAN (0x40) |
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#define CyINIT_CHAN (0x20) |
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#define CyCHIP_RESET (0x10) |
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#define CyENB_XMTR (0x08) |
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#define CyDIS_XMTR (0x04) |
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#define CyENB_RCVR (0x02) |
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#define CyDIS_RCVR (0x01) |
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#define CyCAR (0xee) |
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#define CyIER (0x11) |
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#define CyMdmCh (0x80) |
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#define CyRxExc (0x20) |
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#define CyRxData (0x08) |
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#define CyTxMpty (0x02) |
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#define CyTxRdy (0x01) |
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#define CyLICR (0x26) |
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#define CyRISR (0x89) |
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#define CyTIMEOUT (0x80) |
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#define CySPECHAR (0x70) |
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#define CyOVERRUN (0x08) |
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#define CyPARITY (0x04) |
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#define CyFRAME (0x02) |
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#define CyBREAK (0x01) |
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#define CyREOIR (0x84) |
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#define CyTEOIR (0x85) |
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#define CyMEOIR (0x86) |
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#define CyNOTRANS (0x08) |
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#define CyRFOC (0x30) |
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#define CyRDR (0xf8) |
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#define CyTDR (0xf8) |
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#define CyMISR (0x8b) |
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#define CyRISR (0x89) |
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#define CyTISR (0x8a) |
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#define CyMSVR1 (0xde) |
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#define CyMSVR2 (0xdf) |
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#define CyDSR (0x80) |
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#define CyDCD (0x40) |
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#define CyCTS (0x20) |
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#define CyDTR (0x02) |
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#define CyRTS (0x01) |
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#define CyRTPRL (0x25) |
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#define CyRTPRH (0x24) |
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#define CyCOR1 (0x10) |
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#define CyPARITY_NONE (0x00) |
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#define CyPARITY_E (0x40) |
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#define CyPARITY_O (0xC0) |
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#define Cy_5_BITS (0x04) |
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#define Cy_6_BITS (0x05) |
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#define Cy_7_BITS (0x06) |
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#define Cy_8_BITS (0x07) |
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#define CyCOR2 (0x17) |
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#define CyETC (0x20) |
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#define CyCtsAE (0x02) |
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#define CyCOR3 (0x16) |
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#define Cy_1_STOP (0x02) |
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#define Cy_2_STOP (0x04) |
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#define CyCOR4 (0x15) |
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#define CyREC_FIFO (0x0F) /* Receive FIFO threshold */ |
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#define CyCOR5 (0x14) |
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#define CyCOR6 (0x18) |
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#define CyCOR7 (0x07) |
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#define CyRBPR (0xcb) |
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#define CyRCOR (0xc8) |
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#define CyTBPR (0xc3) |
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#define CyTCOR (0xc0) |
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#define CySCHR1 (0x1f) |
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#define CySCHR2 (0x1e) |
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#define CyTPR (0xda) |
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#define CyPILR1 (0xe3) |
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#define CyPILR2 (0xe0) |
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#define CyPILR3 (0xe1) |
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#define CyCMR (0x1b) |
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#define CyASYNC (0x02) |
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#define CyLICR (0x26) |
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#define CyLIVR (0x09) |
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#define CySCRL (0x23) |
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#define CySCRH (0x22) |
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#define CyTFTC (0x80) |
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void mvme16x_cons_write(struct console *co, const char *str, unsigned count) |
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{ |
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volatile unsigned char *base_addr = (u_char *)CD2401_ADDR; |
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volatile u_char sink; |
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u_char ier; |
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int port; |
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u_char do_lf = 0; |
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int i = 0; |
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/* Ensure transmitter is enabled! */ |
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port = 0; |
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base_addr[CyCAR] = (u_char)port; |
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while (base_addr[CyCCR]) |
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; |
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base_addr[CyCCR] = CyENB_XMTR; |
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ier = base_addr[CyIER]; |
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base_addr[CyIER] = CyTxMpty; |
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while (1) { |
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if (in_8(PCCSCCTICR) & 0x20) |
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{ |
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/* We have a Tx int. Acknowledge it */ |
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sink = in_8(PCCTPIACKR); |
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if ((base_addr[CyLICR] >> 2) == port) { |
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if (i == count) { |
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/* Last char of string is now output */ |
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base_addr[CyTEOIR] = CyNOTRANS; |
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break; |
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} |
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if (do_lf) { |
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base_addr[CyTDR] = '\n'; |
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str++; |
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i++; |
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do_lf = 0; |
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} |
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else if (*str == '\n') { |
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base_addr[CyTDR] = '\r'; |
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do_lf = 1; |
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} |
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else { |
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base_addr[CyTDR] = *str++; |
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i++; |
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} |
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base_addr[CyTEOIR] = 0; |
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} |
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else |
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base_addr[CyTEOIR] = CyNOTRANS; |
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} |
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} |
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base_addr[CyIER] = ier; |
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} |
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#endif |
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void __init config_mvme16x(void) |
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{ |
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p_bdid p = &mvme_bdid; |
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char id[40]; |
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uint16_t brdno = be16_to_cpu(p->brdno); |
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mach_sched_init = mvme16x_sched_init; |
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mach_init_IRQ = mvme16x_init_IRQ; |
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mach_hwclk = mvme16x_hwclk; |
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mach_reset = mvme16x_reset; |
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mach_get_model = mvme16x_get_model; |
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mach_get_hardware_list = mvme16x_get_hardware_list; |
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/* Report board revision */ |
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if (strncmp("BDID", p->bdid, 4)) |
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{ |
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pr_crit("Bug call .BRD_ID returned garbage - giving up\n"); |
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while (1) |
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; |
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} |
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/* Board type is only set by newer versions of vmelilo/tftplilo */ |
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if (vme_brdtype == 0) |
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vme_brdtype = brdno; |
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mvme16x_get_model(id); |
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pr_info("BRD_ID: %s BUG %x.%x %02x/%02x/%02x\n", id, p->rev >> 4, |
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p->rev & 0xf, p->yr, p->mth, p->day); |
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if (brdno == 0x0162 || brdno == 0x172) |
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{ |
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unsigned char rev = *(unsigned char *)MVME162_VERSION_REG; |
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mvme16x_config = rev | MVME16x_CONFIG_GOT_SCCA; |
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pr_info("MVME%x Hardware status:\n", brdno); |
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pr_info(" CPU Type 68%s040\n", |
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rev & MVME16x_CONFIG_GOT_FPU ? "" : "LC"); |
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pr_info(" CPU clock %dMHz\n", |
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rev & MVME16x_CONFIG_SPEED_32 ? 32 : 25); |
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pr_info(" VMEchip2 %spresent\n", |
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rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : ""); |
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pr_info(" SCSI interface %spresent\n", |
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rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : ""); |
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pr_info(" Ethernet interface %spresent\n", |
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rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : ""); |
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} |
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else |
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{ |
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mvme16x_config = MVME16x_CONFIG_GOT_LP | MVME16x_CONFIG_GOT_CD2401; |
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} |
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} |
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static irqreturn_t mvme16x_abort_int (int irq, void *dev_id) |
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{ |
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unsigned long *new = (unsigned long *)vectors; |
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unsigned long *old = (unsigned long *)0xffe00000; |
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volatile unsigned char uc, *ucp; |
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uint16_t brdno = be16_to_cpu(mvme_bdid.brdno); |
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if (brdno == 0x0162 || brdno == 0x172) |
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{ |
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ucp = (volatile unsigned char *)0xfff42043; |
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uc = *ucp | 8; |
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*ucp = uc; |
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} |
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else |
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{ |
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*(volatile unsigned long *)0xfff40074 = 0x40000000; |
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} |
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*(new+4) = *(old+4); /* Illegal instruction */ |
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*(new+9) = *(old+9); /* Trace */ |
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*(new+47) = *(old+47); /* Trap #15 */ |
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if (brdno == 0x0162 || brdno == 0x172) |
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*(new+0x5e) = *(old+0x5e); /* ABORT switch */ |
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else |
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*(new+0x6e) = *(old+0x6e); /* ABORT switch */ |
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return IRQ_HANDLED; |
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} |
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static u64 mvme16x_read_clk(struct clocksource *cs); |
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static struct clocksource mvme16x_clk = { |
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.name = "pcc", |
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.rating = 250, |
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.read = mvme16x_read_clk, |
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.mask = CLOCKSOURCE_MASK(32), |
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.flags = CLOCK_SOURCE_IS_CONTINUOUS, |
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}; |
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static u32 clk_total; |
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#define PCC_TIMER_CLOCK_FREQ 1000000 |
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#define PCC_TIMER_CYCLES (PCC_TIMER_CLOCK_FREQ / HZ) |
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#define PCCTCMP1 (PCC2CHIP + 0x04) |
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#define PCCTCNT1 (PCC2CHIP + 0x08) |
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#define PCCTOVR1 (PCC2CHIP + 0x17) |
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#define PCCTIC1 (PCC2CHIP + 0x1b) |
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#define PCCTOVR1_TIC_EN 0x01 |
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#define PCCTOVR1_COC_EN 0x02 |
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#define PCCTOVR1_OVR_CLR 0x04 |
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#define PCCTIC1_INT_LEVEL 6 |
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#define PCCTIC1_INT_CLR 0x08 |
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#define PCCTIC1_INT_EN 0x10 |
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static irqreturn_t mvme16x_timer_int (int irq, void *dev_id) |
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{ |
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unsigned long flags; |
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local_irq_save(flags); |
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out_8(PCCTOVR1, PCCTOVR1_OVR_CLR | PCCTOVR1_TIC_EN | PCCTOVR1_COC_EN); |
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out_8(PCCTIC1, PCCTIC1_INT_EN | PCCTIC1_INT_CLR | PCCTIC1_INT_LEVEL); |
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clk_total += PCC_TIMER_CYCLES; |
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legacy_timer_tick(1); |
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local_irq_restore(flags); |
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return IRQ_HANDLED; |
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} |
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void mvme16x_sched_init(void) |
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{ |
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uint16_t brdno = be16_to_cpu(mvme_bdid.brdno); |
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int irq; |
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/* Using PCCchip2 or MC2 chip tick timer 1 */ |
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if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, IRQF_TIMER, "timer", |
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NULL)) |
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panic ("Couldn't register timer int"); |
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out_be32(PCCTCNT1, 0); |
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out_be32(PCCTCMP1, PCC_TIMER_CYCLES); |
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out_8(PCCTOVR1, PCCTOVR1_OVR_CLR | PCCTOVR1_TIC_EN | PCCTOVR1_COC_EN); |
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out_8(PCCTIC1, PCCTIC1_INT_EN | PCCTIC1_INT_CLR | PCCTIC1_INT_LEVEL); |
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clocksource_register_hz(&mvme16x_clk, PCC_TIMER_CLOCK_FREQ); |
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if (brdno == 0x0162 || brdno == 0x172) |
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irq = MVME162_IRQ_ABORT; |
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else |
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irq = MVME167_IRQ_ABORT; |
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if (request_irq(irq, mvme16x_abort_int, 0, |
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"abort", mvme16x_abort_int)) |
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panic ("Couldn't register abort int"); |
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} |
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static u64 mvme16x_read_clk(struct clocksource *cs) |
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{ |
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unsigned long flags; |
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u8 overflow, tmp; |
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u32 ticks; |
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local_irq_save(flags); |
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tmp = in_8(PCCTOVR1) >> 4; |
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ticks = in_be32(PCCTCNT1); |
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overflow = in_8(PCCTOVR1) >> 4; |
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if (overflow != tmp) |
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ticks = in_be32(PCCTCNT1); |
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ticks += overflow * PCC_TIMER_CYCLES; |
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ticks += clk_total; |
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local_irq_restore(flags); |
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return ticks; |
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} |
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int bcd2int (unsigned char b) |
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{ |
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return ((b>>4)*10 + (b&15)); |
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} |
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int mvme16x_hwclk(int op, struct rtc_time *t) |
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{ |
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#warning check me! |
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if (!op) { |
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rtc->ctrl = RTC_READ; |
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t->tm_year = bcd2int (rtc->bcd_year); |
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t->tm_mon = bcd2int(rtc->bcd_mth) - 1; |
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t->tm_mday = bcd2int (rtc->bcd_dom); |
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t->tm_hour = bcd2int (rtc->bcd_hr); |
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t->tm_min = bcd2int (rtc->bcd_min); |
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t->tm_sec = bcd2int (rtc->bcd_sec); |
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rtc->ctrl = 0; |
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if (t->tm_year < 70) |
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t->tm_year += 100; |
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} |
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return 0; |
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}
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