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165 lines
3.3 KiB
165 lines
3.3 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/***************************************************************************/ |
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/* |
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* clk.c -- general ColdFire CPU kernel clk handling |
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* |
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* Copyright (C) 2009, Greg Ungerer ([email protected]) |
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*/ |
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/***************************************************************************/ |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/platform_device.h> |
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#include <linux/mutex.h> |
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#include <linux/clk.h> |
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#include <linux/io.h> |
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#include <linux/err.h> |
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#include <asm/coldfire.h> |
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#include <asm/mcfsim.h> |
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#include <asm/mcfclk.h> |
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static DEFINE_SPINLOCK(clk_lock); |
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#ifdef MCFPM_PPMCR0 |
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/* |
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* For more advanced ColdFire parts that have clocks that can be enabled |
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* we supply enable/disable functions. These must properly define their |
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* clocks in their platform specific code. |
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*/ |
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void __clk_init_enabled(struct clk *clk) |
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{ |
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clk->enabled = 1; |
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clk->clk_ops->enable(clk); |
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} |
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void __clk_init_disabled(struct clk *clk) |
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{ |
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clk->enabled = 0; |
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clk->clk_ops->disable(clk); |
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} |
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static void __clk_enable0(struct clk *clk) |
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{ |
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__raw_writeb(clk->slot, MCFPM_PPMCR0); |
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} |
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static void __clk_disable0(struct clk *clk) |
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{ |
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__raw_writeb(clk->slot, MCFPM_PPMSR0); |
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} |
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struct clk_ops clk_ops0 = { |
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.enable = __clk_enable0, |
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.disable = __clk_disable0, |
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}; |
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#ifdef MCFPM_PPMCR1 |
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static void __clk_enable1(struct clk *clk) |
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{ |
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__raw_writeb(clk->slot, MCFPM_PPMCR1); |
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} |
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static void __clk_disable1(struct clk *clk) |
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{ |
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__raw_writeb(clk->slot, MCFPM_PPMSR1); |
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} |
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struct clk_ops clk_ops1 = { |
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.enable = __clk_enable1, |
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.disable = __clk_disable1, |
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}; |
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#endif /* MCFPM_PPMCR1 */ |
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#endif /* MCFPM_PPMCR0 */ |
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struct clk *clk_get(struct device *dev, const char *id) |
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{ |
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const char *clk_name = dev ? dev_name(dev) : id ? id : NULL; |
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struct clk *clk; |
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unsigned i; |
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for (i = 0; (clk = mcf_clks[i]) != NULL; ++i) |
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if (!strcmp(clk->name, clk_name)) |
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return clk; |
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pr_warn("clk_get: didn't find clock %s\n", clk_name); |
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return ERR_PTR(-ENOENT); |
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} |
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EXPORT_SYMBOL(clk_get); |
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int clk_enable(struct clk *clk) |
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{ |
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unsigned long flags; |
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if (!clk) |
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return -EINVAL; |
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spin_lock_irqsave(&clk_lock, flags); |
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if ((clk->enabled++ == 0) && clk->clk_ops) |
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clk->clk_ops->enable(clk); |
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spin_unlock_irqrestore(&clk_lock, flags); |
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return 0; |
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} |
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EXPORT_SYMBOL(clk_enable); |
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void clk_disable(struct clk *clk) |
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{ |
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unsigned long flags; |
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if (!clk) |
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return; |
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spin_lock_irqsave(&clk_lock, flags); |
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if ((--clk->enabled == 0) && clk->clk_ops) |
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clk->clk_ops->disable(clk); |
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spin_unlock_irqrestore(&clk_lock, flags); |
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} |
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EXPORT_SYMBOL(clk_disable); |
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void clk_put(struct clk *clk) |
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{ |
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if (clk->enabled != 0) |
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pr_warn("clk_put %s still enabled\n", clk->name); |
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} |
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EXPORT_SYMBOL(clk_put); |
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unsigned long clk_get_rate(struct clk *clk) |
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{ |
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if (!clk) |
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return 0; |
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return clk->rate; |
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} |
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EXPORT_SYMBOL(clk_get_rate); |
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/* dummy functions, should not be called */ |
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long clk_round_rate(struct clk *clk, unsigned long rate) |
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{ |
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WARN_ON(clk); |
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return 0; |
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} |
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EXPORT_SYMBOL(clk_round_rate); |
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int clk_set_rate(struct clk *clk, unsigned long rate) |
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{ |
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WARN_ON(clk); |
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return 0; |
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} |
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EXPORT_SYMBOL(clk_set_rate); |
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int clk_set_parent(struct clk *clk, struct clk *parent) |
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{ |
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WARN_ON(clk); |
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return 0; |
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} |
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EXPORT_SYMBOL(clk_set_parent); |
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struct clk *clk_get_parent(struct clk *clk) |
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{ |
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WARN_ON(clk); |
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return NULL; |
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} |
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EXPORT_SYMBOL(clk_get_parent); |
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/***************************************************************************/
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