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365 lines
9.1 KiB
365 lines
9.1 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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/* Optimized version of the standard memset() function. |
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Copyright (c) 2002 Hewlett-Packard Co/CERN |
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Sverre Jarp <Sverre.Jarp@cern.ch> |
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Return: dest |
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Inputs: |
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in0: dest |
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in1: value |
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in2: count |
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The algorithm is fairly straightforward: set byte by byte until we |
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we get to a 16B-aligned address, then loop on 128 B chunks using an |
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early store as prefetching, then loop on 32B chucks, then clear remaining |
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words, finally clear remaining bytes. |
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Since a stf.spill f0 can store 16B in one go, we use this instruction |
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to get peak speed when value = 0. */ |
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#include <asm/asmmacro.h> |
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#include <asm/export.h> |
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#undef ret |
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#define dest in0 |
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#define value in1 |
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#define cnt in2 |
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#define tmp r31 |
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#define save_lc r30 |
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#define ptr0 r29 |
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#define ptr1 r28 |
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#define ptr2 r27 |
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#define ptr3 r26 |
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#define ptr9 r24 |
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#define loopcnt r23 |
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#define linecnt r22 |
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#define bytecnt r21 |
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#define fvalue f6 |
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// This routine uses only scratch predicate registers (p6 - p15) |
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#define p_scr p6 // default register for same-cycle branches |
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#define p_nz p7 |
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#define p_zr p8 |
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#define p_unalgn p9 |
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#define p_y p11 |
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#define p_n p12 |
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#define p_yy p13 |
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#define p_nn p14 |
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#define MIN1 15 |
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#define MIN1P1HALF 8 |
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#define LINE_SIZE 128 |
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#define LSIZE_SH 7 // shift amount |
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#define PREF_AHEAD 8 |
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GLOBAL_ENTRY(memset) |
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{ .mmi |
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.prologue |
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alloc tmp = ar.pfs, 3, 0, 0, 0 |
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lfetch.nt1 [dest] // |
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.save ar.lc, save_lc |
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mov.i save_lc = ar.lc |
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.body |
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} { .mmi |
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mov ret0 = dest // return value |
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cmp.ne p_nz, p_zr = value, r0 // use stf.spill if value is zero |
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cmp.eq p_scr, p0 = cnt, r0 |
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;; } |
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{ .mmi |
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and ptr2 = -(MIN1+1), dest // aligned address |
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and tmp = MIN1, dest // prepare to check for correct alignment |
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tbit.nz p_y, p_n = dest, 0 // Do we have an odd address? (M_B_U) |
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} { .mib |
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mov ptr1 = dest |
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mux1 value = value, @brcst // create 8 identical bytes in word |
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(p_scr) br.ret.dpnt.many rp // return immediately if count = 0 |
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;; } |
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{ .mib |
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cmp.ne p_unalgn, p0 = tmp, r0 // |
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} { .mib |
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sub bytecnt = (MIN1+1), tmp // NB: # of bytes to move is 1 higher than loopcnt |
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cmp.gt p_scr, p0 = 16, cnt // is it a minimalistic task? |
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(p_scr) br.cond.dptk.many .move_bytes_unaligned // go move just a few (M_B_U) |
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;; } |
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{ .mmi |
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(p_unalgn) add ptr1 = (MIN1+1), ptr2 // after alignment |
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(p_unalgn) add ptr2 = MIN1P1HALF, ptr2 // after alignment |
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(p_unalgn) tbit.nz.unc p_y, p_n = bytecnt, 3 // should we do a st8 ? |
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;; } |
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{ .mib |
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(p_y) add cnt = -8, cnt // |
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(p_unalgn) tbit.nz.unc p_yy, p_nn = bytecnt, 2 // should we do a st4 ? |
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} { .mib |
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(p_y) st8 [ptr2] = value,-4 // |
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(p_n) add ptr2 = 4, ptr2 // |
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;; } |
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{ .mib |
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(p_yy) add cnt = -4, cnt // |
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(p_unalgn) tbit.nz.unc p_y, p_n = bytecnt, 1 // should we do a st2 ? |
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} { .mib |
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(p_yy) st4 [ptr2] = value,-2 // |
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(p_nn) add ptr2 = 2, ptr2 // |
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;; } |
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{ .mmi |
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mov tmp = LINE_SIZE+1 // for compare |
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(p_y) add cnt = -2, cnt // |
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(p_unalgn) tbit.nz.unc p_yy, p_nn = bytecnt, 0 // should we do a st1 ? |
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} { .mmi |
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setf.sig fvalue=value // transfer value to FLP side |
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(p_y) st2 [ptr2] = value,-1 // |
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(p_n) add ptr2 = 1, ptr2 // |
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;; } |
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{ .mmi |
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(p_yy) st1 [ptr2] = value // |
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cmp.gt p_scr, p0 = tmp, cnt // is it a minimalistic task? |
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} { .mbb |
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(p_yy) add cnt = -1, cnt // |
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(p_scr) br.cond.dpnt.many .fraction_of_line // go move just a few |
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;; } |
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{ .mib |
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nop.m 0 |
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shr.u linecnt = cnt, LSIZE_SH |
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(p_zr) br.cond.dptk.many .l1b // Jump to use stf.spill |
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;; } |
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TEXT_ALIGN(32) // --------------------- // L1A: store ahead into cache lines; fill later |
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{ .mmi |
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and tmp = -(LINE_SIZE), cnt // compute end of range |
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mov ptr9 = ptr1 // used for prefetching |
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and cnt = (LINE_SIZE-1), cnt // remainder |
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} { .mmi |
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mov loopcnt = PREF_AHEAD-1 // default prefetch loop |
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cmp.gt p_scr, p0 = PREF_AHEAD, linecnt // check against actual value |
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;; } |
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{ .mmi |
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(p_scr) add loopcnt = -1, linecnt // |
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add ptr2 = 8, ptr1 // start of stores (beyond prefetch stores) |
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add ptr1 = tmp, ptr1 // first address beyond total range |
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;; } |
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{ .mmi |
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add tmp = -1, linecnt // next loop count |
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mov.i ar.lc = loopcnt // |
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;; } |
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.pref_l1a: |
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{ .mib |
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stf8 [ptr9] = fvalue, 128 // Do stores one cache line apart |
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nop.i 0 |
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br.cloop.dptk.few .pref_l1a |
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;; } |
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{ .mmi |
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add ptr0 = 16, ptr2 // Two stores in parallel |
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mov.i ar.lc = tmp // |
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;; } |
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.l1ax: |
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{ .mmi |
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stf8 [ptr2] = fvalue, 8 |
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stf8 [ptr0] = fvalue, 8 |
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;; } |
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{ .mmi |
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stf8 [ptr2] = fvalue, 24 |
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stf8 [ptr0] = fvalue, 24 |
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;; } |
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{ .mmi |
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stf8 [ptr2] = fvalue, 8 |
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stf8 [ptr0] = fvalue, 8 |
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;; } |
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{ .mmi |
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stf8 [ptr2] = fvalue, 24 |
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stf8 [ptr0] = fvalue, 24 |
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;; } |
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{ .mmi |
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stf8 [ptr2] = fvalue, 8 |
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stf8 [ptr0] = fvalue, 8 |
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;; } |
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{ .mmi |
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stf8 [ptr2] = fvalue, 24 |
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stf8 [ptr0] = fvalue, 24 |
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;; } |
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{ .mmi |
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stf8 [ptr2] = fvalue, 8 |
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stf8 [ptr0] = fvalue, 32 |
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cmp.lt p_scr, p0 = ptr9, ptr1 // do we need more prefetching? |
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;; } |
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{ .mmb |
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stf8 [ptr2] = fvalue, 24 |
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(p_scr) stf8 [ptr9] = fvalue, 128 |
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br.cloop.dptk.few .l1ax |
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;; } |
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{ .mbb |
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cmp.le p_scr, p0 = 8, cnt // just a few bytes left ? |
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(p_scr) br.cond.dpnt.many .fraction_of_line // Branch no. 2 |
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br.cond.dpnt.many .move_bytes_from_alignment // Branch no. 3 |
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;; } |
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TEXT_ALIGN(32) |
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.l1b: // ------------------------------------ // L1B: store ahead into cache lines; fill later |
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{ .mmi |
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and tmp = -(LINE_SIZE), cnt // compute end of range |
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mov ptr9 = ptr1 // used for prefetching |
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and cnt = (LINE_SIZE-1), cnt // remainder |
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} { .mmi |
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mov loopcnt = PREF_AHEAD-1 // default prefetch loop |
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cmp.gt p_scr, p0 = PREF_AHEAD, linecnt // check against actual value |
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;; } |
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{ .mmi |
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(p_scr) add loopcnt = -1, linecnt |
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add ptr2 = 16, ptr1 // start of stores (beyond prefetch stores) |
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add ptr1 = tmp, ptr1 // first address beyond total range |
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;; } |
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{ .mmi |
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add tmp = -1, linecnt // next loop count |
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mov.i ar.lc = loopcnt |
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;; } |
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.pref_l1b: |
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{ .mib |
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stf.spill [ptr9] = f0, 128 // Do stores one cache line apart |
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nop.i 0 |
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br.cloop.dptk.few .pref_l1b |
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;; } |
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{ .mmi |
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add ptr0 = 16, ptr2 // Two stores in parallel |
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mov.i ar.lc = tmp |
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;; } |
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.l1bx: |
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{ .mmi |
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stf.spill [ptr2] = f0, 32 |
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stf.spill [ptr0] = f0, 32 |
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;; } |
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{ .mmi |
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stf.spill [ptr2] = f0, 32 |
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stf.spill [ptr0] = f0, 32 |
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;; } |
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{ .mmi |
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stf.spill [ptr2] = f0, 32 |
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stf.spill [ptr0] = f0, 64 |
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cmp.lt p_scr, p0 = ptr9, ptr1 // do we need more prefetching? |
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;; } |
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{ .mmb |
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stf.spill [ptr2] = f0, 32 |
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(p_scr) stf.spill [ptr9] = f0, 128 |
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br.cloop.dptk.few .l1bx |
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;; } |
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{ .mib |
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cmp.gt p_scr, p0 = 8, cnt // just a few bytes left ? |
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(p_scr) br.cond.dpnt.many .move_bytes_from_alignment // |
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;; } |
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.fraction_of_line: |
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{ .mib |
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add ptr2 = 16, ptr1 |
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shr.u loopcnt = cnt, 5 // loopcnt = cnt / 32 |
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;; } |
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{ .mib |
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cmp.eq p_scr, p0 = loopcnt, r0 |
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add loopcnt = -1, loopcnt |
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(p_scr) br.cond.dpnt.many .store_words |
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;; } |
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{ .mib |
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and cnt = 0x1f, cnt // compute the remaining cnt |
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mov.i ar.lc = loopcnt |
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;; } |
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TEXT_ALIGN(32) |
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.l2: // ------------------------------------ // L2A: store 32B in 2 cycles |
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{ .mmb |
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stf8 [ptr1] = fvalue, 8 |
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stf8 [ptr2] = fvalue, 8 |
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;; } { .mmb |
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stf8 [ptr1] = fvalue, 24 |
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stf8 [ptr2] = fvalue, 24 |
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br.cloop.dptk.many .l2 |
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;; } |
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.store_words: |
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{ .mib |
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cmp.gt p_scr, p0 = 8, cnt // just a few bytes left ? |
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(p_scr) br.cond.dpnt.many .move_bytes_from_alignment // Branch |
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;; } |
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{ .mmi |
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stf8 [ptr1] = fvalue, 8 // store |
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cmp.le p_y, p_n = 16, cnt |
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add cnt = -8, cnt // subtract |
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;; } |
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{ .mmi |
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(p_y) stf8 [ptr1] = fvalue, 8 // store |
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(p_y) cmp.le.unc p_yy, p_nn = 16, cnt |
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(p_y) add cnt = -8, cnt // subtract |
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;; } |
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{ .mmi // store |
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(p_yy) stf8 [ptr1] = fvalue, 8 |
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(p_yy) add cnt = -8, cnt // subtract |
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;; } |
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.move_bytes_from_alignment: |
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{ .mib |
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cmp.eq p_scr, p0 = cnt, r0 |
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tbit.nz.unc p_y, p0 = cnt, 2 // should we terminate with a st4 ? |
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(p_scr) br.cond.dpnt.few .restore_and_exit |
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;; } |
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{ .mib |
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(p_y) st4 [ptr1] = value,4 |
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tbit.nz.unc p_yy, p0 = cnt, 1 // should we terminate with a st2 ? |
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;; } |
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{ .mib |
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(p_yy) st2 [ptr1] = value,2 |
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tbit.nz.unc p_y, p0 = cnt, 0 // should we terminate with a st1 ? |
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;; } |
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{ .mib |
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(p_y) st1 [ptr1] = value |
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;; } |
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.restore_and_exit: |
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{ .mib |
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nop.m 0 |
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mov.i ar.lc = save_lc |
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br.ret.sptk.many rp |
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;; } |
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.move_bytes_unaligned: |
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{ .mmi |
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.pred.rel "mutex",p_y, p_n |
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.pred.rel "mutex",p_yy, p_nn |
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(p_n) cmp.le p_yy, p_nn = 4, cnt |
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(p_y) cmp.le p_yy, p_nn = 5, cnt |
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(p_n) add ptr2 = 2, ptr1 |
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} { .mmi |
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(p_y) add ptr2 = 3, ptr1 |
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(p_y) st1 [ptr1] = value, 1 // fill 1 (odd-aligned) byte [15, 14 (or less) left] |
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(p_y) add cnt = -1, cnt |
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;; } |
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{ .mmi |
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(p_yy) cmp.le.unc p_y, p0 = 8, cnt |
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add ptr3 = ptr1, cnt // prepare last store |
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mov.i ar.lc = save_lc |
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} { .mmi |
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(p_yy) st2 [ptr1] = value, 4 // fill 2 (aligned) bytes |
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(p_yy) st2 [ptr2] = value, 4 // fill 2 (aligned) bytes [11, 10 (o less) left] |
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(p_yy) add cnt = -4, cnt |
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;; } |
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{ .mmi |
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(p_y) cmp.le.unc p_yy, p0 = 8, cnt |
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add ptr3 = -1, ptr3 // last store |
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tbit.nz p_scr, p0 = cnt, 1 // will there be a st2 at the end ? |
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} { .mmi |
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(p_y) st2 [ptr1] = value, 4 // fill 2 (aligned) bytes |
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(p_y) st2 [ptr2] = value, 4 // fill 2 (aligned) bytes [7, 6 (or less) left] |
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(p_y) add cnt = -4, cnt |
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;; } |
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{ .mmi |
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(p_yy) st2 [ptr1] = value, 4 // fill 2 (aligned) bytes |
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(p_yy) st2 [ptr2] = value, 4 // fill 2 (aligned) bytes [3, 2 (or less) left] |
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tbit.nz p_y, p0 = cnt, 0 // will there be a st1 at the end ? |
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} { .mmi |
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(p_yy) add cnt = -4, cnt |
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;; } |
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{ .mmb |
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(p_scr) st2 [ptr1] = value // fill 2 (aligned) bytes |
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(p_y) st1 [ptr3] = value // fill last byte (using ptr3) |
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br.ret.sptk.many rp |
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} |
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END(memset) |
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EXPORT_SYMBOL(memset)
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