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136 lines
3.3 KiB
136 lines
3.3 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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#ifndef _ASM_IA64_ASMMACRO_H |
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#define _ASM_IA64_ASMMACRO_H |
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/* |
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* Copyright (C) 2000-2001, 2003-2004 Hewlett-Packard Co |
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* David Mosberger-Tang <[email protected]> |
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*/ |
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#define ENTRY(name) \ |
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.align 32; \ |
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.proc name; \ |
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name: |
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#define ENTRY_MIN_ALIGN(name) \ |
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.align 16; \ |
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.proc name; \ |
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name: |
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#define GLOBAL_ENTRY(name) \ |
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.global name; \ |
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ENTRY(name) |
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#define END(name) \ |
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.endp name |
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/* |
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* Helper macros to make unwind directives more readable: |
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*/ |
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/* prologue_gr: */ |
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#define ASM_UNW_PRLG_RP 0x8 |
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#define ASM_UNW_PRLG_PFS 0x4 |
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#define ASM_UNW_PRLG_PSP 0x2 |
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#define ASM_UNW_PRLG_PR 0x1 |
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#define ASM_UNW_PRLG_GRSAVE(ninputs) (32+(ninputs)) |
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/* |
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* Helper macros for accessing user memory. |
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* |
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* When adding any new .section/.previous entries here, make sure to |
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* also add it to the DISCARD section in arch/ia64/kernel/gate.lds.S or |
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* unpleasant things will happen. |
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*/ |
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.section "__ex_table", "a" // declare section & section attributes |
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.previous |
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# define EX(y,x...) \ |
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.xdata4 "__ex_table", 99f-., y-.; \ |
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[99:] x |
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# define EXCLR(y,x...) \ |
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.xdata4 "__ex_table", 99f-., y-.+4; \ |
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[99:] x |
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/* |
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* Tag MCA recoverable instruction ranges. |
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*/ |
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.section "__mca_table", "a" // declare section & section attributes |
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.previous |
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# define MCA_RECOVER_RANGE(y) \ |
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.xdata4 "__mca_table", y-., 99f-.; \ |
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[99:] |
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/* |
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* Mark instructions that need a load of a virtual address patched to be |
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* a load of a physical address. We use this either in critical performance |
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* path (ivt.S - TLB miss processing) or in places where it might not be |
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* safe to use a "tpa" instruction (mca_asm.S - error recovery). |
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*/ |
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.section ".data..patch.vtop", "a" // declare section & section attributes |
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.previous |
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#define LOAD_PHYSICAL(pr, reg, obj) \ |
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[1:](pr)movl reg = obj; \ |
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.xdata4 ".data..patch.vtop", 1b-. |
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/* |
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* For now, we always put in the McKinley E9 workaround. On CPUs that don't need it, |
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* we'll patch out the work-around bundles with NOPs, so their impact is minimal. |
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*/ |
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#define DO_MCKINLEY_E9_WORKAROUND |
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#ifdef DO_MCKINLEY_E9_WORKAROUND |
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.section ".data..patch.mckinley_e9", "a" |
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.previous |
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/* workaround for Itanium 2 Errata 9: */ |
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# define FSYS_RETURN \ |
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.xdata4 ".data..patch.mckinley_e9", 1f-.; \ |
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1:{ .mib; \ |
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nop.m 0; \ |
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mov r16=ar.pfs; \ |
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br.call.sptk.many b7=2f;; \ |
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}; \ |
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2:{ .mib; \ |
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nop.m 0; \ |
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mov ar.pfs=r16; \ |
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br.ret.sptk.many b6;; \ |
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} |
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#else |
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# define FSYS_RETURN br.ret.sptk.many b6 |
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#endif |
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/* |
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* If physical stack register size is different from DEF_NUM_STACK_REG, |
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* dynamically patch the kernel for correct size. |
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*/ |
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.section ".data..patch.phys_stack_reg", "a" |
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.previous |
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#define LOAD_PHYS_STACK_REG_SIZE(reg) \ |
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[1:] adds reg=IA64_NUM_PHYS_STACK_REG*8+8,r0; \ |
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.xdata4 ".data..patch.phys_stack_reg", 1b-. |
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/* |
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* Up until early 2004, use of .align within a function caused bad unwind info. |
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* TEXT_ALIGN(n) expands into ".align n" if a fixed GAS is available or into nothing |
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* otherwise. |
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*/ |
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#ifdef HAVE_WORKING_TEXT_ALIGN |
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# define TEXT_ALIGN(n) .align n |
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#else |
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# define TEXT_ALIGN(n) |
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#endif |
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#ifdef HAVE_SERIALIZE_DIRECTIVE |
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# define dv_serialize_data .serialize.data |
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# define dv_serialize_instruction .serialize.instruction |
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#else |
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# define dv_serialize_data |
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# define dv_serialize_instruction |
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#endif |
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#endif /* _ASM_IA64_ASMMACRO_H */
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