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224 lines
5.7 KiB
224 lines
5.7 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Time related functions for Hexagon architecture |
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* |
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* Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. |
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*/ |
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#include <linux/init.h> |
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#include <linux/clockchips.h> |
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#include <linux/clocksource.h> |
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#include <linux/interrupt.h> |
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#include <linux/err.h> |
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#include <linux/platform_device.h> |
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#include <linux/ioport.h> |
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#include <linux/of.h> |
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#include <linux/of_address.h> |
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#include <linux/of_irq.h> |
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#include <linux/module.h> |
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#include <asm/timer-regs.h> |
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#include <asm/hexagon_vm.h> |
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/* |
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* For the clocksource we need: |
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* pcycle frequency (600MHz) |
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* For the loops_per_jiffy we need: |
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* thread/cpu frequency (100MHz) |
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* And for the timer, we need: |
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* sleep clock rate |
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*/ |
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cycles_t pcycle_freq_mhz; |
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cycles_t thread_freq_mhz; |
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cycles_t sleep_clk_freq; |
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static struct resource rtos_timer_resources[] = { |
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{ |
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.start = RTOS_TIMER_REGS_ADDR, |
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.end = RTOS_TIMER_REGS_ADDR+PAGE_SIZE-1, |
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.flags = IORESOURCE_MEM, |
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}, |
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}; |
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static struct platform_device rtos_timer_device = { |
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.name = "rtos_timer", |
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.id = -1, |
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.num_resources = ARRAY_SIZE(rtos_timer_resources), |
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.resource = rtos_timer_resources, |
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}; |
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/* A lot of this stuff should move into a platform specific section. */ |
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struct adsp_hw_timer_struct { |
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u32 match; /* Match value */ |
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u32 count; |
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u32 enable; /* [1] - CLR_ON_MATCH_EN, [0] - EN */ |
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u32 clear; /* one-shot register that clears the count */ |
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}; |
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/* Look for "TCX0" for related constants. */ |
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static __iomem struct adsp_hw_timer_struct *rtos_timer; |
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static u64 timer_get_cycles(struct clocksource *cs) |
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{ |
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return (u64) __vmgettime(); |
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} |
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static struct clocksource hexagon_clocksource = { |
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.name = "pcycles", |
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.rating = 250, |
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.read = timer_get_cycles, |
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.mask = CLOCKSOURCE_MASK(64), |
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.flags = CLOCK_SOURCE_IS_CONTINUOUS, |
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}; |
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static int set_next_event(unsigned long delta, struct clock_event_device *evt) |
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{ |
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/* Assuming the timer will be disabled when we enter here. */ |
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iowrite32(1, &rtos_timer->clear); |
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iowrite32(0, &rtos_timer->clear); |
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iowrite32(delta, &rtos_timer->match); |
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iowrite32(1 << TIMER_ENABLE, &rtos_timer->enable); |
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return 0; |
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} |
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#ifdef CONFIG_SMP |
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/* Broadcast mechanism */ |
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static void broadcast(const struct cpumask *mask) |
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{ |
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send_ipi(mask, IPI_TIMER); |
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} |
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#endif |
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/* XXX Implement set_state_shutdown() */ |
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static struct clock_event_device hexagon_clockevent_dev = { |
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.name = "clockevent", |
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.features = CLOCK_EVT_FEAT_ONESHOT, |
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.rating = 400, |
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.irq = RTOS_TIMER_INT, |
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.set_next_event = set_next_event, |
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#ifdef CONFIG_SMP |
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.broadcast = broadcast, |
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#endif |
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}; |
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#ifdef CONFIG_SMP |
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static DEFINE_PER_CPU(struct clock_event_device, clock_events); |
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void setup_percpu_clockdev(void) |
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{ |
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int cpu = smp_processor_id(); |
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struct clock_event_device *ce_dev = &hexagon_clockevent_dev; |
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struct clock_event_device *dummy_clock_dev = |
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&per_cpu(clock_events, cpu); |
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memcpy(dummy_clock_dev, ce_dev, sizeof(*dummy_clock_dev)); |
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INIT_LIST_HEAD(&dummy_clock_dev->list); |
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dummy_clock_dev->features = CLOCK_EVT_FEAT_DUMMY; |
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dummy_clock_dev->cpumask = cpumask_of(cpu); |
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clockevents_register_device(dummy_clock_dev); |
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} |
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/* Called from smp.c for each CPU's timer ipi call */ |
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void ipi_timer(void) |
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{ |
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int cpu = smp_processor_id(); |
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struct clock_event_device *ce_dev = &per_cpu(clock_events, cpu); |
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ce_dev->event_handler(ce_dev); |
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} |
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#endif /* CONFIG_SMP */ |
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static irqreturn_t timer_interrupt(int irq, void *devid) |
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{ |
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struct clock_event_device *ce_dev = &hexagon_clockevent_dev; |
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iowrite32(0, &rtos_timer->enable); |
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ce_dev->event_handler(ce_dev); |
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return IRQ_HANDLED; |
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} |
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/* |
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* time_init_deferred - called by start_kernel to set up timer/clock source |
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* |
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* Install the IRQ handler for the clock, setup timers. |
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* This is done late, as that way, we can use ioremap(). |
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* |
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* This runs just before the delay loop is calibrated, and |
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* is used for delay calibration. |
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*/ |
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void __init time_init_deferred(void) |
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{ |
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struct resource *resource = NULL; |
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struct clock_event_device *ce_dev = &hexagon_clockevent_dev; |
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unsigned long flag = IRQF_TIMER | IRQF_TRIGGER_RISING; |
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ce_dev->cpumask = cpu_all_mask; |
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if (!resource) |
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resource = rtos_timer_device.resource; |
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/* ioremap here means this has to run later, after paging init */ |
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rtos_timer = ioremap(resource->start, resource_size(resource)); |
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if (!rtos_timer) { |
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release_mem_region(resource->start, resource_size(resource)); |
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} |
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clocksource_register_khz(&hexagon_clocksource, pcycle_freq_mhz * 1000); |
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/* Note: the sim generic RTOS clock is apparently really 18750Hz */ |
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/* |
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* Last arg is some guaranteed seconds for which the conversion will |
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* work without overflow. |
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*/ |
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clockevents_calc_mult_shift(ce_dev, sleep_clk_freq, 4); |
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ce_dev->max_delta_ns = clockevent_delta2ns(0x7fffffff, ce_dev); |
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ce_dev->max_delta_ticks = 0x7fffffff; |
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ce_dev->min_delta_ns = clockevent_delta2ns(0xf, ce_dev); |
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ce_dev->min_delta_ticks = 0xf; |
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#ifdef CONFIG_SMP |
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setup_percpu_clockdev(); |
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#endif |
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clockevents_register_device(ce_dev); |
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if (request_irq(ce_dev->irq, timer_interrupt, flag, "rtos_timer", NULL)) |
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pr_err("Failed to register rtos_timer interrupt\n"); |
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} |
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void __init time_init(void) |
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{ |
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late_time_init = time_init_deferred; |
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} |
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void __delay(unsigned long cycles) |
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{ |
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unsigned long long start = __vmgettime(); |
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while ((__vmgettime() - start) < cycles) |
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cpu_relax(); |
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} |
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EXPORT_SYMBOL(__delay); |
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/* |
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* This could become parametric or perhaps even computed at run-time, |
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* but for now we take the observed simulator jitter. |
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*/ |
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static long long fudgefactor = 350; /* Maybe lower if kernel optimized. */ |
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void __udelay(unsigned long usecs) |
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{ |
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unsigned long long start = __vmgettime(); |
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unsigned long long finish = (pcycle_freq_mhz * usecs) - fudgefactor; |
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while ((__vmgettime() - start) < finish) |
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cpu_relax(); /* not sure how this improves readability */ |
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} |
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EXPORT_SYMBOL(__udelay);
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