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44 lines
1.4 KiB
44 lines
1.4 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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#ifndef __ASM_CSKY_IO_H |
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#define __ASM_CSKY_IO_H |
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#include <linux/pgtable.h> |
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#include <linux/types.h> |
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#include <linux/version.h> |
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/* |
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* I/O memory access primitives. Reads are ordered relative to any |
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* following Normal memory access. Writes are ordered relative to any prior |
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* Normal memory access. |
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* |
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* For CACHEV1 (807, 810), store instruction could fast retire, so we need |
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* another mb() to prevent st fast retire. |
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* |
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* For CACHEV2 (860), store instruction with PAGE_ATTR_NO_BUFFERABLE won't |
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* fast retire. |
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*/ |
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#define readb(c) ({ u8 __v = readb_relaxed(c); rmb(); __v; }) |
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#define readw(c) ({ u16 __v = readw_relaxed(c); rmb(); __v; }) |
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#define readl(c) ({ u32 __v = readl_relaxed(c); rmb(); __v; }) |
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#ifdef CONFIG_CPU_HAS_CACHEV2 |
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#define writeb(v,c) ({ wmb(); writeb_relaxed((v),(c)); }) |
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#define writew(v,c) ({ wmb(); writew_relaxed((v),(c)); }) |
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#define writel(v,c) ({ wmb(); writel_relaxed((v),(c)); }) |
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#else |
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#define writeb(v,c) ({ wmb(); writeb_relaxed((v),(c)); mb(); }) |
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#define writew(v,c) ({ wmb(); writew_relaxed((v),(c)); mb(); }) |
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#define writel(v,c) ({ wmb(); writel_relaxed((v),(c)); mb(); }) |
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#endif |
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/* |
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* I/O memory mapping functions. |
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*/ |
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#define ioremap_wc(addr, size) \ |
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ioremap_prot((addr), (size), \ |
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(_PAGE_IOREMAP & ~_CACHE_MASK) | _CACHE_UNCACHED) |
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#include <asm-generic/io.h> |
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#endif /* __ASM_CSKY_IO_H */
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