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523 lines
12 KiB
523 lines
12 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Exception handling code |
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* |
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* Copyright (C) 2019 ARM Ltd. |
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*/ |
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#include <linux/context_tracking.h> |
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#include <linux/ptrace.h> |
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#include <linux/thread_info.h> |
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#include <asm/cpufeature.h> |
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#include <asm/daifflags.h> |
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#include <asm/esr.h> |
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#include <asm/exception.h> |
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#include <asm/kprobes.h> |
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#include <asm/mmu.h> |
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#include <asm/sysreg.h> |
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/* |
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* This is intended to match the logic in irqentry_enter(), handling the kernel |
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* mode transitions only. |
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*/ |
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static void noinstr enter_from_kernel_mode(struct pt_regs *regs) |
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{ |
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regs->exit_rcu = false; |
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if (!IS_ENABLED(CONFIG_TINY_RCU) && is_idle_task(current)) { |
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lockdep_hardirqs_off(CALLER_ADDR0); |
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rcu_irq_enter(); |
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trace_hardirqs_off_finish(); |
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regs->exit_rcu = true; |
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return; |
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} |
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lockdep_hardirqs_off(CALLER_ADDR0); |
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rcu_irq_enter_check_tick(); |
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trace_hardirqs_off_finish(); |
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} |
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/* |
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* This is intended to match the logic in irqentry_exit(), handling the kernel |
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* mode transitions only, and with preemption handled elsewhere. |
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*/ |
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static void noinstr exit_to_kernel_mode(struct pt_regs *regs) |
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{ |
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lockdep_assert_irqs_disabled(); |
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if (interrupts_enabled(regs)) { |
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if (regs->exit_rcu) { |
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trace_hardirqs_on_prepare(); |
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lockdep_hardirqs_on_prepare(CALLER_ADDR0); |
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rcu_irq_exit(); |
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lockdep_hardirqs_on(CALLER_ADDR0); |
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return; |
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} |
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trace_hardirqs_on(); |
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} else { |
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if (regs->exit_rcu) |
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rcu_irq_exit(); |
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} |
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} |
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void noinstr arm64_enter_nmi(struct pt_regs *regs) |
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{ |
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regs->lockdep_hardirqs = lockdep_hardirqs_enabled(); |
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__nmi_enter(); |
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lockdep_hardirqs_off(CALLER_ADDR0); |
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lockdep_hardirq_enter(); |
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rcu_nmi_enter(); |
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trace_hardirqs_off_finish(); |
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ftrace_nmi_enter(); |
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} |
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void noinstr arm64_exit_nmi(struct pt_regs *regs) |
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{ |
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bool restore = regs->lockdep_hardirqs; |
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ftrace_nmi_exit(); |
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if (restore) { |
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trace_hardirqs_on_prepare(); |
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lockdep_hardirqs_on_prepare(CALLER_ADDR0); |
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} |
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rcu_nmi_exit(); |
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lockdep_hardirq_exit(); |
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if (restore) |
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lockdep_hardirqs_on(CALLER_ADDR0); |
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__nmi_exit(); |
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} |
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asmlinkage void noinstr enter_el1_irq_or_nmi(struct pt_regs *regs) |
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{ |
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if (IS_ENABLED(CONFIG_ARM64_PSEUDO_NMI) && !interrupts_enabled(regs)) |
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arm64_enter_nmi(regs); |
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else |
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enter_from_kernel_mode(regs); |
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} |
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asmlinkage void noinstr exit_el1_irq_or_nmi(struct pt_regs *regs) |
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{ |
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if (IS_ENABLED(CONFIG_ARM64_PSEUDO_NMI) && !interrupts_enabled(regs)) |
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arm64_exit_nmi(regs); |
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else |
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exit_to_kernel_mode(regs); |
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} |
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#ifdef CONFIG_ARM64_ERRATUM_1463225 |
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static DEFINE_PER_CPU(int, __in_cortex_a76_erratum_1463225_wa); |
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static void cortex_a76_erratum_1463225_svc_handler(void) |
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{ |
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u32 reg, val; |
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if (!unlikely(test_thread_flag(TIF_SINGLESTEP))) |
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return; |
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if (!unlikely(this_cpu_has_cap(ARM64_WORKAROUND_1463225))) |
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return; |
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__this_cpu_write(__in_cortex_a76_erratum_1463225_wa, 1); |
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reg = read_sysreg(mdscr_el1); |
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val = reg | DBG_MDSCR_SS | DBG_MDSCR_KDE; |
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write_sysreg(val, mdscr_el1); |
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asm volatile("msr daifclr, #8"); |
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isb(); |
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/* We will have taken a single-step exception by this point */ |
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write_sysreg(reg, mdscr_el1); |
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__this_cpu_write(__in_cortex_a76_erratum_1463225_wa, 0); |
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} |
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static bool cortex_a76_erratum_1463225_debug_handler(struct pt_regs *regs) |
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{ |
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if (!__this_cpu_read(__in_cortex_a76_erratum_1463225_wa)) |
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return false; |
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/* |
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* We've taken a dummy step exception from the kernel to ensure |
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* that interrupts are re-enabled on the syscall path. Return back |
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* to cortex_a76_erratum_1463225_svc_handler() with debug exceptions |
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* masked so that we can safely restore the mdscr and get on with |
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* handling the syscall. |
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*/ |
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regs->pstate |= PSR_D_BIT; |
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return true; |
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} |
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#else /* CONFIG_ARM64_ERRATUM_1463225 */ |
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static void cortex_a76_erratum_1463225_svc_handler(void) { } |
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static bool cortex_a76_erratum_1463225_debug_handler(struct pt_regs *regs) |
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{ |
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return false; |
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} |
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#endif /* CONFIG_ARM64_ERRATUM_1463225 */ |
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static void noinstr el1_abort(struct pt_regs *regs, unsigned long esr) |
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{ |
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unsigned long far = read_sysreg(far_el1); |
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enter_from_kernel_mode(regs); |
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local_daif_inherit(regs); |
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do_mem_abort(far, esr, regs); |
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local_daif_mask(); |
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exit_to_kernel_mode(regs); |
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} |
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static void noinstr el1_pc(struct pt_regs *regs, unsigned long esr) |
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{ |
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unsigned long far = read_sysreg(far_el1); |
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enter_from_kernel_mode(regs); |
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local_daif_inherit(regs); |
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do_sp_pc_abort(far, esr, regs); |
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local_daif_mask(); |
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exit_to_kernel_mode(regs); |
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} |
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static void noinstr el1_undef(struct pt_regs *regs) |
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{ |
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enter_from_kernel_mode(regs); |
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local_daif_inherit(regs); |
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do_undefinstr(regs); |
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local_daif_mask(); |
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exit_to_kernel_mode(regs); |
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} |
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static void noinstr el1_inv(struct pt_regs *regs, unsigned long esr) |
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{ |
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enter_from_kernel_mode(regs); |
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local_daif_inherit(regs); |
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bad_mode(regs, 0, esr); |
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local_daif_mask(); |
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exit_to_kernel_mode(regs); |
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} |
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static void noinstr arm64_enter_el1_dbg(struct pt_regs *regs) |
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{ |
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regs->lockdep_hardirqs = lockdep_hardirqs_enabled(); |
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lockdep_hardirqs_off(CALLER_ADDR0); |
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rcu_nmi_enter(); |
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trace_hardirqs_off_finish(); |
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} |
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static void noinstr arm64_exit_el1_dbg(struct pt_regs *regs) |
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{ |
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bool restore = regs->lockdep_hardirqs; |
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if (restore) { |
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trace_hardirqs_on_prepare(); |
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lockdep_hardirqs_on_prepare(CALLER_ADDR0); |
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} |
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rcu_nmi_exit(); |
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if (restore) |
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lockdep_hardirqs_on(CALLER_ADDR0); |
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} |
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static void noinstr el1_dbg(struct pt_regs *regs, unsigned long esr) |
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{ |
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unsigned long far = read_sysreg(far_el1); |
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arm64_enter_el1_dbg(regs); |
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if (!cortex_a76_erratum_1463225_debug_handler(regs)) |
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do_debug_exception(far, esr, regs); |
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arm64_exit_el1_dbg(regs); |
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} |
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static void noinstr el1_fpac(struct pt_regs *regs, unsigned long esr) |
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{ |
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enter_from_kernel_mode(regs); |
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local_daif_inherit(regs); |
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do_ptrauth_fault(regs, esr); |
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local_daif_mask(); |
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exit_to_kernel_mode(regs); |
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} |
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asmlinkage void noinstr el1_sync_handler(struct pt_regs *regs) |
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{ |
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unsigned long esr = read_sysreg(esr_el1); |
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switch (ESR_ELx_EC(esr)) { |
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case ESR_ELx_EC_DABT_CUR: |
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case ESR_ELx_EC_IABT_CUR: |
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el1_abort(regs, esr); |
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break; |
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/* |
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* We don't handle ESR_ELx_EC_SP_ALIGN, since we will have hit a |
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* recursive exception when trying to push the initial pt_regs. |
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*/ |
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case ESR_ELx_EC_PC_ALIGN: |
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el1_pc(regs, esr); |
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break; |
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case ESR_ELx_EC_SYS64: |
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case ESR_ELx_EC_UNKNOWN: |
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el1_undef(regs); |
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break; |
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case ESR_ELx_EC_BREAKPT_CUR: |
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case ESR_ELx_EC_SOFTSTP_CUR: |
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case ESR_ELx_EC_WATCHPT_CUR: |
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case ESR_ELx_EC_BRK64: |
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el1_dbg(regs, esr); |
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break; |
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case ESR_ELx_EC_FPAC: |
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el1_fpac(regs, esr); |
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break; |
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default: |
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el1_inv(regs, esr); |
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} |
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} |
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asmlinkage void noinstr enter_from_user_mode(void) |
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{ |
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lockdep_hardirqs_off(CALLER_ADDR0); |
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CT_WARN_ON(ct_state() != CONTEXT_USER); |
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user_exit_irqoff(); |
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trace_hardirqs_off_finish(); |
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} |
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asmlinkage void noinstr exit_to_user_mode(void) |
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{ |
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trace_hardirqs_on_prepare(); |
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lockdep_hardirqs_on_prepare(CALLER_ADDR0); |
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user_enter_irqoff(); |
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lockdep_hardirqs_on(CALLER_ADDR0); |
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} |
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static void noinstr el0_da(struct pt_regs *regs, unsigned long esr) |
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{ |
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unsigned long far = read_sysreg(far_el1); |
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enter_from_user_mode(); |
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local_daif_restore(DAIF_PROCCTX); |
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do_mem_abort(far, esr, regs); |
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} |
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static void noinstr el0_ia(struct pt_regs *regs, unsigned long esr) |
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{ |
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unsigned long far = read_sysreg(far_el1); |
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/* |
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* We've taken an instruction abort from userspace and not yet |
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* re-enabled IRQs. If the address is a kernel address, apply |
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* BP hardening prior to enabling IRQs and pre-emption. |
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*/ |
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if (!is_ttbr0_addr(far)) |
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arm64_apply_bp_hardening(); |
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enter_from_user_mode(); |
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local_daif_restore(DAIF_PROCCTX); |
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do_mem_abort(far, esr, regs); |
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} |
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static void noinstr el0_fpsimd_acc(struct pt_regs *regs, unsigned long esr) |
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{ |
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enter_from_user_mode(); |
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local_daif_restore(DAIF_PROCCTX); |
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do_fpsimd_acc(esr, regs); |
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} |
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static void noinstr el0_sve_acc(struct pt_regs *regs, unsigned long esr) |
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{ |
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enter_from_user_mode(); |
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local_daif_restore(DAIF_PROCCTX); |
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do_sve_acc(esr, regs); |
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} |
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static void noinstr el0_fpsimd_exc(struct pt_regs *regs, unsigned long esr) |
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{ |
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enter_from_user_mode(); |
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local_daif_restore(DAIF_PROCCTX); |
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do_fpsimd_exc(esr, regs); |
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} |
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static void noinstr el0_sys(struct pt_regs *regs, unsigned long esr) |
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{ |
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enter_from_user_mode(); |
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local_daif_restore(DAIF_PROCCTX); |
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do_sysinstr(esr, regs); |
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} |
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static void noinstr el0_pc(struct pt_regs *regs, unsigned long esr) |
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{ |
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unsigned long far = read_sysreg(far_el1); |
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if (!is_ttbr0_addr(instruction_pointer(regs))) |
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arm64_apply_bp_hardening(); |
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enter_from_user_mode(); |
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local_daif_restore(DAIF_PROCCTX); |
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do_sp_pc_abort(far, esr, regs); |
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} |
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static void noinstr el0_sp(struct pt_regs *regs, unsigned long esr) |
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{ |
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enter_from_user_mode(); |
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local_daif_restore(DAIF_PROCCTX); |
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do_sp_pc_abort(regs->sp, esr, regs); |
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} |
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static void noinstr el0_undef(struct pt_regs *regs) |
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{ |
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enter_from_user_mode(); |
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local_daif_restore(DAIF_PROCCTX); |
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do_undefinstr(regs); |
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} |
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static void noinstr el0_bti(struct pt_regs *regs) |
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{ |
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enter_from_user_mode(); |
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local_daif_restore(DAIF_PROCCTX); |
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do_bti(regs); |
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} |
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static void noinstr el0_inv(struct pt_regs *regs, unsigned long esr) |
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{ |
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enter_from_user_mode(); |
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local_daif_restore(DAIF_PROCCTX); |
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bad_el0_sync(regs, 0, esr); |
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} |
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static void noinstr el0_dbg(struct pt_regs *regs, unsigned long esr) |
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{ |
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/* Only watchpoints write FAR_EL1, otherwise its UNKNOWN */ |
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unsigned long far = read_sysreg(far_el1); |
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enter_from_user_mode(); |
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do_debug_exception(far, esr, regs); |
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local_daif_restore(DAIF_PROCCTX_NOIRQ); |
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} |
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static void noinstr el0_svc(struct pt_regs *regs) |
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{ |
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enter_from_user_mode(); |
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cortex_a76_erratum_1463225_svc_handler(); |
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do_el0_svc(regs); |
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} |
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static void noinstr el0_fpac(struct pt_regs *regs, unsigned long esr) |
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{ |
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enter_from_user_mode(); |
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local_daif_restore(DAIF_PROCCTX); |
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do_ptrauth_fault(regs, esr); |
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} |
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asmlinkage void noinstr el0_sync_handler(struct pt_regs *regs) |
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{ |
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unsigned long esr = read_sysreg(esr_el1); |
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switch (ESR_ELx_EC(esr)) { |
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case ESR_ELx_EC_SVC64: |
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el0_svc(regs); |
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break; |
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case ESR_ELx_EC_DABT_LOW: |
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el0_da(regs, esr); |
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break; |
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case ESR_ELx_EC_IABT_LOW: |
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el0_ia(regs, esr); |
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break; |
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case ESR_ELx_EC_FP_ASIMD: |
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el0_fpsimd_acc(regs, esr); |
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break; |
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case ESR_ELx_EC_SVE: |
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el0_sve_acc(regs, esr); |
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break; |
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case ESR_ELx_EC_FP_EXC64: |
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el0_fpsimd_exc(regs, esr); |
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break; |
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case ESR_ELx_EC_SYS64: |
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case ESR_ELx_EC_WFx: |
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el0_sys(regs, esr); |
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break; |
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case ESR_ELx_EC_SP_ALIGN: |
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el0_sp(regs, esr); |
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break; |
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case ESR_ELx_EC_PC_ALIGN: |
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el0_pc(regs, esr); |
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break; |
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case ESR_ELx_EC_UNKNOWN: |
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el0_undef(regs); |
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break; |
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case ESR_ELx_EC_BTI: |
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el0_bti(regs); |
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break; |
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case ESR_ELx_EC_BREAKPT_LOW: |
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case ESR_ELx_EC_SOFTSTP_LOW: |
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case ESR_ELx_EC_WATCHPT_LOW: |
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case ESR_ELx_EC_BRK64: |
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el0_dbg(regs, esr); |
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break; |
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case ESR_ELx_EC_FPAC: |
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el0_fpac(regs, esr); |
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break; |
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default: |
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el0_inv(regs, esr); |
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} |
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} |
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#ifdef CONFIG_COMPAT |
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static void noinstr el0_cp15(struct pt_regs *regs, unsigned long esr) |
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{ |
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enter_from_user_mode(); |
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local_daif_restore(DAIF_PROCCTX); |
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do_cp15instr(esr, regs); |
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} |
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static void noinstr el0_svc_compat(struct pt_regs *regs) |
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{ |
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enter_from_user_mode(); |
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cortex_a76_erratum_1463225_svc_handler(); |
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do_el0_svc_compat(regs); |
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} |
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asmlinkage void noinstr el0_sync_compat_handler(struct pt_regs *regs) |
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{ |
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unsigned long esr = read_sysreg(esr_el1); |
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switch (ESR_ELx_EC(esr)) { |
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case ESR_ELx_EC_SVC32: |
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el0_svc_compat(regs); |
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break; |
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case ESR_ELx_EC_DABT_LOW: |
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el0_da(regs, esr); |
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break; |
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case ESR_ELx_EC_IABT_LOW: |
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el0_ia(regs, esr); |
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break; |
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case ESR_ELx_EC_FP_ASIMD: |
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el0_fpsimd_acc(regs, esr); |
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break; |
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case ESR_ELx_EC_FP_EXC32: |
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el0_fpsimd_exc(regs, esr); |
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break; |
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case ESR_ELx_EC_PC_ALIGN: |
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el0_pc(regs, esr); |
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break; |
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case ESR_ELx_EC_UNKNOWN: |
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case ESR_ELx_EC_CP14_MR: |
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case ESR_ELx_EC_CP14_LS: |
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case ESR_ELx_EC_CP14_64: |
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el0_undef(regs); |
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break; |
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case ESR_ELx_EC_CP15_32: |
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case ESR_ELx_EC_CP15_64: |
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el0_cp15(regs, esr); |
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break; |
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case ESR_ELx_EC_BREAKPT_LOW: |
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case ESR_ELx_EC_SOFTSTP_LOW: |
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case ESR_ELx_EC_WATCHPT_LOW: |
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case ESR_ELx_EC_BKPT32: |
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el0_dbg(regs, esr); |
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break; |
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default: |
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el0_inv(regs, esr); |
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} |
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} |
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#endif /* CONFIG_COMPAT */
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