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755 lines
13 KiB
755 lines
13 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Device Tree Source for the ebisu board |
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* |
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* Copyright (C) 2018 Renesas Electronics Corp. |
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*/ |
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|
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/dts-v1/; |
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#include "r8a77990.dtsi" |
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#include <dt-bindings/gpio/gpio.h> |
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/ { |
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model = "Renesas Ebisu board based on r8a77990"; |
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compatible = "renesas,ebisu", "renesas,r8a77990"; |
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aliases { |
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serial0 = &scif2; |
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ethernet0 = &avb; |
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mmc0 = &sdhi3; |
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mmc1 = &sdhi0; |
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mmc2 = &sdhi1; |
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}; |
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chosen { |
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bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; |
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stdout-path = "serial0:115200n8"; |
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}; |
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audio_clkout: audio-clkout { |
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/* |
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* This is same as <&rcar_sound 0> |
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* but needed to avoid cs2000/rcar_sound probe dead-lock |
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*/ |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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clock-frequency = <11289600>; |
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}; |
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backlight: backlight { |
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compatible = "pwm-backlight"; |
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pwms = <&pwm3 0 50000>; |
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brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>; |
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default-brightness-level = <10>; |
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power-supply = <®_12p0v>; |
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}; |
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cvbs-in { |
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compatible = "composite-video-connector"; |
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label = "CVBS IN"; |
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port { |
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cvbs_con: endpoint { |
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remote-endpoint = <&adv7482_ain7>; |
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}; |
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}; |
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}; |
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hdmi-in { |
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compatible = "hdmi-connector"; |
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label = "HDMI IN"; |
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type = "a"; |
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port { |
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hdmi_in_con: endpoint { |
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remote-endpoint = <&adv7482_hdmi>; |
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}; |
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}; |
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}; |
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hdmi-out { |
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compatible = "hdmi-connector"; |
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type = "a"; |
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port { |
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hdmi_con_out: endpoint { |
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remote-endpoint = <&adv7511_out>; |
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}; |
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}; |
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}; |
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lvds-decoder { |
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compatible = "thine,thc63lvd1024"; |
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vcc-supply = <®_3p3v>; |
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ports { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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port@0 { |
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reg = <0>; |
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thc63lvd1024_in: endpoint { |
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remote-endpoint = <&lvds0_out>; |
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}; |
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}; |
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port@2 { |
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reg = <2>; |
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thc63lvd1024_out: endpoint { |
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remote-endpoint = <&adv7511_in>; |
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}; |
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}; |
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}; |
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}; |
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memory@48000000 { |
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device_type = "memory"; |
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/* first 128MB is reserved for secure area. */ |
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reg = <0x0 0x48000000 0x0 0x38000000>; |
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}; |
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reg_1p8v: regulator0 { |
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compatible = "regulator-fixed"; |
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regulator-name = "fixed-1.8V"; |
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regulator-min-microvolt = <1800000>; |
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regulator-max-microvolt = <1800000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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reg_3p3v: regulator1 { |
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compatible = "regulator-fixed"; |
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regulator-name = "fixed-3.3V"; |
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regulator-min-microvolt = <3300000>; |
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regulator-max-microvolt = <3300000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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reg_12p0v: regulator2 { |
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compatible = "regulator-fixed"; |
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regulator-name = "D12.0V"; |
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regulator-min-microvolt = <12000000>; |
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regulator-max-microvolt = <12000000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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rsnd_ak4613: sound { |
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compatible = "simple-audio-card"; |
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simple-audio-card,name = "rsnd-ak4613"; |
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simple-audio-card,format = "left_j"; |
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simple-audio-card,bitclock-master = <&sndcpu>; |
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simple-audio-card,frame-master = <&sndcpu>; |
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sndcodec: simple-audio-card,codec { |
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sound-dai = <&ak4613>; |
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}; |
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sndcpu: simple-audio-card,cpu { |
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sound-dai = <&rcar_sound>; |
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}; |
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}; |
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vbus0_usb2: regulator-vbus0-usb2 { |
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compatible = "regulator-fixed"; |
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regulator-name = "USB20_VBUS_CN"; |
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regulator-min-microvolt = <5000000>; |
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regulator-max-microvolt = <5000000>; |
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gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>; |
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enable-active-high; |
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}; |
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vcc_sdhi0: regulator-vcc-sdhi0 { |
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compatible = "regulator-fixed"; |
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regulator-name = "SDHI0 Vcc"; |
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regulator-min-microvolt = <3300000>; |
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regulator-max-microvolt = <3300000>; |
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gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>; |
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enable-active-high; |
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}; |
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vccq_sdhi0: regulator-vccq-sdhi0 { |
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compatible = "regulator-gpio"; |
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regulator-name = "SDHI0 VccQ"; |
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regulator-min-microvolt = <1800000>; |
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regulator-max-microvolt = <3300000>; |
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gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>; |
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gpios-states = <1>; |
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states = <3300000 1>, <1800000 0>; |
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}; |
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vcc_sdhi1: regulator-vcc-sdhi1 { |
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compatible = "regulator-fixed"; |
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regulator-name = "SDHI1 Vcc"; |
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regulator-min-microvolt = <3300000>; |
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regulator-max-microvolt = <3300000>; |
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gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>; |
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enable-active-high; |
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}; |
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vccq_sdhi1: regulator-vccq-sdhi1 { |
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compatible = "regulator-gpio"; |
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regulator-name = "SDHI1 VccQ"; |
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regulator-min-microvolt = <1800000>; |
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regulator-max-microvolt = <3300000>; |
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gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>; |
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gpios-states = <1>; |
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states = <3300000 1>, <1800000 0>; |
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}; |
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vga { |
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compatible = "vga-connector"; |
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port { |
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vga_in: endpoint { |
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remote-endpoint = <&adv7123_out>; |
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}; |
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}; |
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}; |
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vga-encoder { |
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compatible = "adi,adv7123"; |
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ports { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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port@0 { |
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reg = <0>; |
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adv7123_in: endpoint { |
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remote-endpoint = <&du_out_rgb>; |
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}; |
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}; |
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port@1 { |
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reg = <1>; |
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adv7123_out: endpoint { |
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remote-endpoint = <&vga_in>; |
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}; |
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}; |
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}; |
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}; |
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x12_clk: x12 { |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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clock-frequency = <24576000>; |
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}; |
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x13_clk: x13 { |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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clock-frequency = <74250000>; |
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}; |
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}; |
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&audio_clk_a { |
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clock-frequency = <22579200>; |
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}; |
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&avb { |
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pinctrl-0 = <&avb_pins>; |
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pinctrl-names = "default"; |
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phy-handle = <&phy0>; |
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status = "okay"; |
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phy0: ethernet-phy@0 { |
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rxc-skew-ps = <1500>; |
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reg = <0>; |
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interrupt-parent = <&gpio2>; |
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interrupts = <21 IRQ_TYPE_LEVEL_LOW>; |
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reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; |
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/* |
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* TX clock internal delay mode is required for reliable |
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* 1Gbps communication using the KSZ9031RNX phy present on |
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* the Ebisu board, however, TX clock internal delay mode |
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* isn't supported on r8a77990. Thus, limit speed to |
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* 100Mbps for reliable communication. |
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*/ |
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max-speed = <100>; |
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}; |
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}; |
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&canfd { |
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pinctrl-0 = <&canfd0_pins>; |
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pinctrl-names = "default"; |
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status = "okay"; |
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channel0 { |
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status = "okay"; |
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}; |
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}; |
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&csi40 { |
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status = "okay"; |
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ports { |
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port@0 { |
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reg = <0>; |
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csi40_in: endpoint { |
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clock-lanes = <0>; |
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data-lanes = <1 2>; |
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remote-endpoint = <&adv7482_txa>; |
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}; |
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}; |
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}; |
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}; |
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&du { |
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pinctrl-0 = <&du_pins>; |
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pinctrl-names = "default"; |
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status = "okay"; |
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clocks = <&cpg CPG_MOD 724>, |
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<&cpg CPG_MOD 723>, |
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<&x13_clk>; |
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clock-names = "du.0", "du.1", "dclkin.0"; |
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ports { |
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port@0 { |
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endpoint { |
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remote-endpoint = <&adv7123_in>; |
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}; |
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}; |
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}; |
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}; |
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&ehci0 { |
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dr_mode = "otg"; |
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status = "okay"; |
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}; |
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&extal_clk { |
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clock-frequency = <48000000>; |
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}; |
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&hsusb { |
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dr_mode = "otg"; |
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status = "okay"; |
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}; |
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&i2c0 { |
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status = "okay"; |
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io_expander: gpio@20 { |
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compatible = "onnn,pca9654"; |
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reg = <0x20>; |
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gpio-controller; |
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#gpio-cells = <2>; |
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interrupt-parent = <&gpio2>; |
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interrupts = <22 IRQ_TYPE_LEVEL_LOW>; |
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}; |
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hdmi-encoder@39 { |
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compatible = "adi,adv7511w"; |
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reg = <0x39>; |
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interrupt-parent = <&gpio1>; |
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interrupts = <1 IRQ_TYPE_LEVEL_LOW>; |
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adi,input-depth = <8>; |
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adi,input-colorspace = "rgb"; |
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adi,input-clock = "1x"; |
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ports { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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port@0 { |
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reg = <0>; |
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adv7511_in: endpoint { |
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remote-endpoint = <&thc63lvd1024_out>; |
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}; |
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}; |
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port@1 { |
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reg = <1>; |
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adv7511_out: endpoint { |
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remote-endpoint = <&hdmi_con_out>; |
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}; |
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}; |
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}; |
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}; |
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video-receiver@70 { |
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compatible = "adi,adv7482"; |
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reg = <0x70>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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interrupt-parent = <&gpio0>; |
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interrupt-names = "intrq1", "intrq2"; |
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interrupts = <7 IRQ_TYPE_LEVEL_LOW>, |
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<17 IRQ_TYPE_LEVEL_LOW>; |
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port@7 { |
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reg = <7>; |
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adv7482_ain7: endpoint { |
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remote-endpoint = <&cvbs_con>; |
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}; |
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}; |
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port@8 { |
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reg = <8>; |
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adv7482_hdmi: endpoint { |
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remote-endpoint = <&hdmi_in_con>; |
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}; |
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}; |
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port@a { |
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reg = <10>; |
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adv7482_txa: endpoint { |
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clock-lanes = <0>; |
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data-lanes = <1 2>; |
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remote-endpoint = <&csi40_in>; |
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}; |
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}; |
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}; |
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}; |
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&i2c3 { |
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status = "okay"; |
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ak4613: codec@10 { |
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compatible = "asahi-kasei,ak4613"; |
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#sound-dai-cells = <0>; |
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reg = <0x10>; |
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clocks = <&rcar_sound 3>; |
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asahi-kasei,in1-single-end; |
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asahi-kasei,in2-single-end; |
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asahi-kasei,out1-single-end; |
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asahi-kasei,out2-single-end; |
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asahi-kasei,out3-single-end; |
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asahi-kasei,out4-single-end; |
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asahi-kasei,out5-single-end; |
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asahi-kasei,out6-single-end; |
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}; |
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cs2000: clk-multiplier@4f { |
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#clock-cells = <0>; |
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compatible = "cirrus,cs2000-cp"; |
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reg = <0x4f>; |
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clocks = <&audio_clkout>, <&x12_clk>; |
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clock-names = "clk_in", "ref_clk"; |
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assigned-clocks = <&cs2000>; |
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assigned-clock-rates = <24576000>; /* 1/1 divide */ |
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}; |
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}; |
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&i2c_dvfs { |
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status = "okay"; |
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clock-frequency = <400000>; |
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pmic: pmic@30 { |
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pinctrl-0 = <&irq0_pins>; |
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pinctrl-names = "default"; |
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compatible = "rohm,bd9571mwv"; |
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reg = <0x30>; |
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interrupt-parent = <&intc_ex>; |
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>; |
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interrupt-controller; |
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#interrupt-cells = <2>; |
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gpio-controller; |
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#gpio-cells = <2>; |
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rohm,ddr-backup-power = <0x1>; |
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rohm,rstbmode-level; |
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}; |
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}; |
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&lvds0 { |
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status = "okay"; |
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clocks = <&cpg CPG_MOD 727>, |
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<&x13_clk>, |
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<&extal_clk>; |
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clock-names = "fck", "dclkin.0", "extal"; |
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ports { |
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port@1 { |
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lvds0_out: endpoint { |
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remote-endpoint = <&thc63lvd1024_in>; |
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}; |
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}; |
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}; |
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}; |
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&lvds1 { |
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/* |
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* Even though the LVDS1 output is not connected, the encoder must be |
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* enabled to supply a pixel clock to the DU for the DPAD output when |
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* LVDS0 is in use. |
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*/ |
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status = "okay"; |
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clocks = <&cpg CPG_MOD 727>, |
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<&x13_clk>, |
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<&extal_clk>; |
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clock-names = "fck", "dclkin.0", "extal"; |
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}; |
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&ohci0 { |
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dr_mode = "otg"; |
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status = "okay"; |
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}; |
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&pcie_bus_clk { |
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clock-frequency = <100000000>; |
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}; |
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&pciec0 { |
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status = "okay"; |
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}; |
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&pfc { |
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avb_pins: avb { |
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groups = "avb_link", "avb_mii"; |
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function = "avb"; |
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}; |
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canfd0_pins: canfd0 { |
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groups = "canfd0_data"; |
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function = "canfd0"; |
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}; |
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du_pins: du { |
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groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0"; |
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function = "du"; |
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}; |
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irq0_pins: irq0 { |
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groups = "intc_ex_irq0"; |
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function = "intc_ex"; |
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}; |
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pwm3_pins: pwm3 { |
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groups = "pwm3_b"; |
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function = "pwm3"; |
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}; |
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pwm5_pins: pwm5 { |
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groups = "pwm5_a"; |
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function = "pwm5"; |
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}; |
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scif2_pins: scif2 { |
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groups = "scif2_data_a"; |
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function = "scif2"; |
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}; |
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sdhi0_pins: sd0 { |
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groups = "sdhi0_data4", "sdhi0_ctrl"; |
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function = "sdhi0"; |
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power-source = <3300>; |
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}; |
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sdhi0_pins_uhs: sd0_uhs { |
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groups = "sdhi0_data4", "sdhi0_ctrl"; |
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function = "sdhi0"; |
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power-source = <1800>; |
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}; |
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sdhi1_pins: sd1 { |
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groups = "sdhi1_data4", "sdhi1_ctrl"; |
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function = "sdhi1"; |
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power-source = <3300>; |
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}; |
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sdhi1_pins_uhs: sd1_uhs { |
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groups = "sdhi1_data4", "sdhi1_ctrl"; |
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function = "sdhi1"; |
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power-source = <1800>; |
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}; |
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sdhi3_pins: sd3 { |
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groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds"; |
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function = "sdhi3"; |
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power-source = <1800>; |
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}; |
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sound_clk_pins: sound_clk { |
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groups = "audio_clk_a", "audio_clk_b_a", "audio_clk_c_a", |
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"audio_clkout_a", "audio_clkout1_a"; |
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function = "audio_clk"; |
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}; |
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sound_pins: sound { |
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groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data"; |
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function = "ssi"; |
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}; |
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usb0_pins: usb { |
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groups = "usb0_b", "usb0_id"; |
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function = "usb0"; |
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}; |
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usb30_pins: usb30 { |
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groups = "usb30"; |
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function = "usb30"; |
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}; |
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}; |
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&pwm3 { |
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pinctrl-0 = <&pwm3_pins>; |
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pinctrl-names = "default"; |
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status = "okay"; |
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}; |
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&pwm5 { |
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pinctrl-0 = <&pwm5_pins>; |
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pinctrl-names = "default"; |
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status = "okay"; |
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}; |
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&rcar_sound { |
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pinctrl-0 = <&sound_pins &sound_clk_pins>; |
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pinctrl-names = "default"; |
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/* Single DAI */ |
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#sound-dai-cells = <0>; |
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/* audio_clkout0/1/2/3 */ |
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#clock-cells = <1>; |
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clock-frequency = <12288000 11289600>; |
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status = "okay"; |
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|
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/* update <audio_clk_b> to <cs2000> */ |
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clocks = <&cpg CPG_MOD 1005>, |
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<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, |
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<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, |
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<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, |
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<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, |
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<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, |
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<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, |
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<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, |
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<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, |
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<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, |
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<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, |
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<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, |
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<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, |
|
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, |
|
<&audio_clk_a>, <&cs2000>, <&audio_clk_c>, |
|
<&cpg CPG_CORE R8A77990_CLK_ZA2>; |
|
|
|
rcar_sound,dai { |
|
dai0 { |
|
playback = <&ssi0 &src0 &dvc0>; |
|
capture = <&ssi1 &src1 &dvc1>; |
|
}; |
|
}; |
|
|
|
}; |
|
|
|
&rwdt { |
|
timeout-sec = <60>; |
|
status = "okay"; |
|
}; |
|
|
|
&scif2 { |
|
pinctrl-0 = <&scif2_pins>; |
|
pinctrl-names = "default"; |
|
|
|
status = "okay"; |
|
}; |
|
|
|
&sdhi0 { |
|
pinctrl-0 = <&sdhi0_pins>; |
|
pinctrl-1 = <&sdhi0_pins_uhs>; |
|
pinctrl-names = "default", "state_uhs"; |
|
|
|
vmmc-supply = <&vcc_sdhi0>; |
|
vqmmc-supply = <&vccq_sdhi0>; |
|
cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; |
|
wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; |
|
bus-width = <4>; |
|
sd-uhs-sdr50; |
|
sd-uhs-sdr104; |
|
status = "okay"; |
|
}; |
|
|
|
&sdhi1 { |
|
pinctrl-0 = <&sdhi1_pins>; |
|
pinctrl-1 = <&sdhi1_pins_uhs>; |
|
pinctrl-names = "default", "state_uhs"; |
|
|
|
vmmc-supply = <&vcc_sdhi1>; |
|
vqmmc-supply = <&vccq_sdhi1>; |
|
cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>; |
|
bus-width = <4>; |
|
sd-uhs-sdr50; |
|
sd-uhs-sdr104; |
|
status = "okay"; |
|
}; |
|
|
|
&sdhi3 { |
|
/* used for on-board 8bit eMMC */ |
|
pinctrl-0 = <&sdhi3_pins>; |
|
pinctrl-1 = <&sdhi3_pins>; |
|
pinctrl-names = "default", "state_uhs"; |
|
|
|
vmmc-supply = <®_3p3v>; |
|
vqmmc-supply = <®_1p8v>; |
|
mmc-hs200-1_8v; |
|
mmc-hs400-1_8v; |
|
bus-width = <8>; |
|
no-sd; |
|
no-sdio; |
|
non-removable; |
|
full-pwr-cycle-in-suspend; |
|
status = "okay"; |
|
}; |
|
|
|
&ssi1 { |
|
shared-pin; |
|
}; |
|
|
|
&usb2_phy0 { |
|
pinctrl-0 = <&usb0_pins>; |
|
pinctrl-names = "default"; |
|
|
|
vbus-supply = <&vbus0_usb2>; |
|
status = "okay"; |
|
}; |
|
|
|
&usb3_peri0 { |
|
companion = <&xhci0>; |
|
status = "okay"; |
|
}; |
|
|
|
&vin4 { |
|
status = "okay"; |
|
}; |
|
|
|
&vin5 { |
|
status = "okay"; |
|
}; |
|
|
|
&xhci0 { |
|
pinctrl-0 = <&usb30_pins>; |
|
pinctrl-names = "default"; |
|
|
|
status = "okay"; |
|
};
|
|
|