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295 lines
7.2 KiB
295 lines
7.2 KiB
/* |
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* ARM Juno Platform motherboard peripherals |
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* |
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* Copyright (c) 2013-2014 ARM Ltd |
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* |
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* This file is licensed under a dual GPLv2 or BSD license. |
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* |
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*/ |
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/ { |
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mb_clk24mhz: clk24mhz { |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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clock-frequency = <24000000>; |
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clock-output-names = "juno_mb:clk24mhz"; |
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}; |
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mb_clk25mhz: clk25mhz { |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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clock-frequency = <25000000>; |
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clock-output-names = "juno_mb:clk25mhz"; |
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}; |
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v2m_refclk1mhz: refclk1mhz { |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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clock-frequency = <1000000>; |
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clock-output-names = "juno_mb:refclk1mhz"; |
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}; |
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v2m_refclk32khz: refclk32khz { |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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clock-frequency = <32768>; |
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clock-output-names = "juno_mb:refclk32khz"; |
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}; |
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mb_fixed_3v3: mcc-sb-3v3 { |
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compatible = "regulator-fixed"; |
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regulator-name = "MCC_SB_3V3"; |
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regulator-min-microvolt = <3300000>; |
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regulator-max-microvolt = <3300000>; |
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regulator-always-on; |
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}; |
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gpio-keys { |
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compatible = "gpio-keys"; |
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power-button { |
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debounce-interval = <50>; |
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wakeup-source; |
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linux,code = <116>; |
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label = "POWER"; |
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gpios = <&iofpga_gpio0 0 0x4>; |
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}; |
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home-button { |
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debounce-interval = <50>; |
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wakeup-source; |
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linux,code = <102>; |
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label = "HOME"; |
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gpios = <&iofpga_gpio0 1 0x4>; |
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}; |
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rlock-button { |
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debounce-interval = <50>; |
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wakeup-source; |
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linux,code = <152>; |
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label = "RLOCK"; |
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gpios = <&iofpga_gpio0 2 0x4>; |
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}; |
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vol-up-button { |
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debounce-interval = <50>; |
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wakeup-source; |
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linux,code = <115>; |
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label = "VOL+"; |
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gpios = <&iofpga_gpio0 3 0x4>; |
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}; |
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vol-down-button { |
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debounce-interval = <50>; |
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wakeup-source; |
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linux,code = <114>; |
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label = "VOL-"; |
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gpios = <&iofpga_gpio0 4 0x4>; |
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}; |
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nmi-button { |
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debounce-interval = <50>; |
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wakeup-source; |
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linux,code = <99>; |
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label = "NMI"; |
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gpios = <&iofpga_gpio0 5 0x4>; |
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}; |
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}; |
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bus@8000000 { |
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motherboard-bus { |
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compatible = "arm,vexpress,v2p-p1", "simple-bus"; |
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#address-cells = <2>; /* SMB chipselect number and offset */ |
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#size-cells = <1>; |
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#interrupt-cells = <1>; |
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ranges; |
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model = "V2M-Juno"; |
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arm,hbi = <0x252>; |
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arm,vexpress,site = <0>; |
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arm,v2m-memory-map = "rs1"; |
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flash@0 { |
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/* 2 * 32MiB NOR Flash memory mounted on CS0 */ |
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compatible = "arm,vexpress-flash", "cfi-flash"; |
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reg = <0 0x00000000 0x04000000>; |
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bank-width = <4>; |
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/* |
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* Unfortunately, accessing the flash disturbs |
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* the CPU idle states (suspend) and CPU |
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* hotplug of the platform. For this reason, |
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* flash hardware access is disabled by default. |
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*/ |
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status = "disabled"; |
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partitions { |
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compatible = "arm,arm-firmware-suite"; |
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}; |
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}; |
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ethernet@200000000 { |
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compatible = "smsc,lan9118", "smsc,lan9115"; |
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reg = <2 0x00000000 0x10000>; |
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interrupts = <3>; |
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phy-mode = "mii"; |
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reg-io-width = <4>; |
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smsc,irq-active-high; |
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smsc,irq-push-pull; |
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clocks = <&mb_clk25mhz>; |
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vdd33a-supply = <&mb_fixed_3v3>; |
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vddvario-supply = <&mb_fixed_3v3>; |
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}; |
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iofpga-bus@300000000 { |
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compatible = "simple-bus"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges = <0 3 0 0x200000>; |
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v2m_sysctl: sysctl@20000 { |
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compatible = "arm,sp810", "arm,primecell"; |
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reg = <0x020000 0x1000>; |
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clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&mb_clk24mhz>; |
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clock-names = "refclk", "timclk", "apb_pclk"; |
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#clock-cells = <1>; |
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clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3"; |
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assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>; |
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assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>; |
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}; |
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apbregs@10000 { |
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compatible = "syscon", "simple-mfd"; |
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reg = <0x010000 0x1000>; |
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led0 { |
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compatible = "register-bit-led"; |
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offset = <0x08>; |
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mask = <0x01>; |
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label = "vexpress:0"; |
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linux,default-trigger = "heartbeat"; |
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default-state = "on"; |
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}; |
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led1 { |
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compatible = "register-bit-led"; |
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offset = <0x08>; |
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mask = <0x02>; |
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label = "vexpress:1"; |
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linux,default-trigger = "mmc0"; |
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default-state = "off"; |
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}; |
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led2 { |
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compatible = "register-bit-led"; |
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offset = <0x08>; |
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mask = <0x04>; |
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label = "vexpress:2"; |
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linux,default-trigger = "cpu0"; |
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default-state = "off"; |
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}; |
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led3 { |
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compatible = "register-bit-led"; |
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offset = <0x08>; |
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mask = <0x08>; |
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label = "vexpress:3"; |
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linux,default-trigger = "cpu1"; |
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default-state = "off"; |
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}; |
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led4 { |
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compatible = "register-bit-led"; |
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offset = <0x08>; |
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mask = <0x10>; |
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label = "vexpress:4"; |
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linux,default-trigger = "cpu2"; |
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default-state = "off"; |
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}; |
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led5 { |
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compatible = "register-bit-led"; |
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offset = <0x08>; |
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mask = <0x20>; |
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label = "vexpress:5"; |
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linux,default-trigger = "cpu3"; |
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default-state = "off"; |
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}; |
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led6 { |
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compatible = "register-bit-led"; |
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offset = <0x08>; |
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mask = <0x40>; |
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label = "vexpress:6"; |
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default-state = "off"; |
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}; |
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led7 { |
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compatible = "register-bit-led"; |
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offset = <0x08>; |
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mask = <0x80>; |
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label = "vexpress:7"; |
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default-state = "off"; |
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}; |
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}; |
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mmci@50000 { |
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compatible = "arm,pl180", "arm,primecell"; |
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reg = <0x050000 0x1000>; |
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interrupts = <5>; |
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/* cd-gpios = <&v2m_mmc_gpios 0 0>; |
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wp-gpios = <&v2m_mmc_gpios 1 0>; */ |
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max-frequency = <12000000>; |
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vmmc-supply = <&mb_fixed_3v3>; |
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clocks = <&mb_clk24mhz>, <&soc_smc50mhz>; |
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clock-names = "mclk", "apb_pclk"; |
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}; |
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kmi@60000 { |
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compatible = "arm,pl050", "arm,primecell"; |
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reg = <0x060000 0x1000>; |
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interrupts = <8>; |
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clocks = <&mb_clk24mhz>, <&soc_smc50mhz>; |
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clock-names = "KMIREFCLK", "apb_pclk"; |
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}; |
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kmi@70000 { |
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compatible = "arm,pl050", "arm,primecell"; |
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reg = <0x070000 0x1000>; |
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interrupts = <8>; |
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clocks = <&mb_clk24mhz>, <&soc_smc50mhz>; |
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clock-names = "KMIREFCLK", "apb_pclk"; |
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}; |
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wdt@f0000 { |
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compatible = "arm,sp805", "arm,primecell"; |
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reg = <0x0f0000 0x10000>; |
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interrupts = <7>; |
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clocks = <&mb_clk24mhz>, <&soc_smc50mhz>; |
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clock-names = "wdog_clk", "apb_pclk"; |
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}; |
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v2m_timer01: timer@110000 { |
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compatible = "arm,sp804", "arm,primecell"; |
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reg = <0x110000 0x10000>; |
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interrupts = <9>; |
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clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&mb_clk24mhz>; |
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clock-names = "timclken1", "timclken2", "apb_pclk"; |
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}; |
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v2m_timer23: timer@120000 { |
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compatible = "arm,sp804", "arm,primecell"; |
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reg = <0x120000 0x10000>; |
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interrupts = <9>; |
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clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&mb_clk24mhz>; |
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clock-names = "timclken1", "timclken2", "apb_pclk"; |
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}; |
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rtc@170000 { |
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compatible = "arm,pl031", "arm,primecell"; |
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reg = <0x170000 0x10000>; |
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interrupts = <0>; |
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clocks = <&soc_smc50mhz>; |
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clock-names = "apb_pclk"; |
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}; |
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iofpga_gpio0: gpio@1d0000 { |
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compatible = "arm,pl061", "arm,primecell"; |
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reg = <0x1d0000 0x1000>; |
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interrupts = <6>; |
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clocks = <&soc_smc50mhz>; |
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clock-names = "apb_pclk"; |
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gpio-controller; |
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#gpio-cells = <2>; |
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interrupt-controller; |
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#interrupt-cells = <2>; |
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}; |
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}; |
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}; |
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}; |
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};
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