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857 lines
23 KiB
857 lines
23 KiB
/* |
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* arch/arm/plat-orion/common.c |
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* |
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* Marvell Orion SoC common setup code used by multiple mach-/common.c |
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* |
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* This file is licensed under the terms of the GNU General Public |
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* License version 2. This program is licensed "as is" without any |
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* warranty of any kind, whether express or implied. |
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*/ |
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|
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#include <linux/kernel.h> |
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#include <linux/init.h> |
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#include <linux/platform_device.h> |
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#include <linux/dma-mapping.h> |
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#include <linux/serial_8250.h> |
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#include <linux/ata_platform.h> |
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#include <linux/clk.h> |
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#include <linux/clkdev.h> |
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#include <linux/mv643xx_eth.h> |
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#include <linux/mv643xx_i2c.h> |
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#include <linux/platform_data/dsa.h> |
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#include <linux/platform_data/dma-mv_xor.h> |
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#include <linux/platform_data/usb-ehci-orion.h> |
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#include <plat/common.h> |
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#include <linux/phy.h> |
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|
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/* Create a clkdev entry for a given device/clk */ |
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void __init orion_clkdev_add(const char *con_id, const char *dev_id, |
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struct clk *clk) |
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{ |
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clkdev_create(clk, con_id, "%s", dev_id); |
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} |
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|
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/* Create clkdev entries for all orion platforms except kirkwood. |
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Kirkwood has gated clocks for some of its peripherals, so creates |
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its own clkdev entries. For all the other orion devices, create |
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clkdev entries to the tclk. */ |
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void __init orion_clkdev_init(struct clk *tclk) |
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{ |
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orion_clkdev_add(NULL, "orion_spi.0", tclk); |
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orion_clkdev_add(NULL, "orion_spi.1", tclk); |
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orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", tclk); |
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orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", tclk); |
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orion_clkdev_add(NULL, MV643XX_ETH_NAME ".2", tclk); |
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orion_clkdev_add(NULL, MV643XX_ETH_NAME ".3", tclk); |
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orion_clkdev_add(NULL, "orion_wdt", tclk); |
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orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", tclk); |
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} |
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|
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/* Fill in the resources structure and link it into the platform |
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device structure. There is always a memory region, and nearly |
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always an interrupt.*/ |
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static void fill_resources(struct platform_device *device, |
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struct resource *resources, |
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resource_size_t mapbase, |
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resource_size_t size) |
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{ |
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device->resource = resources; |
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device->num_resources = 1; |
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resources[0].flags = IORESOURCE_MEM; |
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resources[0].start = mapbase; |
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resources[0].end = mapbase + size; |
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} |
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static void fill_resources_irq(struct platform_device *device, |
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struct resource *resources, |
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resource_size_t mapbase, |
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resource_size_t size, |
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unsigned int irq) |
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{ |
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fill_resources(device, resources, mapbase, size); |
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|
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device->num_resources++; |
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resources[1].flags = IORESOURCE_IRQ; |
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resources[1].start = irq; |
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resources[1].end = irq; |
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} |
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|
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/***************************************************************************** |
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* UART |
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****************************************************************************/ |
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static unsigned long __init uart_get_clk_rate(struct clk *clk) |
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{ |
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clk_prepare_enable(clk); |
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return clk_get_rate(clk); |
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} |
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|
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static void __init uart_complete( |
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struct platform_device *orion_uart, |
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struct plat_serial8250_port *data, |
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struct resource *resources, |
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void __iomem *membase, |
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resource_size_t mapbase, |
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unsigned int irq, |
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struct clk *clk) |
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{ |
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data->mapbase = mapbase; |
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data->membase = membase; |
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data->irq = irq; |
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data->uartclk = uart_get_clk_rate(clk); |
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orion_uart->dev.platform_data = data; |
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fill_resources_irq(orion_uart, resources, mapbase, 0xff, irq); |
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platform_device_register(orion_uart); |
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} |
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|
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/***************************************************************************** |
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* UART0 |
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****************************************************************************/ |
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static struct plat_serial8250_port orion_uart0_data[] = { |
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{ |
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.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, |
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.iotype = UPIO_MEM, |
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.regshift = 2, |
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}, { |
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}, |
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}; |
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static struct resource orion_uart0_resources[2]; |
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static struct platform_device orion_uart0 = { |
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.name = "serial8250", |
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.id = PLAT8250_DEV_PLATFORM, |
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}; |
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void __init orion_uart0_init(void __iomem *membase, |
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resource_size_t mapbase, |
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unsigned int irq, |
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struct clk *clk) |
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{ |
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uart_complete(&orion_uart0, orion_uart0_data, orion_uart0_resources, |
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membase, mapbase, irq, clk); |
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} |
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|
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/***************************************************************************** |
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* UART1 |
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****************************************************************************/ |
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static struct plat_serial8250_port orion_uart1_data[] = { |
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{ |
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.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, |
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.iotype = UPIO_MEM, |
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.regshift = 2, |
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}, { |
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}, |
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}; |
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static struct resource orion_uart1_resources[2]; |
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static struct platform_device orion_uart1 = { |
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.name = "serial8250", |
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.id = PLAT8250_DEV_PLATFORM1, |
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}; |
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void __init orion_uart1_init(void __iomem *membase, |
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resource_size_t mapbase, |
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unsigned int irq, |
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struct clk *clk) |
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{ |
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uart_complete(&orion_uart1, orion_uart1_data, orion_uart1_resources, |
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membase, mapbase, irq, clk); |
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} |
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|
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/***************************************************************************** |
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* UART2 |
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****************************************************************************/ |
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static struct plat_serial8250_port orion_uart2_data[] = { |
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{ |
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.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, |
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.iotype = UPIO_MEM, |
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.regshift = 2, |
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}, { |
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}, |
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}; |
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static struct resource orion_uart2_resources[2]; |
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static struct platform_device orion_uart2 = { |
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.name = "serial8250", |
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.id = PLAT8250_DEV_PLATFORM2, |
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}; |
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void __init orion_uart2_init(void __iomem *membase, |
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resource_size_t mapbase, |
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unsigned int irq, |
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struct clk *clk) |
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{ |
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uart_complete(&orion_uart2, orion_uart2_data, orion_uart2_resources, |
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membase, mapbase, irq, clk); |
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} |
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|
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/***************************************************************************** |
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* UART3 |
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****************************************************************************/ |
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static struct plat_serial8250_port orion_uart3_data[] = { |
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{ |
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.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, |
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.iotype = UPIO_MEM, |
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.regshift = 2, |
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}, { |
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}, |
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}; |
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static struct resource orion_uart3_resources[2]; |
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|
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static struct platform_device orion_uart3 = { |
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.name = "serial8250", |
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.id = 3, |
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}; |
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void __init orion_uart3_init(void __iomem *membase, |
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resource_size_t mapbase, |
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unsigned int irq, |
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struct clk *clk) |
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{ |
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uart_complete(&orion_uart3, orion_uart3_data, orion_uart3_resources, |
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membase, mapbase, irq, clk); |
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} |
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/***************************************************************************** |
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* SoC RTC |
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****************************************************************************/ |
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static struct resource orion_rtc_resource[2]; |
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|
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void __init orion_rtc_init(unsigned long mapbase, |
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unsigned long irq) |
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{ |
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orion_rtc_resource[0].start = mapbase; |
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orion_rtc_resource[0].end = mapbase + SZ_32 - 1; |
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orion_rtc_resource[0].flags = IORESOURCE_MEM; |
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orion_rtc_resource[1].start = irq; |
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orion_rtc_resource[1].end = irq; |
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orion_rtc_resource[1].flags = IORESOURCE_IRQ; |
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platform_device_register_simple("rtc-mv", -1, orion_rtc_resource, 2); |
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} |
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/***************************************************************************** |
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* GE |
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****************************************************************************/ |
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static __init void ge_complete( |
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struct mv643xx_eth_shared_platform_data *orion_ge_shared_data, |
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struct resource *orion_ge_resource, unsigned long irq, |
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struct platform_device *orion_ge_shared, |
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struct platform_device *orion_ge_mvmdio, |
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struct mv643xx_eth_platform_data *eth_data, |
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struct platform_device *orion_ge) |
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{ |
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orion_ge_resource->start = irq; |
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orion_ge_resource->end = irq; |
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eth_data->shared = orion_ge_shared; |
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orion_ge->dev.platform_data = eth_data; |
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platform_device_register(orion_ge_shared); |
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if (orion_ge_mvmdio) |
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platform_device_register(orion_ge_mvmdio); |
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platform_device_register(orion_ge); |
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} |
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/***************************************************************************** |
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* GE00 |
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****************************************************************************/ |
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static struct mv643xx_eth_shared_platform_data orion_ge00_shared_data; |
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static struct resource orion_ge00_shared_resources[] = { |
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{ |
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.name = "ge00 base", |
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}, |
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}; |
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static struct platform_device orion_ge00_shared = { |
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.name = MV643XX_ETH_SHARED_NAME, |
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.id = 0, |
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.dev = { |
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.platform_data = &orion_ge00_shared_data, |
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}, |
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}; |
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static struct resource orion_ge_mvmdio_resources[] = { |
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{ |
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.name = "ge00 mvmdio base", |
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}, { |
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.name = "ge00 mvmdio err irq", |
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}, |
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}; |
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static struct platform_device orion_ge_mvmdio = { |
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.name = "orion-mdio", |
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.id = -1, |
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}; |
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static struct resource orion_ge00_resources[] = { |
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{ |
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.name = "ge00 irq", |
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.flags = IORESOURCE_IRQ, |
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}, |
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}; |
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static struct platform_device orion_ge00 = { |
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.name = MV643XX_ETH_NAME, |
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.id = 0, |
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.num_resources = 1, |
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.resource = orion_ge00_resources, |
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.dev = { |
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.coherent_dma_mask = DMA_BIT_MASK(32), |
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}, |
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}; |
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void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, |
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unsigned long mapbase, |
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unsigned long irq, |
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unsigned long irq_err, |
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unsigned int tx_csum_limit) |
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{ |
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fill_resources(&orion_ge00_shared, orion_ge00_shared_resources, |
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mapbase + 0x2000, SZ_16K - 1); |
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fill_resources_irq(&orion_ge_mvmdio, orion_ge_mvmdio_resources, |
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mapbase + 0x2004, 0x84 - 1, irq_err); |
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orion_ge00_shared_data.tx_csum_limit = tx_csum_limit; |
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ge_complete(&orion_ge00_shared_data, |
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orion_ge00_resources, irq, &orion_ge00_shared, |
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&orion_ge_mvmdio, |
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eth_data, &orion_ge00); |
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} |
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/***************************************************************************** |
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* GE01 |
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****************************************************************************/ |
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static struct mv643xx_eth_shared_platform_data orion_ge01_shared_data; |
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static struct resource orion_ge01_shared_resources[] = { |
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{ |
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.name = "ge01 base", |
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} |
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}; |
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static struct platform_device orion_ge01_shared = { |
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.name = MV643XX_ETH_SHARED_NAME, |
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.id = 1, |
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.dev = { |
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.platform_data = &orion_ge01_shared_data, |
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}, |
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}; |
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static struct resource orion_ge01_resources[] = { |
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{ |
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.name = "ge01 irq", |
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.flags = IORESOURCE_IRQ, |
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}, |
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}; |
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static struct platform_device orion_ge01 = { |
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.name = MV643XX_ETH_NAME, |
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.id = 1, |
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.num_resources = 1, |
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.resource = orion_ge01_resources, |
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.dev = { |
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.coherent_dma_mask = DMA_BIT_MASK(32), |
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}, |
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}; |
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void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, |
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unsigned long mapbase, |
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unsigned long irq, |
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unsigned int tx_csum_limit) |
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{ |
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fill_resources(&orion_ge01_shared, orion_ge01_shared_resources, |
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mapbase + 0x2000, SZ_16K - 1); |
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orion_ge01_shared_data.tx_csum_limit = tx_csum_limit; |
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ge_complete(&orion_ge01_shared_data, |
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orion_ge01_resources, irq, &orion_ge01_shared, |
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NULL, |
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eth_data, &orion_ge01); |
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} |
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/***************************************************************************** |
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* GE10 |
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****************************************************************************/ |
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static struct mv643xx_eth_shared_platform_data orion_ge10_shared_data; |
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|
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static struct resource orion_ge10_shared_resources[] = { |
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{ |
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.name = "ge10 base", |
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} |
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}; |
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static struct platform_device orion_ge10_shared = { |
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.name = MV643XX_ETH_SHARED_NAME, |
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.id = 2, |
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.dev = { |
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.platform_data = &orion_ge10_shared_data, |
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}, |
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}; |
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static struct resource orion_ge10_resources[] = { |
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{ |
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.name = "ge10 irq", |
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.flags = IORESOURCE_IRQ, |
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}, |
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}; |
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static struct platform_device orion_ge10 = { |
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.name = MV643XX_ETH_NAME, |
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.id = 2, |
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.num_resources = 1, |
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.resource = orion_ge10_resources, |
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.dev = { |
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.coherent_dma_mask = DMA_BIT_MASK(32), |
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}, |
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}; |
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void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data, |
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unsigned long mapbase, |
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unsigned long irq) |
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{ |
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fill_resources(&orion_ge10_shared, orion_ge10_shared_resources, |
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mapbase + 0x2000, SZ_16K - 1); |
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ge_complete(&orion_ge10_shared_data, |
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orion_ge10_resources, irq, &orion_ge10_shared, |
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NULL, |
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eth_data, &orion_ge10); |
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} |
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/***************************************************************************** |
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* GE11 |
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****************************************************************************/ |
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static struct mv643xx_eth_shared_platform_data orion_ge11_shared_data; |
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static struct resource orion_ge11_shared_resources[] = { |
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{ |
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.name = "ge11 base", |
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}, |
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}; |
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static struct platform_device orion_ge11_shared = { |
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.name = MV643XX_ETH_SHARED_NAME, |
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.id = 3, |
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.dev = { |
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.platform_data = &orion_ge11_shared_data, |
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}, |
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}; |
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static struct resource orion_ge11_resources[] = { |
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{ |
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.name = "ge11 irq", |
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.flags = IORESOURCE_IRQ, |
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}, |
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}; |
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static struct platform_device orion_ge11 = { |
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.name = MV643XX_ETH_NAME, |
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.id = 3, |
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.num_resources = 1, |
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.resource = orion_ge11_resources, |
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.dev = { |
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.coherent_dma_mask = DMA_BIT_MASK(32), |
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}, |
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}; |
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void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, |
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unsigned long mapbase, |
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unsigned long irq) |
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{ |
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fill_resources(&orion_ge11_shared, orion_ge11_shared_resources, |
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mapbase + 0x2000, SZ_16K - 1); |
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ge_complete(&orion_ge11_shared_data, |
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orion_ge11_resources, irq, &orion_ge11_shared, |
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NULL, |
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eth_data, &orion_ge11); |
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} |
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|
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#ifdef CONFIG_ARCH_ORION5X |
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/***************************************************************************** |
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* Ethernet switch |
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****************************************************************************/ |
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static __initdata struct mdio_board_info orion_ge00_switch_board_info = { |
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.bus_id = "orion-mii", |
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.modalias = "mv88e6085", |
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}; |
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|
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void __init orion_ge00_switch_init(struct dsa_chip_data *d) |
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{ |
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unsigned int i; |
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|
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if (!IS_BUILTIN(CONFIG_PHYLIB)) |
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return; |
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for (i = 0; i < ARRAY_SIZE(d->port_names); i++) { |
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if (!strcmp(d->port_names[i], "cpu")) { |
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d->netdev[i] = &orion_ge00.dev; |
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break; |
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} |
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} |
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orion_ge00_switch_board_info.mdio_addr = d->sw_addr; |
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orion_ge00_switch_board_info.platform_data = d; |
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|
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mdiobus_register_board_info(&orion_ge00_switch_board_info, 1); |
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} |
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#endif |
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|
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/***************************************************************************** |
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* I2C |
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****************************************************************************/ |
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static struct mv64xxx_i2c_pdata orion_i2c_pdata = { |
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.freq_n = 3, |
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.timeout = 1000, /* Default timeout of 1 second */ |
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}; |
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|
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static struct resource orion_i2c_resources[2]; |
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|
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static struct platform_device orion_i2c = { |
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.name = MV64XXX_I2C_CTLR_NAME, |
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.id = 0, |
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.dev = { |
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.platform_data = &orion_i2c_pdata, |
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}, |
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}; |
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|
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static struct mv64xxx_i2c_pdata orion_i2c_1_pdata = { |
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.freq_n = 3, |
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.timeout = 1000, /* Default timeout of 1 second */ |
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}; |
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|
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static struct resource orion_i2c_1_resources[2]; |
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|
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static struct platform_device orion_i2c_1 = { |
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.name = MV64XXX_I2C_CTLR_NAME, |
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.id = 1, |
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.dev = { |
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.platform_data = &orion_i2c_1_pdata, |
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}, |
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}; |
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|
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void __init orion_i2c_init(unsigned long mapbase, |
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unsigned long irq, |
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unsigned long freq_m) |
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{ |
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orion_i2c_pdata.freq_m = freq_m; |
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fill_resources_irq(&orion_i2c, orion_i2c_resources, mapbase, |
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SZ_32 - 1, irq); |
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platform_device_register(&orion_i2c); |
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} |
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|
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void __init orion_i2c_1_init(unsigned long mapbase, |
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unsigned long irq, |
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unsigned long freq_m) |
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{ |
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orion_i2c_1_pdata.freq_m = freq_m; |
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fill_resources_irq(&orion_i2c_1, orion_i2c_1_resources, mapbase, |
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SZ_32 - 1, irq); |
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platform_device_register(&orion_i2c_1); |
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} |
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|
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/***************************************************************************** |
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* SPI |
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****************************************************************************/ |
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static struct resource orion_spi_resources; |
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|
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static struct platform_device orion_spi = { |
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.name = "orion_spi", |
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.id = 0, |
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}; |
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|
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static struct resource orion_spi_1_resources; |
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|
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static struct platform_device orion_spi_1 = { |
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.name = "orion_spi", |
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.id = 1, |
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}; |
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|
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/* Note: The SPI silicon core does have interrupts. However the |
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* current Linux software driver does not use interrupts. */ |
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|
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void __init orion_spi_init(unsigned long mapbase) |
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{ |
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fill_resources(&orion_spi, &orion_spi_resources, |
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mapbase, SZ_512 - 1); |
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platform_device_register(&orion_spi); |
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} |
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|
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void __init orion_spi_1_init(unsigned long mapbase) |
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{ |
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fill_resources(&orion_spi_1, &orion_spi_1_resources, |
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mapbase, SZ_512 - 1); |
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platform_device_register(&orion_spi_1); |
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} |
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/***************************************************************************** |
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* XOR |
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****************************************************************************/ |
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static u64 orion_xor_dmamask = DMA_BIT_MASK(32); |
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/***************************************************************************** |
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* XOR0 |
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****************************************************************************/ |
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static struct resource orion_xor0_shared_resources[] = { |
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{ |
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.name = "xor 0 low", |
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.flags = IORESOURCE_MEM, |
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}, { |
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.name = "xor 0 high", |
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.flags = IORESOURCE_MEM, |
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}, { |
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.name = "irq channel 0", |
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.flags = IORESOURCE_IRQ, |
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}, { |
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.name = "irq channel 1", |
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.flags = IORESOURCE_IRQ, |
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}, |
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}; |
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static struct mv_xor_channel_data orion_xor0_channels_data[2]; |
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static struct mv_xor_platform_data orion_xor0_pdata = { |
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.channels = orion_xor0_channels_data, |
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}; |
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static struct platform_device orion_xor0_shared = { |
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.name = MV_XOR_NAME, |
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.id = 0, |
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.num_resources = ARRAY_SIZE(orion_xor0_shared_resources), |
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.resource = orion_xor0_shared_resources, |
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.dev = { |
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.dma_mask = &orion_xor_dmamask, |
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.coherent_dma_mask = DMA_BIT_MASK(32), |
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.platform_data = &orion_xor0_pdata, |
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}, |
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}; |
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void __init orion_xor0_init(unsigned long mapbase_low, |
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unsigned long mapbase_high, |
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unsigned long irq_0, |
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unsigned long irq_1) |
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{ |
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orion_xor0_shared_resources[0].start = mapbase_low; |
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orion_xor0_shared_resources[0].end = mapbase_low + 0xff; |
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orion_xor0_shared_resources[1].start = mapbase_high; |
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orion_xor0_shared_resources[1].end = mapbase_high + 0xff; |
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orion_xor0_shared_resources[2].start = irq_0; |
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orion_xor0_shared_resources[2].end = irq_0; |
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orion_xor0_shared_resources[3].start = irq_1; |
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orion_xor0_shared_resources[3].end = irq_1; |
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dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[0].cap_mask); |
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dma_cap_set(DMA_XOR, orion_xor0_channels_data[0].cap_mask); |
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dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[1].cap_mask); |
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dma_cap_set(DMA_XOR, orion_xor0_channels_data[1].cap_mask); |
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platform_device_register(&orion_xor0_shared); |
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} |
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/***************************************************************************** |
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* XOR1 |
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****************************************************************************/ |
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static struct resource orion_xor1_shared_resources[] = { |
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{ |
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.name = "xor 1 low", |
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.flags = IORESOURCE_MEM, |
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}, { |
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.name = "xor 1 high", |
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.flags = IORESOURCE_MEM, |
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}, { |
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.name = "irq channel 0", |
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.flags = IORESOURCE_IRQ, |
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}, { |
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.name = "irq channel 1", |
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.flags = IORESOURCE_IRQ, |
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}, |
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}; |
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static struct mv_xor_channel_data orion_xor1_channels_data[2]; |
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static struct mv_xor_platform_data orion_xor1_pdata = { |
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.channels = orion_xor1_channels_data, |
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}; |
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static struct platform_device orion_xor1_shared = { |
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.name = MV_XOR_NAME, |
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.id = 1, |
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.num_resources = ARRAY_SIZE(orion_xor1_shared_resources), |
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.resource = orion_xor1_shared_resources, |
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.dev = { |
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.dma_mask = &orion_xor_dmamask, |
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.coherent_dma_mask = DMA_BIT_MASK(32), |
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.platform_data = &orion_xor1_pdata, |
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}, |
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}; |
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void __init orion_xor1_init(unsigned long mapbase_low, |
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unsigned long mapbase_high, |
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unsigned long irq_0, |
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unsigned long irq_1) |
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{ |
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orion_xor1_shared_resources[0].start = mapbase_low; |
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orion_xor1_shared_resources[0].end = mapbase_low + 0xff; |
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orion_xor1_shared_resources[1].start = mapbase_high; |
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orion_xor1_shared_resources[1].end = mapbase_high + 0xff; |
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orion_xor1_shared_resources[2].start = irq_0; |
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orion_xor1_shared_resources[2].end = irq_0; |
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orion_xor1_shared_resources[3].start = irq_1; |
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orion_xor1_shared_resources[3].end = irq_1; |
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dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[0].cap_mask); |
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dma_cap_set(DMA_XOR, orion_xor1_channels_data[0].cap_mask); |
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dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[1].cap_mask); |
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dma_cap_set(DMA_XOR, orion_xor1_channels_data[1].cap_mask); |
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platform_device_register(&orion_xor1_shared); |
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} |
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/***************************************************************************** |
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* EHCI |
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****************************************************************************/ |
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static struct orion_ehci_data orion_ehci_data; |
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static u64 ehci_dmamask = DMA_BIT_MASK(32); |
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/***************************************************************************** |
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* EHCI0 |
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****************************************************************************/ |
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static struct resource orion_ehci_resources[2]; |
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static struct platform_device orion_ehci = { |
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.name = "orion-ehci", |
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.id = 0, |
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.dev = { |
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.dma_mask = &ehci_dmamask, |
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.coherent_dma_mask = DMA_BIT_MASK(32), |
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.platform_data = &orion_ehci_data, |
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}, |
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}; |
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void __init orion_ehci_init(unsigned long mapbase, |
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unsigned long irq, |
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enum orion_ehci_phy_ver phy_version) |
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{ |
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orion_ehci_data.phy_version = phy_version; |
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fill_resources_irq(&orion_ehci, orion_ehci_resources, mapbase, SZ_4K - 1, |
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irq); |
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platform_device_register(&orion_ehci); |
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} |
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/***************************************************************************** |
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* EHCI1 |
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****************************************************************************/ |
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static struct resource orion_ehci_1_resources[2]; |
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static struct platform_device orion_ehci_1 = { |
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.name = "orion-ehci", |
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.id = 1, |
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.dev = { |
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.dma_mask = &ehci_dmamask, |
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.coherent_dma_mask = DMA_BIT_MASK(32), |
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.platform_data = &orion_ehci_data, |
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}, |
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}; |
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void __init orion_ehci_1_init(unsigned long mapbase, |
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unsigned long irq) |
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{ |
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fill_resources_irq(&orion_ehci_1, orion_ehci_1_resources, |
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mapbase, SZ_4K - 1, irq); |
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platform_device_register(&orion_ehci_1); |
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} |
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/***************************************************************************** |
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* EHCI2 |
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****************************************************************************/ |
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static struct resource orion_ehci_2_resources[2]; |
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static struct platform_device orion_ehci_2 = { |
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.name = "orion-ehci", |
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.id = 2, |
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.dev = { |
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.dma_mask = &ehci_dmamask, |
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.coherent_dma_mask = DMA_BIT_MASK(32), |
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.platform_data = &orion_ehci_data, |
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}, |
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}; |
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void __init orion_ehci_2_init(unsigned long mapbase, |
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unsigned long irq) |
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{ |
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fill_resources_irq(&orion_ehci_2, orion_ehci_2_resources, |
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mapbase, SZ_4K - 1, irq); |
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platform_device_register(&orion_ehci_2); |
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} |
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/***************************************************************************** |
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* SATA |
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****************************************************************************/ |
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static struct resource orion_sata_resources[2] = { |
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{ |
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.name = "sata base", |
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}, { |
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.name = "sata irq", |
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}, |
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}; |
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static struct platform_device orion_sata = { |
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.name = "sata_mv", |
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.id = 0, |
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.dev = { |
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.coherent_dma_mask = DMA_BIT_MASK(32), |
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}, |
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}; |
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void __init orion_sata_init(struct mv_sata_platform_data *sata_data, |
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unsigned long mapbase, |
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unsigned long irq) |
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{ |
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orion_sata.dev.platform_data = sata_data; |
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fill_resources_irq(&orion_sata, orion_sata_resources, |
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mapbase, 0x5000 - 1, irq); |
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platform_device_register(&orion_sata); |
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} |
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/***************************************************************************** |
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* Cryptographic Engines and Security Accelerator (CESA) |
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****************************************************************************/ |
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static struct resource orion_crypto_resources[] = { |
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{ |
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.name = "regs", |
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}, { |
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.name = "crypto interrupt", |
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}, { |
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.name = "sram", |
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.flags = IORESOURCE_MEM, |
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}, |
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}; |
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static struct platform_device orion_crypto = { |
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.name = "mv_crypto", |
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.id = -1, |
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}; |
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void __init orion_crypto_init(unsigned long mapbase, |
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unsigned long srambase, |
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unsigned long sram_size, |
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unsigned long irq) |
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{ |
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fill_resources_irq(&orion_crypto, orion_crypto_resources, |
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mapbase, 0xffff, irq); |
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orion_crypto.num_resources = 3; |
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orion_crypto_resources[2].start = srambase; |
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orion_crypto_resources[2].end = srambase + sram_size - 1; |
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platform_device_register(&orion_crypto); |
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}
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