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270 lines
6.6 KiB
270 lines
6.6 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* linux/arch/arm/mm/fault-armv.c |
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* |
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* Copyright (C) 1995 Linus Torvalds |
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* Modifications for ARM processor (c) 1995-2002 Russell King |
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*/ |
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#include <linux/sched.h> |
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#include <linux/kernel.h> |
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#include <linux/mm.h> |
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#include <linux/bitops.h> |
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#include <linux/vmalloc.h> |
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#include <linux/init.h> |
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#include <linux/pagemap.h> |
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#include <linux/gfp.h> |
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#include <asm/bugs.h> |
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#include <asm/cacheflush.h> |
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#include <asm/cachetype.h> |
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#include <asm/tlbflush.h> |
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#include "mm.h" |
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static pteval_t shared_pte_mask = L_PTE_MT_BUFFERABLE; |
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#if __LINUX_ARM_ARCH__ < 6 |
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/* |
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* We take the easy way out of this problem - we make the |
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* PTE uncacheable. However, we leave the write buffer on. |
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* |
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* Note that the pte lock held when calling update_mmu_cache must also |
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* guard the pte (somewhere else in the same mm) that we modify here. |
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* Therefore those configurations which might call adjust_pte (those |
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* without CONFIG_CPU_CACHE_VIPT) cannot support split page_table_lock. |
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*/ |
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static int do_adjust_pte(struct vm_area_struct *vma, unsigned long address, |
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unsigned long pfn, pte_t *ptep) |
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{ |
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pte_t entry = *ptep; |
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int ret; |
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/* |
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* If this page is present, it's actually being shared. |
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*/ |
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ret = pte_present(entry); |
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/* |
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* If this page isn't present, or is already setup to |
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* fault (ie, is old), we can safely ignore any issues. |
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*/ |
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if (ret && (pte_val(entry) & L_PTE_MT_MASK) != shared_pte_mask) { |
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flush_cache_page(vma, address, pfn); |
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outer_flush_range((pfn << PAGE_SHIFT), |
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(pfn << PAGE_SHIFT) + PAGE_SIZE); |
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pte_val(entry) &= ~L_PTE_MT_MASK; |
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pte_val(entry) |= shared_pte_mask; |
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set_pte_at(vma->vm_mm, address, ptep, entry); |
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flush_tlb_page(vma, address); |
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} |
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return ret; |
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} |
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#if USE_SPLIT_PTE_PTLOCKS |
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/* |
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* If we are using split PTE locks, then we need to take the page |
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* lock here. Otherwise we are using shared mm->page_table_lock |
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* which is already locked, thus cannot take it. |
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*/ |
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static inline void do_pte_lock(spinlock_t *ptl) |
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{ |
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/* |
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* Use nested version here to indicate that we are already |
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* holding one similar spinlock. |
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*/ |
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spin_lock_nested(ptl, SINGLE_DEPTH_NESTING); |
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} |
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static inline void do_pte_unlock(spinlock_t *ptl) |
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{ |
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spin_unlock(ptl); |
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} |
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#else /* !USE_SPLIT_PTE_PTLOCKS */ |
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static inline void do_pte_lock(spinlock_t *ptl) {} |
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static inline void do_pte_unlock(spinlock_t *ptl) {} |
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#endif /* USE_SPLIT_PTE_PTLOCKS */ |
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static int adjust_pte(struct vm_area_struct *vma, unsigned long address, |
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unsigned long pfn) |
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{ |
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spinlock_t *ptl; |
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pgd_t *pgd; |
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p4d_t *p4d; |
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pud_t *pud; |
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pmd_t *pmd; |
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pte_t *pte; |
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int ret; |
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pgd = pgd_offset(vma->vm_mm, address); |
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if (pgd_none_or_clear_bad(pgd)) |
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return 0; |
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p4d = p4d_offset(pgd, address); |
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if (p4d_none_or_clear_bad(p4d)) |
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return 0; |
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pud = pud_offset(p4d, address); |
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if (pud_none_or_clear_bad(pud)) |
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return 0; |
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pmd = pmd_offset(pud, address); |
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if (pmd_none_or_clear_bad(pmd)) |
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return 0; |
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/* |
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* This is called while another page table is mapped, so we |
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* must use the nested version. This also means we need to |
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* open-code the spin-locking. |
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*/ |
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ptl = pte_lockptr(vma->vm_mm, pmd); |
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pte = pte_offset_map(pmd, address); |
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do_pte_lock(ptl); |
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ret = do_adjust_pte(vma, address, pfn, pte); |
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do_pte_unlock(ptl); |
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pte_unmap(pte); |
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return ret; |
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} |
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static void |
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make_coherent(struct address_space *mapping, struct vm_area_struct *vma, |
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unsigned long addr, pte_t *ptep, unsigned long pfn) |
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{ |
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struct mm_struct *mm = vma->vm_mm; |
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struct vm_area_struct *mpnt; |
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unsigned long offset; |
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pgoff_t pgoff; |
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int aliases = 0; |
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pgoff = vma->vm_pgoff + ((addr - vma->vm_start) >> PAGE_SHIFT); |
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/* |
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* If we have any shared mappings that are in the same mm |
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* space, then we need to handle them specially to maintain |
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* cache coherency. |
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*/ |
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flush_dcache_mmap_lock(mapping); |
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vma_interval_tree_foreach(mpnt, &mapping->i_mmap, pgoff, pgoff) { |
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/* |
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* If this VMA is not in our MM, we can ignore it. |
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* Note that we intentionally mask out the VMA |
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* that we are fixing up. |
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*/ |
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if (mpnt->vm_mm != mm || mpnt == vma) |
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continue; |
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if (!(mpnt->vm_flags & VM_MAYSHARE)) |
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continue; |
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offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT; |
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aliases += adjust_pte(mpnt, mpnt->vm_start + offset, pfn); |
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} |
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flush_dcache_mmap_unlock(mapping); |
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if (aliases) |
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do_adjust_pte(vma, addr, pfn, ptep); |
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} |
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/* |
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* Take care of architecture specific things when placing a new PTE into |
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* a page table, or changing an existing PTE. Basically, there are two |
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* things that we need to take care of: |
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* |
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* 1. If PG_dcache_clean is not set for the page, we need to ensure |
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* that any cache entries for the kernels virtual memory |
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* range are written back to the page. |
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* 2. If we have multiple shared mappings of the same space in |
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* an object, we need to deal with the cache aliasing issues. |
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* |
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* Note that the pte lock will be held. |
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*/ |
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void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, |
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pte_t *ptep) |
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{ |
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unsigned long pfn = pte_pfn(*ptep); |
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struct address_space *mapping; |
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struct page *page; |
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if (!pfn_valid(pfn)) |
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return; |
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/* |
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* The zero page is never written to, so never has any dirty |
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* cache lines, and therefore never needs to be flushed. |
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*/ |
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page = pfn_to_page(pfn); |
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if (page == ZERO_PAGE(0)) |
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return; |
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mapping = page_mapping_file(page); |
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if (!test_and_set_bit(PG_dcache_clean, &page->flags)) |
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__flush_dcache_page(mapping, page); |
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if (mapping) { |
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if (cache_is_vivt()) |
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make_coherent(mapping, vma, addr, ptep, pfn); |
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else if (vma->vm_flags & VM_EXEC) |
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__flush_icache_all(); |
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} |
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} |
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#endif /* __LINUX_ARM_ARCH__ < 6 */ |
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/* |
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* Check whether the write buffer has physical address aliasing |
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* issues. If it has, we need to avoid them for the case where |
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* we have several shared mappings of the same object in user |
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* space. |
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*/ |
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static int __init check_writebuffer(unsigned long *p1, unsigned long *p2) |
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{ |
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register unsigned long zero = 0, one = 1, val; |
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local_irq_disable(); |
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mb(); |
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*p1 = one; |
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mb(); |
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*p2 = zero; |
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mb(); |
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val = *p1; |
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mb(); |
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local_irq_enable(); |
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return val != zero; |
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} |
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void __init check_writebuffer_bugs(void) |
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{ |
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struct page *page; |
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const char *reason; |
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unsigned long v = 1; |
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pr_info("CPU: Testing write buffer coherency: "); |
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page = alloc_page(GFP_KERNEL); |
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if (page) { |
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unsigned long *p1, *p2; |
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pgprot_t prot = __pgprot_modify(PAGE_KERNEL, |
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L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE); |
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p1 = vmap(&page, 1, VM_IOREMAP, prot); |
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p2 = vmap(&page, 1, VM_IOREMAP, prot); |
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if (p1 && p2) { |
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v = check_writebuffer(p1, p2); |
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reason = "enabling work-around"; |
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} else { |
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reason = "unable to map memory\n"; |
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} |
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vunmap(p1); |
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vunmap(p2); |
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put_page(page); |
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} else { |
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reason = "unable to grab page\n"; |
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} |
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if (v) { |
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pr_cont("failed, %s\n", reason); |
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shared_pte_mask = L_PTE_MT_UNCACHED; |
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} else { |
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pr_cont("ok\n"); |
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} |
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}
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