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136 lines
3.5 KiB
136 lines
3.5 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* linux/arch/arm/mach-sa1100/nanoengine.c |
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* |
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* Bright Star Engineering's nanoEngine board init code. |
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* |
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* Copyright (C) 2010 Marcelo Roberto Jimenez <[email protected]> |
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*/ |
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#include <linux/init.h> |
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#include <linux/gpio/machine.h> |
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#include <linux/kernel.h> |
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#include <linux/platform_data/sa11x0-serial.h> |
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#include <linux/mtd/mtd.h> |
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#include <linux/mtd/partitions.h> |
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#include <linux/root_dev.h> |
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#include <asm/mach-types.h> |
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#include <asm/setup.h> |
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#include <asm/page.h> |
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#include <asm/mach/arch.h> |
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#include <asm/mach/flash.h> |
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#include <asm/mach/map.h> |
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#include <mach/hardware.h> |
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#include <mach/nanoengine.h> |
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#include <mach/irqs.h> |
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#include "generic.h" |
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/* Flash bank 0 */ |
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static struct mtd_partition nanoengine_partitions[] = { |
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{ |
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.name = "nanoEngine boot firmware and parameter table", |
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.size = 0x00010000, /* 32K */ |
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.offset = 0, |
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.mask_flags = MTD_WRITEABLE, |
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}, { |
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.name = "kernel/initrd reserved", |
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.size = 0x002f0000, |
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.offset = 0x00010000, |
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.mask_flags = MTD_WRITEABLE, |
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}, { |
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.name = "experimental filesystem allocation", |
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.size = 0x00100000, |
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.offset = 0x00300000, |
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.mask_flags = MTD_WRITEABLE, |
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} |
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}; |
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static struct flash_platform_data nanoengine_flash_data = { |
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.map_name = "jedec_probe", |
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.parts = nanoengine_partitions, |
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.nr_parts = ARRAY_SIZE(nanoengine_partitions), |
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}; |
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static struct resource nanoengine_flash_resources[] = { |
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DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M), |
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DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M), |
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}; |
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static struct map_desc nanoengine_io_desc[] __initdata = { |
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{ |
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/* System Registers */ |
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.virtual = 0xf0000000, |
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.pfn = __phys_to_pfn(0x10000000), |
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.length = 0x00100000, |
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.type = MT_DEVICE |
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}, { |
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/* Internal PCI Memory Read/Write */ |
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.virtual = NANO_PCI_MEM_RW_VIRT, |
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.pfn = __phys_to_pfn(NANO_PCI_MEM_RW_PHYS), |
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.length = NANO_PCI_MEM_RW_SIZE, |
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.type = MT_DEVICE |
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}, { |
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/* Internal PCI Config Space */ |
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.virtual = NANO_PCI_CONFIG_SPACE_VIRT, |
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.pfn = __phys_to_pfn(NANO_PCI_CONFIG_SPACE_PHYS), |
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.length = NANO_PCI_CONFIG_SPACE_SIZE, |
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.type = MT_DEVICE |
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} |
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}; |
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static void __init nanoengine_map_io(void) |
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{ |
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sa1100_map_io(); |
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iotable_init(nanoengine_io_desc, ARRAY_SIZE(nanoengine_io_desc)); |
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sa1100_register_uart(0, 1); |
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sa1100_register_uart(1, 2); |
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sa1100_register_uart(2, 3); |
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Ser1SDCR0 |= SDCR0_UART; |
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/* disable IRDA -- UART2 is used as a normal serial port */ |
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Ser2UTCR4 = 0; |
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Ser2HSCR0 = 0; |
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} |
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static struct gpiod_lookup_table nanoengine_pcmcia0_gpio_table = { |
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.dev_id = "sa11x0-pcmcia.0", |
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.table = { |
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GPIO_LOOKUP("gpio", 11, "ready", GPIO_ACTIVE_HIGH), |
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GPIO_LOOKUP("gpio", 13, "detect", GPIO_ACTIVE_LOW), |
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GPIO_LOOKUP("gpio", 15, "reset", GPIO_ACTIVE_HIGH), |
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{ }, |
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}, |
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}; |
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static struct gpiod_lookup_table nanoengine_pcmcia1_gpio_table = { |
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.dev_id = "sa11x0-pcmcia.1", |
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.table = { |
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GPIO_LOOKUP("gpio", 12, "ready", GPIO_ACTIVE_HIGH), |
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GPIO_LOOKUP("gpio", 14, "detect", GPIO_ACTIVE_LOW), |
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GPIO_LOOKUP("gpio", 16, "reset", GPIO_ACTIVE_HIGH), |
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{ }, |
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}, |
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}; |
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static void __init nanoengine_init(void) |
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{ |
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sa11x0_register_pcmcia(0, &nanoengine_pcmcia0_gpio_table); |
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sa11x0_register_pcmcia(1, &nanoengine_pcmcia1_gpio_table); |
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sa11x0_register_mtd(&nanoengine_flash_data, nanoengine_flash_resources, |
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ARRAY_SIZE(nanoengine_flash_resources)); |
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} |
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MACHINE_START(NANOENGINE, "BSE nanoEngine") |
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.atag_offset = 0x100, |
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.map_io = nanoengine_map_io, |
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.nr_irqs = SA1100_NR_IRQS, |
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.init_irq = sa1100_init_irq, |
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.init_time = sa1100_timer_init, |
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.init_machine = nanoengine_init, |
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.init_late = sa11x0_init_late, |
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.restart = sa11x0_restart, |
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MACHINE_END
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