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436 lines
9.7 KiB
436 lines
9.7 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* linux/arch/arm/mach-pxa/mfp-pxa2xx.c |
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* |
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* PXA2xx pin mux configuration support |
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* |
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* The GPIOs on PXA2xx can be configured as one of many alternate |
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* functions, this is by concept samilar to the MFP configuration |
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* on PXA3xx, what's more important, the low power pin state and |
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* wakeup detection are also supported by the same framework. |
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*/ |
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#include <linux/gpio.h> |
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#include <linux/gpio-pxa.h> |
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#include <linux/module.h> |
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#include <linux/kernel.h> |
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#include <linux/init.h> |
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#include <linux/io.h> |
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#include <linux/syscore_ops.h> |
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#include <mach/pxa2xx-regs.h> |
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#include "mfp-pxa2xx.h" |
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#include "generic.h" |
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#define PGSR(x) __REG2(0x40F00020, (x) << 2) |
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#define __GAFR(u, x) __REG2((u) ? 0x40E00058 : 0x40E00054, (x) << 3) |
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#define GAFR_L(x) __GAFR(0, x) |
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#define GAFR_U(x) __GAFR(1, x) |
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#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) |
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#define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5)) |
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#define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c) |
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#define GPSR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x18) |
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#define GPCR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x24) |
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#define PWER_WE35 (1 << 24) |
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struct gpio_desc { |
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unsigned valid : 1; |
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unsigned can_wakeup : 1; |
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unsigned keypad_gpio : 1; |
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unsigned dir_inverted : 1; |
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unsigned int mask; /* bit mask in PWER or PKWR */ |
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unsigned int mux_mask; /* bit mask of muxed gpio bits, 0 if no mux */ |
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unsigned long config; |
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}; |
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static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1]; |
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static unsigned long gpdr_lpm[4]; |
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static int __mfp_config_gpio(unsigned gpio, unsigned long c) |
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{ |
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unsigned long gafr, mask = GPIO_bit(gpio); |
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int bank = gpio_to_bank(gpio); |
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int uorl = !!(gpio & 0x10); /* GAFRx_U or GAFRx_L ? */ |
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int shft = (gpio & 0xf) << 1; |
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int fn = MFP_AF(c); |
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int is_out = (c & MFP_DIR_OUT) ? 1 : 0; |
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if (fn > 3) |
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return -EINVAL; |
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/* alternate function and direction at run-time */ |
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gafr = (uorl == 0) ? GAFR_L(bank) : GAFR_U(bank); |
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gafr = (gafr & ~(0x3 << shft)) | (fn << shft); |
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if (uorl == 0) |
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GAFR_L(bank) = gafr; |
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else |
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GAFR_U(bank) = gafr; |
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if (is_out ^ gpio_desc[gpio].dir_inverted) |
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GPDR(gpio) |= mask; |
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else |
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GPDR(gpio) &= ~mask; |
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/* alternate function and direction at low power mode */ |
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switch (c & MFP_LPM_STATE_MASK) { |
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case MFP_LPM_DRIVE_HIGH: |
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PGSR(bank) |= mask; |
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is_out = 1; |
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break; |
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case MFP_LPM_DRIVE_LOW: |
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PGSR(bank) &= ~mask; |
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is_out = 1; |
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break; |
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case MFP_LPM_INPUT: |
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case MFP_LPM_DEFAULT: |
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break; |
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default: |
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/* warning and fall through, treat as MFP_LPM_DEFAULT */ |
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pr_warn("%s: GPIO%d: unsupported low power mode\n", |
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__func__, gpio); |
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break; |
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} |
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if (is_out ^ gpio_desc[gpio].dir_inverted) |
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gpdr_lpm[bank] |= mask; |
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else |
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gpdr_lpm[bank] &= ~mask; |
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/* give early warning if MFP_LPM_CAN_WAKEUP is set on the |
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* configurations of those pins not able to wakeup |
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*/ |
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if ((c & MFP_LPM_CAN_WAKEUP) && !gpio_desc[gpio].can_wakeup) { |
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pr_warn("%s: GPIO%d unable to wakeup\n", __func__, gpio); |
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return -EINVAL; |
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} |
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if ((c & MFP_LPM_CAN_WAKEUP) && is_out) { |
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pr_warn("%s: output GPIO%d unable to wakeup\n", __func__, gpio); |
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return -EINVAL; |
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} |
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return 0; |
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} |
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static inline int __mfp_validate(int mfp) |
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{ |
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int gpio = mfp_to_gpio(mfp); |
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if ((mfp > MFP_PIN_GPIO127) || !gpio_desc[gpio].valid) { |
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pr_warn("%s: GPIO%d is invalid pin\n", __func__, gpio); |
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return -1; |
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} |
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return gpio; |
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} |
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void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num) |
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{ |
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unsigned long flags; |
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unsigned long *c; |
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int i, gpio; |
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for (i = 0, c = mfp_cfgs; i < num; i++, c++) { |
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gpio = __mfp_validate(MFP_PIN(*c)); |
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if (gpio < 0) |
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continue; |
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local_irq_save(flags); |
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gpio_desc[gpio].config = *c; |
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__mfp_config_gpio(gpio, *c); |
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local_irq_restore(flags); |
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} |
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} |
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void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm) |
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{ |
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unsigned long flags, c; |
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int gpio; |
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gpio = __mfp_validate(mfp); |
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if (gpio < 0) |
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return; |
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local_irq_save(flags); |
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c = gpio_desc[gpio].config; |
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c = (c & ~MFP_LPM_STATE_MASK) | lpm; |
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__mfp_config_gpio(gpio, c); |
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local_irq_restore(flags); |
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} |
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int gpio_set_wake(unsigned int gpio, unsigned int on) |
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{ |
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struct gpio_desc *d; |
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unsigned long c, mux_taken; |
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if (gpio > mfp_to_gpio(MFP_PIN_GPIO127)) |
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return -EINVAL; |
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d = &gpio_desc[gpio]; |
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c = d->config; |
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if (!d->valid) |
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return -EINVAL; |
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/* Allow keypad GPIOs to wakeup system when |
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* configured as generic GPIOs. |
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*/ |
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if (d->keypad_gpio && (MFP_AF(d->config) == 0) && |
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(d->config & MFP_LPM_CAN_WAKEUP)) { |
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if (on) |
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PKWR |= d->mask; |
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else |
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PKWR &= ~d->mask; |
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return 0; |
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} |
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mux_taken = (PWER & d->mux_mask) & (~d->mask); |
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if (on && mux_taken) |
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return -EBUSY; |
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if (d->can_wakeup && (c & MFP_LPM_CAN_WAKEUP)) { |
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if (on) { |
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PWER = (PWER & ~d->mux_mask) | d->mask; |
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if (c & MFP_LPM_EDGE_RISE) |
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PRER |= d->mask; |
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else |
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PRER &= ~d->mask; |
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if (c & MFP_LPM_EDGE_FALL) |
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PFER |= d->mask; |
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else |
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PFER &= ~d->mask; |
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} else { |
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PWER &= ~d->mask; |
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PRER &= ~d->mask; |
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PFER &= ~d->mask; |
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} |
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} |
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return 0; |
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} |
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#ifdef CONFIG_PXA25x |
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static void __init pxa25x_mfp_init(void) |
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{ |
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int i; |
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/* running before pxa_gpio_probe() */ |
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#ifdef CONFIG_CPU_PXA26x |
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pxa_last_gpio = 89; |
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#else |
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pxa_last_gpio = 84; |
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#endif |
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for (i = 0; i <= pxa_last_gpio; i++) |
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gpio_desc[i].valid = 1; |
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for (i = 0; i <= 15; i++) { |
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gpio_desc[i].can_wakeup = 1; |
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gpio_desc[i].mask = GPIO_bit(i); |
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} |
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/* PXA26x has additional 4 GPIOs (86/87/88/89) which has the |
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* direction bit inverted in GPDR2. See PXA26x DM 4.1.1. |
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*/ |
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for (i = 86; i <= pxa_last_gpio; i++) |
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gpio_desc[i].dir_inverted = 1; |
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} |
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#else |
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static inline void pxa25x_mfp_init(void) {} |
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#endif /* CONFIG_PXA25x */ |
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#ifdef CONFIG_PXA27x |
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static int pxa27x_pkwr_gpio[] = { |
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13, 16, 17, 34, 36, 37, 38, 39, 90, 91, 93, 94, |
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95, 96, 97, 98, 99, 100, 101, 102 |
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}; |
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int keypad_set_wake(unsigned int on) |
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{ |
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unsigned int i, gpio, mask = 0; |
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struct gpio_desc *d; |
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for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) { |
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gpio = pxa27x_pkwr_gpio[i]; |
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d = &gpio_desc[gpio]; |
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/* skip if configured as generic GPIO */ |
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if (MFP_AF(d->config) == 0) |
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continue; |
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if (d->config & MFP_LPM_CAN_WAKEUP) |
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mask |= gpio_desc[gpio].mask; |
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} |
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if (on) |
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PKWR |= mask; |
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else |
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PKWR &= ~mask; |
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return 0; |
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} |
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#define PWER_WEMUX2_GPIO38 (1 << 16) |
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#define PWER_WEMUX2_GPIO53 (2 << 16) |
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#define PWER_WEMUX2_GPIO40 (3 << 16) |
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#define PWER_WEMUX2_GPIO36 (4 << 16) |
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#define PWER_WEMUX2_MASK (7 << 16) |
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#define PWER_WEMUX3_GPIO31 (1 << 19) |
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#define PWER_WEMUX3_GPIO113 (2 << 19) |
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#define PWER_WEMUX3_MASK (3 << 19) |
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#define INIT_GPIO_DESC_MUXED(mux, gpio) \ |
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do { \ |
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gpio_desc[(gpio)].can_wakeup = 1; \ |
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gpio_desc[(gpio)].mask = PWER_ ## mux ## _GPIO ##gpio; \ |
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gpio_desc[(gpio)].mux_mask = PWER_ ## mux ## _MASK; \ |
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} while (0) |
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static void __init pxa27x_mfp_init(void) |
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{ |
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int i, gpio; |
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pxa_last_gpio = 120; /* running before pxa_gpio_probe() */ |
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for (i = 0; i <= pxa_last_gpio; i++) { |
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/* skip GPIO2, 5, 6, 7, 8, they are not |
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* valid pins allow configuration |
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*/ |
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if (i == 2 || i == 5 || i == 6 || i == 7 || i == 8) |
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continue; |
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gpio_desc[i].valid = 1; |
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} |
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/* Keypad GPIOs */ |
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for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) { |
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gpio = pxa27x_pkwr_gpio[i]; |
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gpio_desc[gpio].can_wakeup = 1; |
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gpio_desc[gpio].keypad_gpio = 1; |
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gpio_desc[gpio].mask = 1 << i; |
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} |
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/* Overwrite GPIO13 as a PWER wakeup source */ |
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for (i = 0; i <= 15; i++) { |
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/* skip GPIO2, 5, 6, 7, 8 */ |
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if (GPIO_bit(i) & 0x1e4) |
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continue; |
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gpio_desc[i].can_wakeup = 1; |
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gpio_desc[i].mask = GPIO_bit(i); |
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} |
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gpio_desc[35].can_wakeup = 1; |
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gpio_desc[35].mask = PWER_WE35; |
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INIT_GPIO_DESC_MUXED(WEMUX3, 31); |
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INIT_GPIO_DESC_MUXED(WEMUX3, 113); |
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INIT_GPIO_DESC_MUXED(WEMUX2, 38); |
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INIT_GPIO_DESC_MUXED(WEMUX2, 53); |
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INIT_GPIO_DESC_MUXED(WEMUX2, 40); |
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INIT_GPIO_DESC_MUXED(WEMUX2, 36); |
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} |
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#else |
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static inline void pxa27x_mfp_init(void) {} |
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#endif /* CONFIG_PXA27x */ |
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#ifdef CONFIG_PM |
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static unsigned long saved_gafr[2][4]; |
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static unsigned long saved_gpdr[4]; |
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static unsigned long saved_gplr[4]; |
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static unsigned long saved_pgsr[4]; |
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static int pxa2xx_mfp_suspend(void) |
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{ |
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int i; |
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/* set corresponding PGSR bit of those marked MFP_LPM_KEEP_OUTPUT */ |
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for (i = 0; i < pxa_last_gpio; i++) { |
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if ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) && |
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(GPDR(i) & GPIO_bit(i))) { |
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if (GPLR(i) & GPIO_bit(i)) |
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PGSR(gpio_to_bank(i)) |= GPIO_bit(i); |
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else |
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PGSR(gpio_to_bank(i)) &= ~GPIO_bit(i); |
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} |
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} |
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for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) { |
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saved_gafr[0][i] = GAFR_L(i); |
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saved_gafr[1][i] = GAFR_U(i); |
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saved_gpdr[i] = GPDR(i * 32); |
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saved_gplr[i] = GPLR(i * 32); |
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saved_pgsr[i] = PGSR(i); |
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GPSR(i * 32) = PGSR(i); |
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GPCR(i * 32) = ~PGSR(i); |
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} |
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/* set GPDR bits taking into account MFP_LPM_KEEP_OUTPUT */ |
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for (i = 0; i < pxa_last_gpio; i++) { |
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if ((gpdr_lpm[gpio_to_bank(i)] & GPIO_bit(i)) || |
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((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) && |
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(saved_gpdr[gpio_to_bank(i)] & GPIO_bit(i)))) |
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GPDR(i) |= GPIO_bit(i); |
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else |
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GPDR(i) &= ~GPIO_bit(i); |
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} |
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return 0; |
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} |
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static void pxa2xx_mfp_resume(void) |
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{ |
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int i; |
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for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) { |
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GAFR_L(i) = saved_gafr[0][i]; |
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GAFR_U(i) = saved_gafr[1][i]; |
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GPSR(i * 32) = saved_gplr[i]; |
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GPCR(i * 32) = ~saved_gplr[i]; |
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GPDR(i * 32) = saved_gpdr[i]; |
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PGSR(i) = saved_pgsr[i]; |
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} |
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PSSR = PSSR_RDH | PSSR_PH; |
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} |
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#else |
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#define pxa2xx_mfp_suspend NULL |
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#define pxa2xx_mfp_resume NULL |
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#endif |
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struct syscore_ops pxa2xx_mfp_syscore_ops = { |
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.suspend = pxa2xx_mfp_suspend, |
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.resume = pxa2xx_mfp_resume, |
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}; |
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static int __init pxa2xx_mfp_init(void) |
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{ |
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int i; |
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if (!cpu_is_pxa2xx()) |
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return 0; |
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if (cpu_is_pxa25x()) |
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pxa25x_mfp_init(); |
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if (cpu_is_pxa27x()) |
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pxa27x_mfp_init(); |
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/* clear RDH bit to enable GPIO receivers after reset/sleep exit */ |
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PSSR = PSSR_RDH; |
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/* initialize gafr_run[], pgsr_lpm[] from existing values */ |
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for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) |
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gpdr_lpm[i] = GPDR(i * 32); |
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return 0; |
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} |
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postcore_initcall(pxa2xx_mfp_init);
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