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62 lines
1.3 KiB
62 lines
1.3 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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#ifndef __ASMARM_ARCH_SCU_H |
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#define __ASMARM_ARCH_SCU_H |
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#define SCU_PM_NORMAL 0 |
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#define SCU_PM_DORMANT 2 |
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#define SCU_PM_POWEROFF 3 |
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#ifndef __ASSEMBLER__ |
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#include <linux/errno.h> |
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#include <asm/cputype.h> |
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static inline bool scu_a9_has_base(void) |
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{ |
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return read_cpuid_part() == ARM_CPU_PART_CORTEX_A9; |
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} |
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static inline unsigned long scu_a9_get_base(void) |
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{ |
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unsigned long pa; |
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asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (pa)); |
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return pa; |
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} |
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#ifdef CONFIG_HAVE_ARM_SCU |
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unsigned int scu_get_core_count(void __iomem *); |
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int scu_power_mode(void __iomem *, unsigned int); |
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int scu_cpu_power_enable(void __iomem *, unsigned int); |
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int scu_get_cpu_power_mode(void __iomem *scu_base, unsigned int logical_cpu); |
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#else |
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static inline unsigned int scu_get_core_count(void __iomem *scu_base) |
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{ |
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return 0; |
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} |
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static inline int scu_power_mode(void __iomem *scu_base, unsigned int mode) |
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{ |
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return -EINVAL; |
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} |
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static inline int scu_cpu_power_enable(void __iomem *scu_base, |
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unsigned int mode) |
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{ |
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return -EINVAL; |
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} |
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static inline int scu_get_cpu_power_mode(void __iomem *scu_base, |
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unsigned int logical_cpu) |
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{ |
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return -EINVAL; |
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} |
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#endif |
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#if defined(CONFIG_SMP) && defined(CONFIG_HAVE_ARM_SCU) |
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void scu_enable(void __iomem *scu_base); |
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#else |
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static inline void scu_enable(void __iomem *scu_base) {} |
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#endif |
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#endif |
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#endif
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