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123 lines
2.5 KiB
123 lines
2.5 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* sha1-ce-core.S - SHA-1 secure hash using ARMv8 Crypto Extensions |
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* |
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* Copyright (C) 2015 Linaro Ltd. |
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* Author: Ard Biesheuvel <ard.biesheuvel@linaro.org> |
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*/ |
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#include <linux/linkage.h> |
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#include <asm/assembler.h> |
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.text |
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.arch armv8-a |
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.fpu crypto-neon-fp-armv8 |
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k0 .req q0 |
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k1 .req q1 |
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k2 .req q2 |
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k3 .req q3 |
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ta0 .req q4 |
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ta1 .req q5 |
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tb0 .req q5 |
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tb1 .req q4 |
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dga .req q6 |
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dgb .req q7 |
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dgbs .req s28 |
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dg0 .req q12 |
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dg1a0 .req q13 |
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dg1a1 .req q14 |
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dg1b0 .req q14 |
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dg1b1 .req q13 |
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.macro add_only, op, ev, rc, s0, dg1 |
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.ifnb \s0 |
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vadd.u32 tb\ev, q\s0, \rc |
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.endif |
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sha1h.32 dg1b\ev, dg0 |
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.ifb \dg1 |
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sha1\op\().32 dg0, dg1a\ev, ta\ev |
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.else |
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sha1\op\().32 dg0, \dg1, ta\ev |
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.endif |
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.endm |
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.macro add_update, op, ev, rc, s0, s1, s2, s3, dg1 |
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sha1su0.32 q\s0, q\s1, q\s2 |
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add_only \op, \ev, \rc, \s1, \dg1 |
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sha1su1.32 q\s0, q\s3 |
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.endm |
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.align 6 |
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.Lsha1_rcon: |
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.word 0x5a827999, 0x5a827999, 0x5a827999, 0x5a827999 |
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.word 0x6ed9eba1, 0x6ed9eba1, 0x6ed9eba1, 0x6ed9eba1 |
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.word 0x8f1bbcdc, 0x8f1bbcdc, 0x8f1bbcdc, 0x8f1bbcdc |
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.word 0xca62c1d6, 0xca62c1d6, 0xca62c1d6, 0xca62c1d6 |
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/* |
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* void sha1_ce_transform(struct sha1_state *sst, u8 const *src, |
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* int blocks); |
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*/ |
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ENTRY(sha1_ce_transform) |
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/* load round constants */ |
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adr ip, .Lsha1_rcon |
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vld1.32 {k0-k1}, [ip, :128]! |
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vld1.32 {k2-k3}, [ip, :128] |
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/* load state */ |
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vld1.32 {dga}, [r0] |
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vldr dgbs, [r0, #16] |
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/* load input */ |
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0: vld1.32 {q8-q9}, [r1]! |
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vld1.32 {q10-q11}, [r1]! |
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subs r2, r2, #1 |
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#ifndef CONFIG_CPU_BIG_ENDIAN |
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vrev32.8 q8, q8 |
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vrev32.8 q9, q9 |
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vrev32.8 q10, q10 |
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vrev32.8 q11, q11 |
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#endif |
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vadd.u32 ta0, q8, k0 |
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vmov dg0, dga |
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add_update c, 0, k0, 8, 9, 10, 11, dgb |
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add_update c, 1, k0, 9, 10, 11, 8 |
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add_update c, 0, k0, 10, 11, 8, 9 |
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add_update c, 1, k0, 11, 8, 9, 10 |
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add_update c, 0, k1, 8, 9, 10, 11 |
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add_update p, 1, k1, 9, 10, 11, 8 |
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add_update p, 0, k1, 10, 11, 8, 9 |
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add_update p, 1, k1, 11, 8, 9, 10 |
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add_update p, 0, k1, 8, 9, 10, 11 |
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add_update p, 1, k2, 9, 10, 11, 8 |
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add_update m, 0, k2, 10, 11, 8, 9 |
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add_update m, 1, k2, 11, 8, 9, 10 |
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add_update m, 0, k2, 8, 9, 10, 11 |
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add_update m, 1, k2, 9, 10, 11, 8 |
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add_update m, 0, k3, 10, 11, 8, 9 |
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add_update p, 1, k3, 11, 8, 9, 10 |
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add_only p, 0, k3, 9 |
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add_only p, 1, k3, 10 |
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add_only p, 0, k3, 11 |
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add_only p, 1 |
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/* update state */ |
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vadd.u32 dga, dga, dg0 |
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vadd.u32 dgb, dgb, dg1a0 |
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bne 0b |
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/* store new state */ |
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vst1.32 {dga}, [r0] |
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vstr dgbs, [r0, #16] |
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bx lr |
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ENDPROC(sha1_ce_transform)
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